JPWO2017154218A1 - Inverter device - Google Patents

Abstract

An inverter device comprising an inverter device main body 1 and an operation panel 2 for the purpose of obtaining an inverter device that can be realized at low cost, ensuring insulation between an operation panel detachable from the main body and a main circuit of the main body. The inverter device body 1 includes a non-insulated CPU 10 that is non-insulated from the main circuit potential, and the operation panel 2 includes an IO expander IC 20 that is a signal relay IC and an input / output interface 200 that is connected to the IO expander IC 20. The non-isolated CPU 10 and the IO expander IC 20 are SPI-connected via the isolation circuit 14, and the non-isolated CPU 10 recognizes the input state of the input / output interface 200 and controls the output via the IO expander IC 20. I do.

Description

  The present invention relates to an inverter device including an operation panel.

  In a conventional inexpensive inverter device, the voltage of the shunt resistor for current detection and the voltage after resistance voltage division of the bus voltage are input to the AD (Analog to Digital) input unit of the CPU (Central Processing Unit) without being insulated. Therefore, the CPU has a potential that is not insulated from the main circuit of the inverter device. Therefore, it is common to insulate the external interface from the main circuit while reducing the overall cost by using an insulating circuit having a photocoupler in the external interface portion of such an inverter device.

  In addition, in the inverter device in which the operation panel can be detached from the connection connector part, the main circuit and the connection connector part are insulated on the main body side of the inverter device, so that the main circuit is not insulated from the connection connector part of the inverter device main body. The wiring and the terminal of the potential are configured not to be exposed.

  Japanese Patent Application Laid-Open No. 2004-133620 discloses a control device that is configured to be removable from the control device main body so that the terminal block can be replaced. It is also described that this control device is an inverter device that drives and controls a motor.

JP 2008-109789 A

  However, in the above prior art, the CPU of the control device connected to the terminal block which is an external interface needs to be insulated, and the insulation circuit captures the analog value of the current detection of the main circuit or the analog value of the bus voltage detection. In some cases, the cost was high.

  The present invention has been made in view of the above, and an object of the present invention is to obtain an inverter device that can realize a configuration in which insulation between an operation panel detachable from a main body and a main circuit of the main body is ensured at low cost. To do.

  In order to solve the above-described problems and achieve the object, the present invention is an inverter device including an inverter device body and an operation panel, the inverter device body being non-insulated that is non-insulated from a main circuit potential. The operation panel includes a CPU that outputs a voltage corresponding to a received signal to an output port, and transmits the voltage input to the input port as a digital signal, and the output connected to the signal relay IC A non-isolated CPU and the signal relay IC are SPI-connected via the isolation circuit, and the non-isolated CPU is connected to the front via the signal relay IC. It recognizes the input state of the entry / output interface and controls the output.

  INDUSTRIAL APPLICABILITY The inverter device according to the present invention has an effect that a configuration in which insulation between an operation panel detachable from the main body and a main circuit of the main body is ensured can be realized at low cost.

The figure which shows an example of a structure of the inverter apparatus concerning embodiment The figure which shows an example of the circuit diagram of the dial and D flip-flop circuit which are shown in FIG. The figure which shows an example of A signal, B signal, and Q signal which are shown in FIG. The figure which shows an example of a structure of the inverter apparatus which is a comparative example

  Below, an inverter device concerning an embodiment of the invention is explained in detail based on a drawing. Note that the present invention is not limited to the embodiments.

Embodiment.
FIG. 1 is a diagram illustrating an example of a configuration of an inverter device according to an embodiment of the present invention. The inverter device 4 shown in FIG. 1 includes an operation panel 2, an inverter device main body 1 to which the operation panel 2 can be attached and detached, and a cable 3 that connects the inverter device main body 1 and the operation panel 2.

  The main body 1 includes a non-isolated CPU 10, a non-insulated power supply 11 that is not insulated from the main circuit, an insulated power supply 12 that is insulated from the main circuit, a main body connector 13, an insulating circuit 14, an oscillator 16, and a reset circuit. 17. The non-insulated CPU 10 is a CPU that is not insulated from the potential of the main circuit. The insulated power source 12 is a power source insulated from the potential of the main circuit. The main body side connector 13 is a connection portion with the operation panel 2. The insulating circuit 14 is disposed between the non-insulating CPU 10 and the main body side connector 13. The oscillator 16 and the reset circuit 17 are connected to the non-insulated CPU 10. The non-isolated CPU 10 recognizes the input state of the input / output interface 200 and controls the output via an IO (Input Output) expander IC 20 which is a signal relay IC (Integrated Circuit).

  The operation panel 2 includes an IO expander IC 20, an operation panel side connector 21, a button switch 22, a 7 segment LED (Light Emitting Diode) 23, an LED 24, a dial 25, a D flip-flop circuit 26, and an operation knob. 27 and an integral type AD converter 28. The IO expander IC 20 is configured to be able to communicate with an SPI (Serial Peripheral Interface). The operation panel side connector 21 is a connection part with the inverter apparatus main body 1. The button switch 22 is an input unit operated by an operator. The 7-segment LED 23 is an output unit that displays numerical data and gives numerical information to the operator. The LED 24 is an output unit that gives information to the operator depending on the lighting state. The dial 25 is an input unit operated by an operator, and outputs a phase signal when rotated. The D flip-flop circuit 26 is provided between the IO expander IC 20 and the dial 25. The operation knob 27 is an input unit operated by an operator, and adjusts parameters. The integral AD converter 28 is provided between the IO expander IC 20 and the operation knob 27. The button switch 22, the 7-segment LED 23, and the LED 24 are connected to the IO expander IC 20. The button switch 22, the 7-segment LED 23, the LED 24, the dial 25, the D flip-flop circuit 26, the operation knob 27, and the integral AD converter 28 are collectively referred to as an input / output interface 200. The input / output interface 200 includes at least one of a button switch 22, a dial 25, and an operation knob 27 that are input units, and at least one of a 7-segment LED 23 and an LED 24 that are output units.

  The cable 3 includes power supply lines 31 and 32 connected to an insulated power supply 12 that is insulated from the potential of the main circuit, and communication lines 33, 34, and 35 connected to the IO expander IC 20 and performing SPI communication. That is, the non-insulated CPU 10 and the IO expander IC 20 are SPI-connected. The communication lines 33, 34, and 35 are a clock signal communication line, a transmission data communication line, and a reception data communication line, respectively.

  The inverter device shown in FIG. 1 may be used with the operation panel 2 mounted on the inverter device main body 1 or may be used with the operation panel 2 removed from the inverter device main body 1. When the operation panel 2 is attached to the inverter device main body 1, the main body side connector 13 of the inverter device main body 1 and the operation panel side connector 21 of the operation panel 2 are connected. Thus, when the operation panel 2 is attached to the main body 1, the main body side connector 13 and the operation panel side connector 21 are directly connected, so that the cable 3 is unnecessary. When the operation panel 2 is used by being detached from the inverter device main body 1, the operation panel 2 is used in a state where the main body side connector 13 and the operation panel side connector 21 are wiredly connected by the cable 3. When the operation panel 2 is detached from the inverter device body 1 and used, the operation panel 2 can be used at a position away from the inverter device body 1.

  In the operation panel 2, the communication lines 33, 34, and 35 are also insulated from the main circuit potential by the insulation circuit 14 on the inverter device body 1 side, and the insulated power supply 12 is used as a power source. Therefore, the operator of the operation panel 2 does not have a risk of electric shock due to the main circuit potential of the non-insulated power supply 11.

The insulating circuit 14 includes a plurality of photocouplers (not shown) and insulates the input side from the output side. In addition, the insulating circuit 14 performs one-way communication by SPI communication, not communication in which a data line is bidirectional such as an I ² C (Inter-Integrated Circuit) connection. This is because the I ² C connection performs two-way communication, so that the input and the output cannot be insulated. In SPI communication, communication is possible at a speed at which a one-way clock signal can be transmitted. In the insulating circuit 14, a digital isolator may be provided instead of the photocoupler.

  The IO expander, which is a signal relay IC, converts the received digital data 1, 0 into an H level or L level voltage and outputs it from the general-purpose port, and digitally converts the H-level or L-level voltage input to the general-purpose port. Data 1 and 0 are converted and transmitted. The IO expander IC 20 in FIG. 1 outputs a voltage of H level or L level from the general-purpose port of the IO expander IC 20 according to the received signal of the SPI communication which is a digital value, and the H level or L input to the general-purpose port. By transmitting a level voltage as a digital signal through SPI communication, a binary digital signal can be transmitted to and received from the non-insulated CPU 10. Therefore, the IO expander IC 20 is configured to receive an input signal from the button switch 22 and configured to output an output signal to the 7-segment LED 23 and the LED 24. The non-insulated CPU 10 recognizes the input state of the input / output interface 200 and controls the output via the IO expander IC 20.

  When the frequency command is set with the operation knob 27, an analog voltage signal from the operation knob 27 is input to the integral type AD converter 28. The integrating AD converter 28 outputs a pulse signal having a pulse width corresponding to the analog voltage signal. In other words, a pulse signal having a pulse width obtained by converting the magnitude of the analog voltage of the analog voltage signal is output, and this pulse signal is input to the IO expander IC 20. The non-insulated CPU 10 estimates the magnitude of the analog voltage output from the operation knob 27 from the pulse width of the pulse signal input to the IO expander IC 20. The operation knob 27 is manually operated, responsiveness is not required, the pulse width can be increased, and the resolution depends on the communication interval.

  When the input / output interface 200 includes the dial 25 and the D flip-flop circuit 26 connected to the dial 25, the dial 25 outputs the phase signal of the encoder to the D flip-flop circuit 26, and the D flip-flop circuit 26 The rotation direction of the dial 25 is output to the IO expander IC 20, the change of the phase signal of the encoder is output to the IO expander IC 20, and the non-isolated CPU 10 determines the dial 25 from these signals input to the IO expander IC 20. Measure the amount of change. Here, a rotary encoder can be exemplified as the encoder.

  FIG. 4 is a diagram illustrating an example of a configuration of an inverter device that is a comparative example of FIG. 1. The inverter device 4a shown in FIG. 4 includes an operation panel 2a, an inverter device body 1a to which the operation panel 2a can be attached and detached, and a cable 3a that connects the inverter device body 1a and the operation panel 2a.

  The inverter device main body 1a includes a non-insulated CPU 10a instead of the non-insulated CPU 10, and includes a main body-side connector 13a in which two power lines and two communication lines are connected instead of the main body-side connector 13. 1 is different from the inverter device body 1 shown in FIG. 1 in that an RS-485 transceiver 15a is provided between the connector 13a and the insulating circuit 14.

  The operation panel 2a includes an operation panel side connector 21a in which two power lines and two communication lines are connected instead of the operation panel side connector 21, and is insulated from the main circuit instead of the IO expander IC 20. An insulating CPU 20a is provided, and an oscillator 201a and a reset circuit 202a are connected to the insulating CPU 20a. An RS-485 transceiver 29a is provided between the operation panel connector 21a and the insulating CPU 20a. The difference from the operation panel 2 shown in FIG. 1 is that the AD converter 28 is not provided.

  The cable 3a is different from the cable 3 shown in FIG. 1 in that the communication lines 33a, 34a are provided instead of the communication lines 33, 34, 35. The communication lines 33a and 34a are communication lines for communication between the RS-485 transceiver 15a and the RS-485 transceiver 29a, and are examples using differential signals transmitted and received in half-duplex communication.

  The non-insulated CPU 10a performs signal conversion to UART and RS-485 communication by the RS-485 transceiver 15a. The RS-485 transceiver 15a can transmit to the RS-485 transceiver 29a when transmission is permitted by the transmission enable signal from the non-isolated CPU 10a. The RS-485 transceiver 29a can transmit to the RS-485 transceiver 15a when transmission is permitted by the transmission enable signal from the insulation CPU 20a. Communication between the inverter main body 1a and the operation panel 2a is performed between the RS-485 transceiver 15a and the RS-485 transceiver 29a. The RS-485 transceiver 29a performs signal conversion to UART and RS-485 communication. The communication lines 33a and 34a in FIG. 4 are an example in the case of half-duplex communication. In the case of full-duplex communication, there are four communication lines.

  As described above, it is possible to realize an inverter device including a detachable operation panel in which insulation is ensured on the inverter device main body side even by the configuration shown in FIG. However, in the configuration shown in FIG. 4, the operation panel 2a requires an insulating CPU 20a, an oscillator 201a, and a reset circuit 202a. That is, not only the inverter main body 1a but also the operation panel 2a requires a CPU, an oscillator, and a reset circuit. Moreover, an RS-485 transceiver is required for both the inverter device main body 1a and the operation panel 2a. That is, in the configuration shown in FIG. 4, the insulated CPU 20a, the RS-485 transceiver 15a, and the RS-485 transceiver 29a are essential, and thus there is a problem that the manufacturing cost is high.

  Therefore, according to the present embodiment, a configuration in which insulation between the operation panel detachable from the main body and the main circuit of the main body is ensured can be realized at low cost.

  FIG. 2 is a diagram showing an example of a circuit diagram of the dial 25 and the D flip-flop circuit 26 shown in FIG. When the dial 25 changes the setting value of the frequency command and the parameter by the A signal and the B signal which are phase encoder signals output from the phase encoder included in the dial 25, the D flip-flop circuit 26 also has an A value. The signal and the B signal are input, and the output signal of the D flip-flop circuit 26 is used as a signal for determining the direction of the dial 25.

  FIG. 3 is a diagram illustrating an example of the A signal, the B signal, and the Q signal illustrated in FIG. The dial 25 shown in FIG. 2 is stable in rotation at the click stable point. In FIG. 3, the rising edge of the B signal is the click stable point. When the B signal is input to the clock input CK of the D flip-flop circuit 26 and the A signal is input to the input D of the D flip-flop circuit 26, the A signal is H when the dial 25 rotates clockwise, and the counterclockwise When rotated in the direction, the A signal is L. Therefore, the direction of the dial 25 can be determined by the output Q of the D flip-flop circuit 26. When the number of rotations of the dial 25 is 20 pulses / one rotation, assuming that the dial 25 can be rotated four times per second by manual operation, the period T of one pulse of the A signal is T = 1 / (20 X4) = 12.5 ms. Accordingly, if the signal is sampled by the IO expander IC 20 at a time earlier than the period T, a change in the dial 25 can be detected.

  According to the present embodiment, an inverter device body including a non-insulated CPU that is not insulated from the main circuit potential of the inverter device, and a detachable operation panel that is insulated from the main circuit potential of the inverter device body and is not equipped with a CPU. Can be obtained at low cost.

  The structure described in this embodiment mode shows an example of the content of the present invention, and can be combined with another known technique, or a part of the structure without departing from the gist of the present invention. Can be omitted or changed.

  1, 1a Inverter device main body, 2, 2a Operation panel, 3, 3a cable, 4, 4a Inverter device, 10, 10a Non-insulated CPU, 11 Non-insulated power source, 12 Insulated power source, 14 Insulated circuit, 13, 13a Body side connector , 15a, 29a RS-485 transceiver, 16, 201a oscillator, 17, 202a reset circuit, 20 IO expander IC, 20a insulation CPU, 21, 21a operation panel side connector, 22 button switch, 237 segment LED, 24 LED , 25 dial, 26 D flip-flop circuit, 27 operation knob, 28 integral AD converter, 31, 32 power supply line, 33, 33a, 34, 34a, 35 communication line, 200 input / output interface.

In order to solve the above-described problems and achieve the object, the present invention is an inverter device including an inverter device body and an operation panel, the inverter device body being non-insulated that is non-insulated from a main circuit potential. The operation panel includes a CPU that outputs a voltage corresponding to a received signal to an output port, and transmits the voltage input to the input port as a digital signal, and the output connected to the signal relay IC a port and an input-output interface including said input port, said and uninsulated CPU the signal relay IC is SPI connected via the insulation circuit, the non-isolated CPU, the front via the signal relay IC It recognizes the input state of the entry / output interface and controls the output.

In order to solve the above-described problems and achieve the object, the present invention is an inverter device including an inverter device body and an operation panel, the inverter device body being non-insulated that is non-insulated from a main circuit potential. An inverter device main body side connector which is a connecting portion between the CPU and the operation panel; and an insulating circuit disposed between the non-insulated CPU and the inverter device main body side connector, the operation panel receiving signals A signal relay IC that outputs a voltage corresponding to the output port to the output port and transmits the voltage input to the input port as a digital signal, and an input / output interface including the output port and the input port connected to the signal relay IC; , and an operation panel connector is a connection portion between the inverter apparatus main body, wherein the the non-insulated CPU the signal relay IC, the Inverter apparatus main body side connector is the SPI via the operation panel side connector and the insulation circuit connection, the non-isolated CPU controls the recognition and output of the input state of the input-output interface via said signal relay IC It is characterized by that.

Claims (6)

An inverter device comprising an inverter device body and an operation panel,
The inverter device body includes a non-insulated CPU that is non-insulated from the main circuit potential,
The operation panel outputs a voltage according to a received signal to an output port, transmits a voltage input to the input port as a digital signal, the output port connected to the signal relay IC, and the input I / O interface including ports,
The non-insulated CPU and the signal relay IC are SPI-connected via the insulating circuit,
The non-insulated CPU recognizes an input state of the input / output interface and controls an output through the signal relay IC.   The inverter device according to claim 1, further comprising a cable that connects the main body side connector and the operation panel side connector.   The inverter device according to claim 1, wherein the insulating circuit includes a photocoupler.   The input / output interface includes any one or more of a button switch as an input unit, a dial and an operation knob, and a 7-segment LED and an LED as an output unit. The inverter apparatus as described in any one. The input / output interface includes an operation knob and an integral AD converter connected to the operation knob.
The operation knob outputs an analog voltage for setting a frequency command,
The integration type AD converter converts the magnitude of the analog voltage into a pulse width and outputs the pulse width to the signal relay IC.
4. The inverter device according to claim 1, wherein the non-insulated CPU estimates a magnitude of the analog voltage from the pulse width input to the signal relay IC. 5. The input / output interface includes a dial and a D flip-flop circuit connected to the dial;
The dial outputs the phase signal of the encoder to the D flip-flop circuit,
The D flip-flop circuit outputs the change of the phase signal to the signal relay IC while outputting the rotation direction of the dial to the signal relay IC.
4. The inverter device according to claim 1, wherein the non-insulated CPU measures a change amount of the dial from the phase signal input to the signal relay IC. 5.

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