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JPS6397921A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPS6397921A
JPS6397921A JP24380686A JP24380686A JPS6397921A JP S6397921 A JPS6397921 A JP S6397921A JP 24380686 A JP24380686 A JP 24380686A JP 24380686 A JP24380686 A JP 24380686A JP S6397921 A JPS6397921 A JP S6397921A
Authority
JP
Japan
Prior art keywords
display
liquid crystal
signals
display device
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24380686A
Other languages
Japanese (ja)
Inventor
Katsunori Yamazaki
克則 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP24380686A priority Critical patent/JPS6397921A/en
Publication of JPS6397921A publication Critical patent/JPS6397921A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

PURPOSE:To permit gradation display by an integrated circuit of binary display by weighting plural display signals, then converting the signals to the flickering frequencies of the display and converting the phases of the periods of the flickering so as to shift the same by the positions of the display. CONSTITUTION:This device is provided with a conversion circuit 1 which is inputted with the plural display signals and converts the signals to the flickering signals for gradation display, the integrated circuit 4 for binary driving of a liquid crystal panel 3, and an integrated circuit which converts video signals to the signals necessary for the liquid crystal display device. One period of the flickering is obtd. by drawing 8 image screens and the flickering frequencies corresponding to the respective gradations are the same but the phases are shifted by the positions stipulated by even and odd lines and rows. The reason thereof lies in that the flickerings go into sight in the case of flickering with the same phases when the parts of the same gradations are adjacently displayed. Patterns are so selected that the ratios of the lighting indicated by the even and odd lines between the respective frames are uniformized. The gradation display is thus obtd. by the liquid crystal display device of the binary display.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は液晶表示装置の階膚衣示に関する。[Detailed description of the invention] [Industrial application field] TECHNICAL FIELD The present invention relates to dermatology display in a liquid crystal display device.

〔従来の技術〕[Conventional technology]

従来の液晶表示装置に於ける階調表示の方法として、第
8図に示すように液晶表示パネルの共通′電極に加えら
れる(N号で選択嵯圧の加わっている間に信号電極にオ
ン電圧とオフ電圧のかかる時間を変化させて、夷効直を
変化させ階調させていた。
As shown in Figure 8, as a method of displaying gradations in a conventional liquid crystal display device, an on-voltage is applied to the common electrode of the liquid crystal display panel (while a selective pressure is applied at No. N), an on-voltage is applied to the signal electrode. By changing the amount of time that the off-voltage is applied, the effect and directivity were changed and the gradation was achieved.

〔発明が解決しようとする間呟点〕[The problem that the invention is trying to solve]

しかし、従来の階調表示方式では、信号電惚に加える波
形が階調によってパルス巾を変化させる必要があるため
駆動するための集積回路が複雑になるという欠点があっ
た。
However, the conventional gradation display method has the drawback that the pulse width of the waveform added to the signal electric current needs to be changed depending on the gradation, which makes the integrated circuit for driving it complicated.

又、液晶表示装置の表示容量が大きくなって、ダイナミ
ック駆動のデユーティが高くなるに従って信号波形のオ
ン電圧とオフ電圧の比と階調の度合が一致しなくなると
いう欠点があった。
Another disadvantage is that as the display capacity of the liquid crystal display device increases and the duty of dynamic driving increases, the ratio of the on-voltage to off-voltage of the signal waveform and the degree of gradation do not match.

そこで本発明はこのような問題点を解決するもので、階
調表示の九めの集積回路を使用せずに二鎖表示の集積回
路によシはつきシした階調表示を提供するところにある
SUMMARY OF THE INVENTION The present invention solves these problems by providing a gradation display that is unique to a double-chain display integrated circuit without using a 9th integrated circuit for gradation display. be.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の液晶表示装置は、複数の表示信号に重み付けを
行い、階調表示を行うドツトマトリクスの液晶表示装置
において1表示の点滅の頻度を変化させて階鯛ヲ得るこ
とと、前記表示の点滅の周期の位相を前記液晶表示装置
上の表示の位置によってずらすことと、前記複数の表示
信号を重み付けした後に前記表示の点滅の頻度に変換さ
せ且つ点滅の周期の位相?前記表示の位置によってずら
すように変換することを特徴とする。
The liquid crystal display device of the present invention weights a plurality of display signals and changes the frequency of blinking of one display in a dot matrix liquid crystal display device that performs gradation display to obtain a gray scale, and the blinking of the display Shifting the phase of the period according to the position of the display on the liquid crystal display device, converting the plurality of display signals into a blinking frequency of the display after weighting them, and converting the phase of the blinking period? It is characterized in that the conversion is performed so as to be shifted depending on the position of the display.

〔実施例〕〔Example〕

第1図は本発明の実施例の構成図であって、1は複数の
表示信号を入力して、階調表示のため点滅信号に変える
変換回路で、2は従来の2直表示を行なう液晶表示装置
で、液晶パネル3’t2(面駆動する集積回路(以下駆
動IC)4及び水平、垂直周期信号と2直の表示信号か
らなる一般にCRTに入力する信号(以下、ビデオ信号
)t−液晶表示装置に必要な信号に変換する集積回路(
以下コントローラエC)5からなシ、コントローラエC
5にはセイコーエプソン株の■5ED1340又は■E
111CD1341等の製品が知られている。
FIG. 1 is a configuration diagram of an embodiment of the present invention, in which 1 is a conversion circuit that inputs a plurality of display signals and converts it into a blinking signal for gradation display, and 2 is a conventional liquid crystal display that performs two-direction display. In a display device, a liquid crystal panel 3't2 (an integrated circuit for surface driving (hereinafter referred to as a driving IC) 4 and a signal generally input to a CRT (hereinafter referred to as a video signal) consisting of horizontal and vertical periodic signals and two-time display signals (hereinafter referred to as a video signal) t-liquid crystal. An integrated circuit (
Below is Controller E C) From 5, Controller E C
5 is Seiko Epson stock ■5ED1340 or ■E
Products such as 111CD1341 are known.

このように構成された液晶表示装置2は2直のビデオ信
号によって2直表示が出来る。
The liquid crystal display device 2 configured in this manner can perform two-direction display using two-direction video signals.

本実施列では階調を与える表示信号線と3本とし、階調
の数を2の3乗の8階調として以下説明する。
In this embodiment, there are three display signal lines that provide gray scales, and the number of gray scales will be described below as eight to the third power of 2.

階調の与え方は、第2図に示す1点滅の周期は、8画面
書いて1周期とする。(以下tg1画面を1フレーム、
第2画面を27レーム、と称する。)工O〜工3は表示
信号の状態ヲ示し、各フレームにおける点灯、非点灯が
ます目の中に表示され、ますの4つの区切シは、左上が
偶数行と偶数列、左下が偶数行と奇数列、右とが奇数行
と偶数列。
As for how to give gradation, the period of one blink shown in FIG. 2 is 8 screens and one period. (One frame of tg1 screen below,
The second screen is called 27 frames. ) Steps 0 to 3 indicate the status of the display signal, and lighting and non-lighting in each frame are displayed in the squares. and odd columns, right and odd rows and even columns.

右下が奇数行と奇数列の交点にあるドツトの点灯、非点
灯の状9(以下、偶奇行列)をしめしである。
The lower right shows the lighting and non-lighting states 9 of dots located at the intersections of odd rows and odd columns (hereinafter referred to as an even-odd matrix).

ここでしめされている様に各階調に対応した点滅の頻度
は同じであるが、偶奇の行と列によフ規定される位置に
よって位相がずらしである。これは、同じ階調の部分が
隣接して表示される時、同じ位相で点滅するとちらつき
が見えてしまうからである。
As shown here, the frequency of blinking corresponding to each gradation is the same, but the phase is shifted depending on the position defined by the even and odd rows and columns. This is because when parts of the same gradation are displayed adjacent to each other, if they blink at the same phase, flickering will be visible.

ちらつきの防止の為に1点灯と非点灯をできるだけ分散
させである。タリえば(工0.工1.工5)=(0,1
,1)の時点滅パターンが1.1,1゜1.0,0,0
.0でなく第2図の様に1,0゜1.0,1,0,1,
0としである。但し、1は点灯%0は非点灯を示す。
To prevent flickering, one lighting and one non-lighting should be dispersed as much as possible. If the tally is (Work 0. Work 1. Work 5) = (0, 1
, 1), the blinking pattern is 1.1,1°1.0,0,0
.. Instead of 0, it is 1,0°1.0,1,0,1, as shown in Figure 2.
It is 0. However, 1 indicates lighting and 0 indicates non-lighting.

又、各階調において、各フレーム間での、偶奇行列で示
される点灯の割合が均一になるように、パターンが選択
されている。
Further, in each gradation, the pattern is selected so that the ratio of lighting indicated by an even-odd matrix between each frame is uniform.

列えば、(工@、工1 g ” s ) −(1t 1
 * 0)の時フレーム1から8まで偶奇行列を下のよ
うに表わし、 すると各フレームにおける点灯の割合は4/4.4/4
.2/4.4/4.4/4.4/4.2/4 、4/4
どなり7レーム3.フレーム7で大きく変わり、同じ階
調部分が隣接して表示される場合、ちらついて見えやす
くなるので、第2図に示すよりに すると各フレームにおける点灯の割合は4/4.3/4
.4/4.3/4.4/4.3/4.4/4.3/4と
なり各7レ一ム間での変化がほとんどなくなり、ちらつ
いて見えるのを防げる。
If we put
* 0), the even-odd matrix from frames 1 to 8 is expressed as below, and the lighting ratio in each frame is 4/4.4/4.
.. 2/4.4/4.4/4.4/4.2/4, 4/4
roar 7 ram 3. It changes greatly in frame 7, and if the same gradation parts are displayed next to each other, it will flicker easily, so if we do it as shown in Figure 2, the lighting ratio in each frame will be 4/4.3/4.
.. 4/4.3/4.4/4.3/4.4/4.3/4, so there is almost no change between each of the 7 frames, and flickering can be prevented.

この点滅の信号?与えるのが変換回路lであって、第3
図にその構成図を示す。
This flashing signal? It is the conversion circuit l that gives the third
The configuration diagram is shown in the figure.

8は位相比較回路、9は電圧制御発振回路、 i。8 is a phase comparison circuit, 9 is a voltage controlled oscillation circuit, i.

は分周回路でこの3つの回路によって、表示信号の各ド
ツトに対応した周波数のクロックが得られこのクロック
により反転フリップ70ツブ11 i動かすことによっ
て、偶数列、奇数列が設定できるこれをカラム信号とす
る。
is a frequency dividing circuit. These three circuits provide a clock with a frequency corresponding to each dot of the display signal. By moving the inverting flip 70 knob 11i using this clock, even columns and odd columns can be set. This is used as a column signal. shall be.

又、水平同期信号で反転7リツプ7r:1ツブ12ヲ動
かすことによって、偶数行、奇数行が設定できるこhを
ロウ信号とする。
Further, by moving the inverted 7r lip 7r:1 knob 12 using the horizontal synchronizing signal, even and odd rows can be set.H is used as a low signal.

又、垂直同期信号で3bitカウンタ13を動かすこと
によって、1から8のフレームを、設定できるこitフ
レーム信号とする。
Also, by moving the 3-bit counter 13 with the vertical synchronization signal, frames 1 to 8 are set as a settable frame signal.

このカラム信号、ロウ信号、フレーム信号及び表示信号
工◎〜工3を第4図に示す論理回路で組み立てである論
理回路部力に入力することによって論理演算を行いgg
2図に合った出力が得られる。
Logical operations are performed by inputting these column signals, row signals, frame signals, and display signal circuits ◎ to 3 to the logic circuit section assembled in the logic circuit shown in Figure 4.
Output matching Figure 2 can be obtained.

第5図は1本発明の他の実施列で、第1図で示めされた
実施列の論理回路部6を高速読み出し専用記@素子7(
以下、ROM)に置きかえたもので、ROM7の内容は
第6図に示す。
FIG. 5 shows another implementation column of the present invention, in which the logic circuit section 6 of the implementation column shown in FIG.
The contents of ROM 7 are shown in FIG. 6.

これによって複数の論理回路を使用せずに1個のROM
7で代用できる。
This allows one ROM to be used without using multiple logic circuits.
7 can be substituted.

第7図は本発明の他の実施列で、カラー表示パソコン第
14の赤、緑、青の3色の表示信号を階調に変換する構
成図で、赤を4.緑を2.Wを1の重み付けして階調表
示を行っている。
FIG. 7 is another embodiment of the present invention, and is a block diagram for converting display signals of three colors red, green, and blue into gradations of a color display personal computer No. 14, in which red is converted to gradation. 2. Green. Gradation display is performed by weighting W with 1.

又1本発明の他の実施列で、変換回路lを1通常の白黒
CRTのビデオ入力やCRTの信号で表示可能なKLや
プラズマディスプレイの入力め前に取り付けることによ
って第7図の天施列と間際にカラー表示を階調に変換し
て表示することが可能である。
In another embodiment of the present invention, the conversion circuit l is installed in front of the video input of an ordinary black-and-white CRT, or the input of a KL or plasma display that can display signals from a CRT, thereby achieving the sky arrangement shown in FIG. It is possible to convert the color display to gradation and display it in the near future.

〔発明の効果〕〔Effect of the invention〕

以と、述べたように本発明によれば、2直表示の液晶表
示装置によってN F−J表示が得られ、その階調が、
点滅の頻度知よって決定されるので%階調がはつきりす
るという効果が得られろ。
As described above, according to the present invention, an N F-J display can be obtained using a two-direction liquid crystal display device, and the gradation thereof is as follows.
Since it is determined based on the blinking frequency, the effect of making the % gradation brighter can be obtained.

さらに、表示信号をリアルタイムで点滅のドツトの信号
に変換するので、変換回路1を取シクけるだけで液晶表
示装置のみならずMLやプラズマディスプレイ及びCR
T等のデバイスの階調表示化が容易に行なえる。という
効果t−iする。
Furthermore, since the display signal is converted into a blinking dot signal in real time, just by changing the conversion circuit 1, it can be used not only for liquid crystal displays but also for ML, plasma displays, and CR displays.
Gradation display of devices such as T can be easily performed. The effect is ti.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施列の構成図。 第2図は本発明の点滅パターン図 第3図は実施列の変換回路1の論理回路部6の具体的な
回路列の回路図 第4図は実施列の憂換回路工の回路例の図!5図は高速
読み出しROM7を使った変換回路1の論理回路部の回
路列の図 第6図は高速読み出しROM7のデータ内容の表図 第7図は本発明の他の実施列の図 第8図は従来列の駆動波形図 1:変換回路    2:液晶表示装置3:液晶パネル
   4:駆動工C 5:コントローラエC 6:論理回路部  7:ROM 8:位相比較回路  9:電圧制御発振回路10:分周
回路 11:反転フリップ70ツブ 12:反転フリップフロップ 13 : 3 b i tバイナリカウンタ14;カラ
ー表示パソコン等 15:共通電極信号 t6:信号電極信号で4/8階調の場合17:信号電極
信号で6/81v調の場合以   と 出願人 セイコーエプソン株式会社 第3図 第6図 第7図
FIG. 1 is a block diagram of an embodiment of the present invention. FIG. 2 is a diagram of the blinking pattern of the present invention. FIG. 3 is a circuit diagram of a specific circuit array of the logic circuit unit 6 of the conversion circuit 1 of the implementation array. FIG. 4 is a diagram of an example circuit of the switching circuit of the implementation array. ! FIG. 5 is a diagram of the circuit array of the logic circuit section of the conversion circuit 1 using the high-speed read ROM 7. FIG. 6 is a table diagram of the data contents of the high-speed read ROM 7. FIG. 7 is a diagram of another embodiment of the present invention. 1: Conversion circuit 2: Liquid crystal display 3: Liquid crystal panel 4: Drive C 5: Controller C 6: Logic circuit 7: ROM 8: Phase comparator circuit 9: Voltage controlled oscillation circuit 10 : Frequency divider circuit 11: Inversion flip 70 tube 12: Inversion flip-flop 13: 3 bit binary counter 14; Color display personal computer, etc. 15: Common electrode signal t6: Signal electrode signal in case of 4/8 gradation 17: Signal If the electrode signal is 6/81V, the applicant is Seiko Epson Corporation, Figure 3, Figure 6, Figure 7.

Claims (3)

【特許請求の範囲】[Claims] (1)複数の表示信号に重み付けを行ない、階調表示を
行なうドットマトリクスの液晶表示装置に於いて、表示
の点滅の頻度を変化させて階調を得ることと、前記表示
の点滅の周期の位相を前記液晶表示装置上の表示の位置
によってずらすことと、前記複数の表示信号を重み付け
した後に前記表示の点滅の頻度に変換させ、かつ、該点
滅の周期の位相を前記表示の位置によってずらすように
変換することを特徴とする液晶表示装置。
(1) In a dot matrix liquid crystal display device that performs gradation display by weighting multiple display signals, it is possible to obtain gradations by changing the frequency of blinking of the display, and to change the cycle of the blinking of the display. Shifting the phase depending on the position of the display on the liquid crystal display device, converting the plurality of display signals into a blinking frequency of the display after weighting them, and shifting the phase of the blinking cycle depending on the position of the display. A liquid crystal display device characterized in that it can be converted into a liquid crystal display device.
(2)特許請求の範囲第1項記載の液晶表示装置に於い
て、前記の表示の点滅が、該表示の点滅の周期間で、点
灯の時間が分散し、均一になっていることを特徴とする
液晶表示装置。
(2) In the liquid crystal display device according to claim 1, the blinking of the display is characterized in that the lighting time is dispersed and uniform in the cycle of the blinking of the display. A liquid crystal display device.
(3)特許請求の範囲第1項記載の液晶表示装置に於い
て、前記の表示の点滅の周期の位相が、前記の液晶表示
装置上に表示される位置が奇数行と奇数列の交点、奇数
行と偶数列の交点、偶数行と奇数列の交点、と偶数行と
偶数列の交点の4つの場合によって、ずらしてあること
を特徴とする液晶表示装置。
(3) In the liquid crystal display device according to claim 1, the phase of the blinking cycle of the display is such that the position at which the display is displayed on the liquid crystal display device is an intersection of an odd row and an odd column; A liquid crystal display device characterized in that the display is shifted according to four cases: the intersection of odd rows and even columns, the intersection of even rows and odd columns, and the intersection of even rows and even columns.
JP24380686A 1986-10-14 1986-10-14 Liquid crystal display device Pending JPS6397921A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24380686A JPS6397921A (en) 1986-10-14 1986-10-14 Liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24380686A JPS6397921A (en) 1986-10-14 1986-10-14 Liquid crystal display device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP7246387A Division JPH0876727A (en) 1995-09-25 1995-09-25 Electronic apparatus

Publications (1)

Publication Number Publication Date
JPS6397921A true JPS6397921A (en) 1988-04-28

Family

ID=17109214

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24380686A Pending JPS6397921A (en) 1986-10-14 1986-10-14 Liquid crystal display device

Country Status (1)

Country Link
JP (1) JPS6397921A (en)

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63287828A (en) * 1987-05-20 1988-11-24 Hitachi Ltd Liquid crystal display controller
JPH01225997A (en) * 1988-03-05 1989-09-08 Sharp Corp Gradation displaying system
JPH01267697A (en) * 1988-04-20 1989-10-25 Ascii Corp Color liquid crystal display device
JPH021813A (en) * 1988-06-13 1990-01-08 Ascii Corp Color liquid crystal display device
JPH021812A (en) * 1988-06-13 1990-01-08 Ascii Corp Gradation control method, gradation controller, and multigradational display system
JPH0237389A (en) * 1988-07-27 1990-02-07 Brother Ind Ltd Gradation display controller
JPH0267593A (en) * 1988-09-02 1990-03-07 Seiko Epson Corp Tone display signal generation circuit
JPH032722A (en) * 1989-05-30 1991-01-09 Sharp Corp Driving method for display device
JPH0311393A (en) * 1989-06-08 1991-01-18 Sharp Corp Driving method for color display device
JPH03192389A (en) * 1989-12-22 1991-08-22 Sharp Corp Display device
JPH0784559A (en) * 1993-09-14 1995-03-31 Nec Corp Gradation data generation circuit
JPH07121142A (en) * 1993-10-26 1995-05-12 Nec Corp Gradation data generating circuit
US5552800A (en) * 1990-08-09 1996-09-03 Kabushiki Kaisha Toshiba Color display control apparatus for controlling display gray scale of each scanning frame or each plurality of dots
JPH09244597A (en) * 1995-11-15 1997-09-19 Cirrus Logic Inc Shading controller and shading control method
WO2001059512A1 (en) * 2000-02-10 2001-08-16 Matsushita Electric Industrial Co., Ltd. Display and method for driving the same
JP2005077956A (en) * 2003-09-02 2005-03-24 Ricoh Co Ltd Display unit
JP2017203973A (en) * 2016-05-09 2017-11-16 中華映管股▲ふん▼有限公司 Liquid crystal display device and driving method of the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61205983A (en) * 1985-03-08 1986-09-12 株式会社アスキ− Display controller
JPS6160294B2 (en) * 1981-01-26 1986-12-20 Hitachi Ltd

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6160294B2 (en) * 1981-01-26 1986-12-20 Hitachi Ltd
JPS61205983A (en) * 1985-03-08 1986-09-12 株式会社アスキ− Display controller

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* Cited by examiner, † Cited by third party
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JPS63287828A (en) * 1987-05-20 1988-11-24 Hitachi Ltd Liquid crystal display controller
JPH01225997A (en) * 1988-03-05 1989-09-08 Sharp Corp Gradation displaying system
JPH01267697A (en) * 1988-04-20 1989-10-25 Ascii Corp Color liquid crystal display device
JPH021813A (en) * 1988-06-13 1990-01-08 Ascii Corp Color liquid crystal display device
JPH021812A (en) * 1988-06-13 1990-01-08 Ascii Corp Gradation control method, gradation controller, and multigradational display system
JPH0237389A (en) * 1988-07-27 1990-02-07 Brother Ind Ltd Gradation display controller
JP2572639B2 (en) * 1988-09-02 1997-01-16 セイコーエプソン株式会社 Display control device and display device having the same
JPH0267593A (en) * 1988-09-02 1990-03-07 Seiko Epson Corp Tone display signal generation circuit
JPH032722A (en) * 1989-05-30 1991-01-09 Sharp Corp Driving method for display device
JPH0311393A (en) * 1989-06-08 1991-01-18 Sharp Corp Driving method for color display device
JPH03192389A (en) * 1989-12-22 1991-08-22 Sharp Corp Display device
US5552800A (en) * 1990-08-09 1996-09-03 Kabushiki Kaisha Toshiba Color display control apparatus for controlling display gray scale of each scanning frame or each plurality of dots
JPH0784559A (en) * 1993-09-14 1995-03-31 Nec Corp Gradation data generation circuit
JPH07121142A (en) * 1993-10-26 1995-05-12 Nec Corp Gradation data generating circuit
JPH09244597A (en) * 1995-11-15 1997-09-19 Cirrus Logic Inc Shading controller and shading control method
WO2001059512A1 (en) * 2000-02-10 2001-08-16 Matsushita Electric Industrial Co., Ltd. Display and method for driving the same
JP2005077956A (en) * 2003-09-02 2005-03-24 Ricoh Co Ltd Display unit
JP2017203973A (en) * 2016-05-09 2017-11-16 中華映管股▲ふん▼有限公司 Liquid crystal display device and driving method of the same

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