JPS6395674A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve yield by removing stress difference with a sub strate by the three layer structure of two kinds of insulating films having tensile stress and compressive stress on the substrate and inhibiting the fluctuation of the drain currents, threshold voltage and drain breakdown strength of an FET formed onto the substrate. CONSTITUTION:GaAsFETs 2, 2' are shaped onto a substrate 1, and the film thickness of source electrodes 4, 4', drain electrodes 5, 5' and gate electrodes 6, 6' is isolated by an silicon oxide film 3. A plasma CVDSiN film 8 as a first layer is deposited onto the GaAs substrate, a CVDSiO2 film 9 as a second layer is deposited onto the first layer, and a plasma CVDSiN film 10 as a third layer is deposited onto the second layer. Contact holes 11 for wiring are formed through photoetching, and the source electrodes for the FETs are wired 12 through a photolithographic technique and a plating technique. Tensile stress works on the GaAs substrate in the CVDSiN film, and compressive stress operates on the CVDSiO2 film.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method of manufacturing a semiconductor device having an interlayer insulating film.

BACKGROUND ART Conventionally, interlayer insulating films used for wiring between FITs (field effect transistors) are polyimide-based organic insulating films, 5i02. A silicon-based insulating film such as SiN is used alone.

Problems to be Solved by the Invention Conventionally, when an organic insulating film or a silicon-based insulating film was used alone as an interlayer insulating film, the drain current, threshold voltage, and drain breakdown voltage of the FET deteriorated due to the stress difference between the two substrates. This poses a problem of lowering the yield of ICs.

Means for solving the problem In order to solve the above problem, the difference in stress between the substrate and the substrate can be eliminated by forming a three-layer structure for each substrate, consisting of an insulating film with tensile stress and an insulating film with compressive stress. do.

Due to the three-layer structure of two types of insulating films that have tensile stress and compressive stress on the working substrate, there is no stress difference between the substrate and the drain current, threshold voltage, and drain breakdown voltage of the FET formed on the substrate. Fluctuations are suppressed and yields are significantly improved.

EXAMPLE 5 An example of the present invention will be described below using GaAsFXT as an example.

FIG. 1 shows an embodiment of the present invention. In Figure 1 a, e
G&λ5FET 2 on ars semi-insulating substrate 1.

2' are formed, a source electrode 4.4', a drain electrode 5
．． 5' and gate electrodes 6 and 6' are separated by a silicon oxide film 3 having a thickness of 4000 nm.

In Fig. 2, a first layer of plasma CVD 5iN film 8 is deposited at 300'C on the GaAs substrate on which the FIT is formed.
The 24th (D CVD5i02 film 9 was deposited on the 1st layer at 300°C.
1000 people were deposited at a deposition rate of 100 people/win, and a third layer of plasma CVD 5iN film 1o was deposited on the second layer.
At 00°C, 600 people are deposited at a deposition rate of 200 people/win. Contact hole 1 for wiring in Figure 1e
1 is formed by photo-etching.

In Fig. 1d, F is
Wiring 12 between the source electrodes of ET is performed.

This method uses a plasma CVD 5iN film 8/
By using the three-layer structure of CVD5iN film 9/plasma CVD film 10 (7), stress relaxation between the substrates is achieved. Since tensile stress acts on the plasma CVD 5iN film on the GaAs substrate, and compressive stress acts on the CVDSiO2 film, the stress of the interlayer insulating film on the GaAs substrate can be alleviated by adjusting the thickness of both films. By having a three-layer structure, the first layer of plasma CVD5iN film is used as the inter-electrode separation film, CVD5iO, the stress between the film and the electrode is relaxed, the second layer of CVD5iO2 film, and the third layer of plasma CVD5iN film. This can alleviate the stress difference between the G4 and S substrates. Second
The figure shows a plasma CVD 5iN film on a GaAs substrate and a C
It shows the internal stress with respect to the film thickness of the VD5iO2 film. It can be seen that there is a proportional relationship between the film thickness and the stress difference between the substrate and the film thickness. In this example, when the total stress is calculated, the CVD5i02 film is 4ooO
1000 people is enough.

Russ? Since the CVD5iN film has 1000 people and 5QOO people, from Figure 2 it is 0.5 x 109dyn / (J
It can be seen that the compressive stress is stable for the GaAs substrate.

Figure 3 shows the first layer of plasma CVD 5iN film.
・People, 2nd layer (7) CVD5i02 film 1000
The graph shows the change in drain breakdown voltage of GaAsFXT when fixed with a person and the thickness of the third layer plasma CVD 5iN film is changed. It can be seen from FIG. 3 that the drain breakdown voltage is maximized when the thickness of the third layer plasma CVD 8il film is 60 μm.

Note that the substrate is not limited to a GaAs substrate, but may be any compound semiconductor such as InP or Zn5a. In addition, the 1st and 3rd layer insulation film and the 2nd layer insulation film are plasma CVD 5iN film and CVDS film.
Not limited to iO2 film, TiN, A6N nano-substrate IC
On the other hand, any insulating film having tensile stress or compressive stress may be used.

Effects of the Invention As described above, according to the present invention, the three-layer structure of two types of insulating films that have tensile stress and compressive stress on the substrate eliminates the stress difference between the substrate and the FRT formed on the substrate. Fluctuations in drain current, threshold voltage, and drain breakdown voltage were suppressed, and yields were significantly improved.

[Brief explanation of the drawing]

FIG. 1 is a process cross-sectional view showing the wiring process between GaAsFICT in one embodiment of the present invention, and FIG. 2 is a plasma CVD
Film thickness of 5iN film and CVD 5iO2 film K vs. GaA
A characteristic diagram showing the stress difference with the s-substrate, Figure 3 shows the characteristics of GaAsF when the film thickness of the third layer plasma CVD 5iN film is changed.
FIG. 3 is a characteristic diagram showing variations in drain breakdown voltage of IET. 1...GaAs semi-insulating substrate, 2.2'...
...GaAsFICT, 3, 3', --...-
・CVD5iO□ film 4, 4/... Source electrode, 5.5'... Drain electrode, 6°6'
... Gate electrode, 8 ... First layer plasma CVD 5iN film, 9 ... Second layer CVD 5
i02 film, 10...3rd layer plasma CVD
5 iN film, 11...contact hole, 12
······wiring. Name of agent: Patent attorney Toshio Nakao and 1 other person 2nd
Figure;

Claims (2)

[Claims] (1) A plurality of field effect transistors are formed on one principal surface of a semiconductor substrate, and when wiring a source electrode, a drain electrode, and a gate electrode of each of the plurality of field effect transistors, forming a first insulating film on one main surface of the semiconductor substrate;
forming a second insulating film having a composition different from that of the first insulating film on the first insulating film; and forming a third insulating film having the same composition as the first insulating film on the second insulating film. a step of forming an insulating film, and a source electrode of the field effect transistor;
The method includes the steps of photoetching the first, second, and third insulating films on the drain electrode and gate electrode, and forming the source electrode, drain electrode, and gate electrode of each of the plurality of field effect transistors. A method for manufacturing a semiconductor device. (2) Claims in which the relationship between the first and third insulating films and the second insulating film is that the insulating film has internal stress that is opposite to the tensile stress and the compressive stress or the compressive stress and the tensile stress with respect to the semiconductor substrate. 2. A method for manufacturing a semiconductor device according to item 1.