JPS63261420A - Digital comparator - Google Patents

Abstract

PURPOSE:To omit external parts such as a switch, a pull-up resistor, etc., by connecting an FF as the post stage of an input buffer for comparing/data to be compared and inputting the comparing data and data to be compared through the same input pin. CONSTITUTION:Comparing data reached to the FF 23 through the input pin 21 for comparing/data to be compared and an input buffer 22 are stored in the FF 23 synchronously with a trigger signal inputted through a trigger input pin 24 and an input buffer 25. When data to be compared are inputted through the pin 21 and the buffer 22, the data to be compared are compared with the comparing data previously stored in the FF 23 by comparators 5, 6. The compared result of coincidence or discrepancy between the comparing data and the data to be compared is outputted to an output pin 7. In said constitution, the number of input data pins can be reduced to a half and external parts such as a pull-up resistor and a switch can be omitted.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital comparator for semiconductor integrated circuits.

[Conventional technology]

Figure 3 shows, for example, Mitsubishi Semiconductor Bipolar Digital IC Data Book 85th Edition LSTTL! P, 2-465~46
8 is a circuit diagram showing a conventional comparator, and in the figure, 1 is an input pin for comparison data, 2 is an input pin for compared data, 3 is an input buffer for comparison data with nihysteresis II, and 4 is the same. 5 and 6 are comparison circuits, and 7 is an output pin.

Next, the operation will be explained. First, compare two sets of n
When comparison inputs are applied to input pin 1 of bit binary comparison data and input pin 2 of compared data, the output of Dekabi/7 is (input pin 1 of comparison data) = (input pin 2 of compared data) ) becomes the “L” level,
When the above signal status is large or small,
Become H Lebel. That is, as a result of comparing the signal levels applied to both input bins 1.2, it can be determined by the output/7 whether the comparison data and the compared data match and are friends.

Fig. 1 shows a specific example of a digital comparator, and generally, in the case of switch input,
In order to stabilize the signal level of the input buffer, the pull-up resistor Rt is connected as shown.

[Problem that the invention seeks to solve]

Conventional digital comparators are configured as above, so even for 8-bit comparison, for example, all 16 input bins are required.Furthermore, when the comparison input is constant, a resistor or switch is used on the input pin t. There was a problem that the level had to be fixed.

This invention was made as a companion to the above-mentioned problems by configuring a circuit so that the comparison data input bin and the compared data input pin can be input in the same bin, and using switches and pull-up resistors. The purpose of this invention is to obtain a digital comparator that does not require external components such as a comparator.

[Means for solving problems]

The digital comparator according to the present invention has a built-in flip-flop for each bit in order to store comparison data.

[Effect]

In the digital comparator of the present invention, seven lip-flops are provided after the input buffers for the comparison data and the data to be compared, so that the data to be compared and the data to be compared can be inputted in the same bin.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, in which the same parts as in FIG. A flip-flop to store all comparison data,
24, a trigger input bin for the flip-flop 23;
25 is an input (second) buffer of the trigger input bin 24, and 5H (first) comparator circuit.
R). 6 is a (second) comparison circuit, which in this embodiment is composed of, for example, a S/D circuit (NAND).

Next, the operation will be explained. First, the comparison data and compared data pass through the input pin 21 and the (117th) input buffer 22 to reach the flip-flop 23, and the comparison data is input through the trigger input bin 24 and the (second) input buffer 25. The data is stored in the flip-flop 23 in synchronization with the trigger signal generated.

Next, when the compared data is inputted through the input pin 21 and the (first) input buffer 22t for comparison data and compared data, the comparing circuits 5 and 6 compare the data stored in the flip-flop 23 in advance. A comparison is made with the data, and the result of whether or not the comparison data matches the compared data is outputted to the output bin 7, just like the conventional digital comparator function.

In the above embodiment, the comparator circuit 5, 6t-2 is composed of a human-powered exclusive NOR circuit (EX-NOR) and a multi-input NAND circuit (NAND), but in another embodiment of FIG. Exclusive or circuit (EX-
An effect similar to that of the above embodiment can be obtained even if it is configured with an open collector (OR) and a WIRED-AND circuit.

〔Effect of the invention〕

As described above, according to the present invention, the comparison data is stored in advance in the internal lip-flop, and the circuit is configured so that the comparison data and the compared data are input from the same bin, so that the number of input data bins is halved. In addition, external components such as pull-up resistors and switches are no longer required, and, for example, with conventional digital =ry parators, the limit was 8-bit comparison with a 20-bin IC, but with this invention, 16-bit comparison is possible. )
This has the effect of making it possible to configure a comparator in 1.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of a digital comparator according to one embodiment of the present invention, Fig. 2 is a circuit diagram showing another embodiment of the invention, Fig. 3 is a circuit diagram of a conventional digital comparator, and Fig. 4 is a circuit diagram of a conventional digital comparator. 1 is a circuit diagram showing an embodiment of a conventional digital comparator. In the figure, 5 and 6 are first and second comparison circuits, 7 is an output pin, 21 is an input bin for comparison data and compared data, 24 is a trigger input pin, and 22.25u buffers. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] In a digital comparator that compares n-bit binary numbers of comparison data and compared data and outputs the result to an output pin, the input pins of the comparison data and the compared data are configured with the same pins, respectively, and the input pins are configured as input pins. 1 input buffer, a bit-by-bit flip-flop provided after the first input buffer and having one input as the output signal of the first input buffer, and a second flip-flop as the other input signal of the flip-flop. A trigger input pin inputted via an input buffer, and an output pin used as an output signal of a comparison circuit whose input signals are the output of the flip-flop and the output of the first input buffer. Digital comparator.