JPS63187694A - Method of forming through-hole board - Google Patents
Method of forming through-hole boardInfo
- Publication number
- JPS63187694A JPS63187694A JP1999487A JP1999487A JPS63187694A JP S63187694 A JPS63187694 A JP S63187694A JP 1999487 A JP1999487 A JP 1999487A JP 1999487 A JP1999487 A JP 1999487A JP S63187694 A JPS63187694 A JP S63187694A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- layer
- circuit pattern
- forming
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title description 17
- 239000000758 substrate Substances 0.000 claims description 34
- 239000003973 paint Substances 0.000 claims description 30
- 238000004070 electrodeposition Methods 0.000 claims description 26
- 238000007747 plating Methods 0.000 claims description 12
- 239000007864 aqueous solution Substances 0.000 claims description 10
- 239000003960 organic solvent Substances 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 238000005530 etching Methods 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 48
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 13
- 229910052802 copper Inorganic materials 0.000 description 7
- 239000010949 copper Substances 0.000 description 7
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 6
- 239000011889 copper foil Substances 0.000 description 5
- YMWUJEATGCHHMB-UHFFFAOYSA-N Dichloromethane Chemical compound ClCCl YMWUJEATGCHHMB-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 2
- 229920000877 Melamine resin Polymers 0.000 description 2
- 229920000180 alkyd Polymers 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 239000011247 coating layer Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 description 2
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- JDSHMPZPIAZGSV-UHFFFAOYSA-N melamine Chemical compound NC1=NC(N)=NC(N)=N1 JDSHMPZPIAZGSV-UHFFFAOYSA-N 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 239000005062 Polybutadiene Substances 0.000 description 1
- 238000010306 acid treatment Methods 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 229910000365 copper sulfate Inorganic materials 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
- 229960003280 cupric chloride Drugs 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229920002857 polybutadiene Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、スルーホールを有した印刷配線基板、いわゆ
るスルーホール基板の形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming a printed wiring board having through holes, a so-called through hole board.
本発明は、スルーホール基板の形成方法において、スル
ーホールを形成しスルーホールメッキを施して後、基板
表面に回路パターンの逆パターンをもってアルカリ可溶
性のレジスト層を形成し、次で回路パターンに対応する
パターンに沿って有1a溶剤可溶性の電着塗料層を形成
し、レジスト層をアルカリ水溶液にて除去して、電着塗
料層をマスクに基板表面の金属層をエツチングして回路
パターンを形成し、しかる後有機溶剤にて電着塗料層を
除去することによって、微細回路パターンを有するスル
ーホール基板を歩留り良く得るようにしたものである。The present invention is a method for forming a through-hole board, in which after forming through-holes and performing through-hole plating, an alkali-soluble resist layer is formed on the surface of the board with a pattern opposite to the circuit pattern, and then a resist layer corresponding to the circuit pattern is formed on the surface of the board. A 1A solvent-soluble electrodeposition paint layer is formed along the pattern, the resist layer is removed with an alkaline aqueous solution, and the metal layer on the substrate surface is etched using the electrodeposition paint layer as a mask to form a circuit pattern. Thereafter, by removing the electrodeposition paint layer using an organic solvent, a through-hole substrate having a fine circuit pattern can be obtained with a high yield.
第3図は従来のスルーホール基板の形成方法の例を示す
。FIG. 3 shows an example of a conventional method for forming a through-hole substrate.
これは、例えば絶縁基板(1)の両面に銅7F3(2)
が被着された所謂両面銅張り基板(3)を用意し、この
基板(3)の所要位置にスルーホール(4)を形成する
(第3図A)。For example, copper 7F3 (2) is placed on both sides of the insulating substrate (1).
A so-called double-sided copper-clad substrate (3) having a copper-clad substrate (3) adhered thereto is prepared, and through holes (4) are formed at required positions on this substrate (3) (FIG. 3A).
次に、スルーホールメッキ即ち銅メツキ(5)を施して
後(第3図B)、基板(3)の両面に回路パターンの逆
パターンをもってアルカリ可溶性型のレジスト層(6)
を印刷する(第3図C)。次に、スルーホール(4)を
含んで基板(3)表面に回路パターンに対応したパター
ンのアルカリ可溶性の電着塗料(7)を形成する(第3
図D)。次にアルカリ水溶液でレジスト層(6)を除去
し、電着塗料(7)をマスクに例えば塩化第2鉄液にて
銅メッキ(5)及び銅箔(2)をエツチングして回路パ
ターン(8)を形成する(第3図E)。Next, after performing through-hole plating, that is, copper plating (5) (Fig. 3B), an alkali-soluble resist layer (6) is formed on both sides of the board (3) with a pattern opposite to the circuit pattern.
(Figure 3C). Next, an alkali-soluble electrodeposition paint (7) is formed on the surface of the substrate (3) including the through holes (4) in a pattern corresponding to the circuit pattern (third
Figure D). Next, the resist layer (6) is removed with an alkaline aqueous solution, and the copper plating (5) and copper foil (2) are etched with a ferric chloride solution using the electrodeposition paint (7) as a mask to form a circuit pattern (8). ) (Fig. 3E).
次で回路パターン(3)上の電着塗$4 (7+を添加
剤を含むアルカリ水溶液にて剥離する。これによって、
゛所定回路パターン(8)が形成されたスルーホール基
板(9)が得られる(第3図F)。Next, remove the electrodeposited coating $4 (7+) on the circuit pattern (3) with an alkaline aqueous solution containing additives.
A through-hole substrate (9) on which a predetermined circuit pattern (8) is formed is obtained (FIG. 3F).
上述の従来のスルーホール基板形成方法においては、電
着塗料(7)としてアルカリ可溶性のものを使用してい
るために、第3図りの工程後、レジスト層(6)をアル
カリ水溶液にて除去する際に細いパターンの電着塗料(
7)を正常に残すことが難かしく、従って粗い回路パタ
ーンしか形成できなかった。In the conventional through-hole substrate forming method described above, since an alkali-soluble electrodeposition paint (7) is used, the resist layer (6) is removed with an alkaline aqueous solution after the third step. Electrodeposition paint with a very thin pattern (
7) was difficult to leave normally, and therefore only a rough circuit pattern could be formed.
本発明は、上述の点に鑑み、微細な回路パターンを存す
るスルーホール基板を形成することができるスルーホー
ル基板の形成方法を提供するものである。In view of the above-mentioned points, the present invention provides a method for forming a through-hole substrate that can form a through-hole substrate having a fine circuit pattern.
本発明は、
a 例えば、両面銅張基板のような両面に金属層(2)
を有する基板(3)にスルーホール(4)を形成する工
程、
b スルーホールメッキ(5)を行う工程、C基板(3
)表面に、形成すべき回路パターンの逆パターンを有す
るアルカリ可溶性のレジスト層(6)を形成する工程、
d 基板表面のレジスト層(6)に覆われない回路パタ
ーンに対応するパターン上に有機溶剤可溶性の電着塗料
層(7)を形成する工程、
e アルカリ水溶液にてレジスト層1′6)を除去する
工程、
f 電着塗料層(7)をマスクに金属層(2)をエツチ
ングして回路パターン(8)を形成する工程、g 電着
塗料層(7)を有m溶剤にて除去する工程、を有するこ
とを特徴とする。The present invention provides: a metal layer (2) on both sides, for example, a double-sided copper-clad board;
a step of forming through holes (4) on a substrate (3) having
) Forming on the surface an alkali-soluble resist layer (6) having a pattern opposite to the circuit pattern to be formed; d) Applying an organic solvent on the pattern corresponding to the circuit pattern not covered by the resist layer (6) on the substrate surface. Step of forming a soluble electrodeposited paint layer (7), e Step of removing the resist layer 1'6) with an alkaline aqueous solution, f Etching the metal layer (2) using the electrodeposited paint layer (7) as a mask. The method is characterized by comprising a step of forming a circuit pattern (8), and a step of removing the electrodeposition paint layer (7) with a solvent.
前記工程(d)において、有機溶剤可溶性の電着塗料N
(7)を形成することによって、次の工程(e)でレジ
スト層(6)をアルカリ水溶液にて除去する際、回路パ
ターンに対応した電@塗料層(7)を世傷させずに正常
に残した状態でレジスト層(6)のみが除去される。In the step (d), organic solvent soluble electrodeposition paint N
By forming (7), when the resist layer (6) is removed with an alkaline aqueous solution in the next step (e), the electrical paint layer (7) corresponding to the circuit pattern can be removed normally without being damaged. Only the resist layer (6) is removed while remaining.
即ちレジスト層(6)と電着塗料層(7)との耐溶解性
が大きく異なり、微細パターンに電着塗料層(7)を形
成した場合にもこれをレジスト層(6)の除去時に確実
に残すことができる。In other words, the dissolution resistance of the resist layer (6) and the electrodeposition paint layer (7) is greatly different, and even when the electrodeposition paint layer (7) is formed in a fine pattern, it is necessary to ensure that this is maintained when removing the resist layer (6). can be left in.
よって、微細回路パターンを有し高密度化されたスルー
ホール基板の形成に対応できる。Therefore, it is possible to correspond to the formation of a high-density through-hole substrate having a fine circuit pattern.
以下、図面を参照して本発明によるスルーホール基板の
形成方法の実施例を説明する。Hereinafter, embodiments of a method for forming a through-hole substrate according to the present invention will be described with reference to the drawings.
実施例1
先ず、絶縁基板αυの両面に銅箔021を被着したいわ
ゆる両面銅張り基板Q31を用意し、基板0争の所要部
分にスルーホール04]を形成する(第1図へ)。Embodiment 1 First, a so-called double-sided copper-clad board Q31 in which copper foil 021 is coated on both sides of an insulating substrate αυ is prepared, and through holes 04 are formed in required portions of the board (see FIG. 1).
次に、無電界メッキを施して後パネルメッキ(メッキ厚
10〜30μm)を施してスルーホールC141内を含
めた基板α濁の表面に銅メッキ眉09を形成する(第1
図B)。次に、基板01の表面にアルカリ可溶性型の感
光性ドライフィルム(例えばPIIT −865AF
1−50日立化成社製)をラミネートし、成形すべき回
路パターンの逆パターン(ネガパターン)に露光し、現
像して逆パターンのレジスト層α5)を形成する(第1
図C)。Next, electroless plating is performed, followed by post-panel plating (plating thickness 10 to 30 μm) to form copper plating 09 on the surface of the substrate α including the inside of through hole C141 (first
Figure B). Next, the surface of the substrate 01 is coated with an alkali-soluble photosensitive dry film (for example, PIIT-865AF).
1-50 (manufactured by Hitachi Chemical Co., Ltd.) is laminated, exposed to a reverse pattern (negative pattern) of the circuit pattern to be molded, and developed to form a resist layer α5) with a reverse pattern (first
Figure C).
次に、このレジスト層Q61をマスクにしてスルーホー
ルa船内を含めた基板Q31の表面に有機溶剤可溶性型
の電着塗料層0ηを被着形成する。即ち、この電着塗料
層07)はレジスト層0e以外の回路パターンに対応し
たパターン上に被着形成される(第1図D)。ここで、
有機溶剤可溶性型電着塗料としては、例えばアルキド系
、エポキシ系、アクリル系、マレイン化油系、メラミン
系、ポリブタジェン系、ポリエステル系、フェノール系
、メラミンアルキド系等の樹脂を用いることができる。Next, using this resist layer Q61 as a mask, an organic solvent-soluble electrodeposition paint layer 0η is formed on the surface of the substrate Q31 including the inside of the through hole a. That is, this electrodeposition paint layer 07) is formed on a pattern corresponding to a circuit pattern other than the resist layer 0e (FIG. 1D). here,
As the organic solvent-soluble electrodeposition coating, resins such as alkyd, epoxy, acrylic, maleated oil, melamine, polybutadiene, polyester, phenol, and melamine alkyd can be used.
次に、レジスト層αυを3%の水酸化ナトリウム水溶液
で除去しく第1図E)、次で電着塗料層0′71をマス
クに塩化第2銅液にて銅メッキ層09及び銅箔Q21を
選択エツチングし、回路パターン0鴫を形成する(第1
図F)。しかる後、有機溶剤(例えば塩化メチレン等)
にて電着塗料層ODを除去し、目的のランドレススルー
ホール基板(半田付けに供するランド部のないスルーホ
ールを存する基板)0ωを得る(第1図G)。Next, the resist layer αυ is removed with a 3% sodium hydroxide aqueous solution (Fig. 1E), and then the copper plating layer 09 and the copper foil Q21 are removed using a cupric chloride solution using the electrodeposition paint layer 0'71 as a mask. is selectively etched to form a circuit pattern 0 (first
Figure F). After that, organic solvent (e.g. methylene chloride etc.)
The electrodeposited paint layer OD is removed to obtain the desired landless through-hole substrate (a substrate having through-holes without land portions for soldering) 0ω (FIG. 1G).
この例ではパターン幅が80μmの回路パターンを歩留
り良く製作することができた。In this example, a circuit pattern with a pattern width of 80 μm could be manufactured with good yield.
なお比較例として、第1図りの工程でアルカリ可溶性型
の電着塗料を使用した場合には回路パターンとしてパタ
ーン幅300μmまでしか歩留り良く製作することがで
きなかった。As a comparative example, when an alkali-soluble electrodeposition paint was used in the first drawing process, circuit patterns up to a pattern width of 300 μm could be produced with good yield.
実施例2
内層回路パターン(21)を予め形成した多層基板用の
両面銅張り基板(22)を用意し、基板(22)の所要
部分にスルーホール00を形成する(第2図A)。Example 2 A double-sided copper-clad board (22) for a multilayer board on which an inner layer circuit pattern (21) has been formed in advance is prepared, and through holes 00 are formed in required portions of the board (22) (FIG. 2A).
次に厚さ0.5〜3μmの銅無電解メッキ(23)を施
しく第2図B)、次で基板輯2)の表面にアルカリ可溶
性型の感光性ドライフィルム(例えばpl+r−865
AFT −50日立化成社製)をラミネートし、形成す
べき回路パターンの逆パターン(ネガパターン)に露光
し、現像して逆パターンのレジスト層Qυを形成する(
第2図C)。次に酸処理後、厚さ10〜40μm程度の
硫酸銅メッキ(24)を行い(第2図D)、しかる後、
レジストN0119をマスクにスルーホールメンキ層を
含めた基板(22)の表面に有機溶剤可溶性型の電着塗
料層αηを被着形成する(第2図E)。次に、レジスト
層061を5%の水酸化ナトリウム水溶液で除去しく第
2図F)、次で電着塗料層αηをマスクに塩化第2鉄液
にて銅メッキ層(23)。Next, electroless copper plating (23) with a thickness of 0.5 to 3 μm is applied (Fig. 2B), and then an alkali-soluble photosensitive dry film (for example, PL+R-865) is applied to the surface of the substrate 2).
AFT-50 manufactured by Hitachi Chemical Co., Ltd.) is laminated, exposed to a reverse pattern (negative pattern) of the circuit pattern to be formed, and developed to form a resist layer Qυ of the reverse pattern (
Figure 2C). Next, after acid treatment, copper sulfate plating (24) with a thickness of about 10 to 40 μm is performed (Fig. 2D), and after that,
Using resist N0119 as a mask, an organic solvent-soluble electrodeposition paint layer αη is formed on the surface of the substrate (22) including the through-hole coating layer (FIG. 2E). Next, the resist layer 061 is removed with a 5% sodium hydroxide aqueous solution (FIG. 2F), and then a copper plating layer (23) is formed using a ferric chloride solution using the electrodeposition paint layer αη as a mask.
(24)及び銅箔(転)を選択・エツチングし、回路パ
ターン081を形成する(第2図G)。しかる後、有機
溶剤にて電着塗料層α7)を除去して目的の多層配線の
ランドレススルーホール基板(2)を得る(第2図H)
。(24) and copper foil are selected and etched to form a circuit pattern 081 (FIG. 2G). Thereafter, the electrodeposition paint layer α7) is removed using an organic solvent to obtain the desired landless through-hole board (2) with multilayer wiring (Fig. 2H).
.
この例ではパターン幅が60μmの回路パターンを歩留
り良く製作することができた。In this example, a circuit pattern with a pattern width of 60 μm could be manufactured with good yield.
なお比較例として、第2図Eの工程でアルカリ可溶性型
の電着塗料を使用した場合には回路パターンとして20
0μmのパターン幅までしか歩留り良く製作することが
できなかった。As a comparative example, when an alkali-soluble electrodeposition paint is used in the process shown in Fig. 2E, the circuit pattern is 20%.
It was possible to manufacture patterns with a good yield only up to a pattern width of 0 μm.
尚、各実施例1.2は逆パターンのレジスト層αQを写
真法で形成したが、印刷法で形成することもできる。In each of Examples 1 and 2, the resist layer αQ having a reverse pattern was formed by a photographic method, but it can also be formed by a printing method.
又、上側ではランドレススルーホール基板の形成に適用
したが、スルーホールメンキ層に連続してランド部を有
するスルーホール基板の形成にも適用できる。Moreover, although the above method is applied to the formation of a landless through-hole substrate, it can also be applied to the formation of a through-hole substrate having a land portion continuous to the through-hole coating layer.
本発明によれば、スルーホールを形成した両面導電層を
存する基板の表面に回路パターンの逆パターンのアルカ
リ可溶性型レジス+−IEIを形成して後、特にエツチ
ングレジストとなる有機溶剤可溶性型の電着塗料層を形
成することにより、その後、レジストaをアルカリ水溶
液で溶解除去する際、電着塗料層が損傷を受けることが
なく正常に残る。According to the present invention, after forming an alkali-soluble type resist +-IEI with an inverse pattern of a circuit pattern on the surface of a substrate having a double-sided conductive layer with through holes formed therein, an organic solvent-soluble type resist which becomes an etching resist is formed. By forming the electrodeposited paint layer, when the resist a is subsequently dissolved and removed with an alkaline aqueous solution, the electrodeposition paint layer remains intact without being damaged.
このため、この電着塗料層は微細パターンのエツチング
レジストとして好適になる。従って、微細回路パターン
を有し、高密度化したスルーホール基板を容易且つ安価
に提供することができる。Therefore, this electrodeposition paint layer is suitable as an etching resist for fine patterns. Therefore, a high-density through-hole substrate having a fine circuit pattern can be provided easily and inexpensively.
第1図A−Gは本発明のスルーホール基板の形成方法の
一実施例を示す工程図、第2図A −Hは本発明のスル
ーホール基板の形成方法の他の実施例を示す工程図、第
3図A−Fは従来のスルーホール基板の形成方法の例を
示す工程図である。
0υは絶縁基板、αZは銅箔、α覆は両面銅張り基板、
α船はスルーホール、Q61はアルカリ可溶性のレジス
ト層、Q7+は有機溶剤可溶性の電着塗料層、0匂は回
路パターンである。FIGS. 1A-G are process diagrams showing one embodiment of the method for forming a through-hole substrate of the present invention, and FIGS. 2A-H are process diagrams showing another embodiment of the method for forming a through-hole substrate of the present invention. , FIGS. 3A to 3F are process diagrams showing an example of a conventional method for forming a through-hole substrate. 0υ is an insulated board, αZ is a copper foil, α-cover is a double-sided copper-clad board,
The α ship is a through hole, Q61 is an alkali-soluble resist layer, Q7+ is an organic solvent-soluble electrodeposition paint layer, and 0 is a circuit pattern.
Claims (1)
工程、 b スルーホールメッキを行う工程、 c 上記基板表面に形成すべき回路パターンの逆パター
ンを有するアルカリ可溶性のレジスト層を形成する工程
、 d 上記基板表面の上記回路パターンに対応するパター
ン上に有機溶剤可溶性の電着塗料層を形成する工程、 e アルカリ水溶液にて上記レジスト層を除去する工程
、 f 上記電着塗料層をマスクに上記金属層をエッチング
して回路パターンを形成する工程、 g 上記電着塗料層を有機溶剤にて除去する工程を有す
るスルーホール基板の形成方法。[Claims] a. A step of forming through holes on a substrate having metal layers on both sides; b. A step of plating the through holes; c. A step of forming an alkali-soluble resist layer having a pattern opposite to the circuit pattern to be formed on the surface of the substrate. d) forming an organic solvent-soluble electrodeposition paint layer on a pattern corresponding to the circuit pattern on the surface of the substrate; e) removing the resist layer with an alkaline aqueous solution; f) the electrodeposition paint layer. a step of etching the metal layer using a mask to form a circuit pattern; g. a step of removing the electrodeposition paint layer with an organic solvent.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1999487A JPS63187694A (en) | 1987-01-30 | 1987-01-30 | Method of forming through-hole board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1999487A JPS63187694A (en) | 1987-01-30 | 1987-01-30 | Method of forming through-hole board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63187694A true JPS63187694A (en) | 1988-08-03 |
Family
ID=12014714
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1999487A Pending JPS63187694A (en) | 1987-01-30 | 1987-01-30 | Method of forming through-hole board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63187694A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02130968A (en) * | 1988-11-11 | 1990-05-18 | Fuji Photo Film Co Ltd | Pattern formation of superconducting material |
-
1987
- 1987-01-30 JP JP1999487A patent/JPS63187694A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02130968A (en) * | 1988-11-11 | 1990-05-18 | Fuji Photo Film Co Ltd | Pattern formation of superconducting material |
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