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JPS5939094A - Method of producing printed board - Google Patents

Method of producing printed board

Info

Publication number
JPS5939094A
JPS5939094A JP14763182A JP14763182A JPS5939094A JP S5939094 A JPS5939094 A JP S5939094A JP 14763182 A JP14763182 A JP 14763182A JP 14763182 A JP14763182 A JP 14763182A JP S5939094 A JPS5939094 A JP S5939094A
Authority
JP
Japan
Prior art keywords
printed circuit
circuit board
solder
resist
plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14763182A
Other languages
Japanese (ja)
Inventor
広田 政巳
鳥羽 律司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14763182A priority Critical patent/JPS5939094A/en
Publication of JPS5939094A publication Critical patent/JPS5939094A/en
Pending legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 発明の対象 本発明はプリント基板の製造方法に係り、If¥にプリ
ント基板の部品搭載パターンを形成する方法に関する。
DETAILED DESCRIPTION OF THE INVENTION Object of the Invention The present invention relates to a method of manufacturing a printed circuit board, and more particularly to a method of forming a component mounting pattern of a printed circuit board in If\.

従来技術 近年の電子機器の発展に伴い、プリント基・板の高密度
化が進んでいる。特にプリント基板へ搭載される部品は
、従来アキシャル部品が主流であったが、プリント基板
の高密度化とともにフラノ)バック部品の使用が増々高
まり、最近では同一プリント基板上にアキシャル部品と
フジットバック部品の混在するものが主流となりつつあ
る。ここで従来知られているプリント基板の製造方法を
図面を参照しつつ説明する。なおここでいうプリント基
板にれL銅張りの積層板をも含めるものとする。
BACKGROUND OF THE INVENTION With the recent development of electronic devices, the density of printed circuit boards and circuit boards has been increasing. In particular, axial components have traditionally been the mainstream for components mounted on printed circuit boards, but with the increasing density of printed circuit boards, the use of flannel back components has increased, and recently axial components and fugit back components have been mounted on the same printed circuit board. Mixed products are becoming mainstream. Here, a conventionally known method for manufacturing a printed circuit board will be explained with reference to the drawings. Note that the printed circuit board referred to herein also includes a copper-clad laminate.

最初に通常の半田めっきスルーホールプリント基板の製
造方法について説明する。第1図はこの方法によりプリ
ント基板が製造されていく様子を該基板の断面図で示す
ものである。
First, a method for manufacturing a normal solder-plated through-hole printed circuit board will be explained. FIG. 1 is a sectional view of a printed circuit board showing how the printed circuit board is manufactured by this method.

プリント基板1に必要な孔3すなわちスルーホールを所
定の位置にあけ、これに活性化処理を施L7、無?I解
めっきを行ない、更に電解銅めつき4を行うことによっ
て両面の銅箔2を孔3の内部の導通層5により導通させ
る。次にシルクスクリーン法、写真焼伺法等により、所
定のパターンを残し、他の部分をレジスト6によ」フ覆
う。さらにレジスト6によυ覆われていない部分に半田
めつき7をMr41〜、レンスト6を剥した後、エツチ
ング処理を行ない、不必要な鋼部を溶解除去し、かかる
後熱処理によυ半田のオーバーハング除去を行ない、所
定のパターンを形成する。
A necessary hole 3, that is, a through hole, is drilled in a predetermined position in the printed circuit board 1, and an activation process is performed on it. By performing I plating and further performing electrolytic copper plating 4, the copper foils 2 on both sides are electrically connected through the conductive layer 5 inside the hole 3. Next, a predetermined pattern is left by a silk screen method, a photoprint method, etc., and other parts are covered with a resist 6. Furthermore, solder plating 7 is applied to the parts not covered by the resist 6, and after peeling off the resist 6, an etching process is performed to melt and remove unnecessary steel parts. Overhang is removed to form a predetermined pattern.

この方法にてでき上ったプリント基板には、次のような
欠点がある。
The printed circuit board produced using this method has the following drawbacks.

(1)近年の高密度プリント基板は、スルーポール径が
非常に小さく、前述の半田めっき後オーバーハング除去
処理によシ、スルーホール内の半田づまりが発生し、ス
ルーホール内欠陥が発見できない。
(1) Recent high-density printed circuit boards have very small through-pole diameters, and the above-mentioned overhang removal process after solder plating causes solder clogging in the through-holes, making it impossible to detect defects in the through-holes.

(II)  上記したスルーホールの半田づオυにより
、アキシャル部品の搭載が国文1tとなる。
(II) Due to the solder hole υ of the through-hole described above, mounting of axial parts becomes 1t in Japanese language.

(Ill)  上記したスルーホール内半田づオυによ
り、スルーホール内を介して行う補修等のだめの布線が
困難となる。
(Ill) The solder wire υ inside the through-hole makes it difficult to conduct wiring for repairs or the like through the through-hole.

OV)  半田オーバーハング除去のだめ、プリント基
板に熱負荷が加わる。
OV) Removal of solder overhang adds heat load to the printed circuit board.

次に銅めっきスルーホールプリント基板の製造方法につ
いて説明する。第2図はこの方法によpプリント基板が
製造されていく様子を該基板の断面図で示すものである
Next, a method for manufacturing a copper-plated through-hole printed circuit board will be explained. FIG. 2 is a cross-sectional view of a p-printed board showing how it is manufactured by this method.

’it fR洞めっきの工、戊までは、半田めっきプリ
ント基板の場合と同様である。次に感光膜8をプリント
基板表面に貼シ付け、写真焼付法等により所定の配線パ
ターン及び孔5の表面を覆い、エツチング処理により不
必要fr、銅部鋼部解除力し、所定のパターンを作る。
'it fR Hole plating process and steps are the same as those for solder plated printed circuit boards. Next, a photoresist film 8 is pasted on the surface of the printed circuit board, the predetermined wiring pattern and the surface of the hole 5 are covered by photoprinting, etc., and unnecessary fr and copper parts are removed by etching, and the predetermined pattern is formed. make.

また曲の方法どして、孔の内部及び表面をディッピング
凍たはローラー法@洸よシ感元膜を塗布し、乾燥後写兵
焼伺法等により所定のパターンを形成する方法もある。
There is also a method of coating the inside and surface of the hole with a dipping or roller method @Kyoyoshi sensitizer film, and after drying, forming a predetermined pattern using the shahei-yakikin method or the like.

このようにしてでき上っ/Cプリント板には、次のよう
な欠点がある。
The /C printed board thus produced has the following drawbacks.

(I)ハターン上に半田がないため、フラットパック部
品搭載のだめには、所定のパターンに半田ベース1を印
刷する必要があシ、多大な作業工数がかかる、 本発明者は、これら従来の方法の欠点につき検討を加え
、種々研究の結果、従来方法の長所のみを組合せた方法
を発見し、本発明に到達したものである。
(I) Since there is no solder on the pattern, it is necessary to print the solder base 1 in a predetermined pattern in order to mount flat pack components, which requires a large number of man-hours. As a result of various studies, we have discovered a method that combines only the advantages of conventional methods, and have arrived at the present invention.

発明の目的 本発明の目的は、半田めっきパターンの部分と銅めっき
パターンの部分とを選択的に形成できるようにしたプリ
ント基板の製造方法を提供することである。
OBJECTS OF THE INVENTION An object of the present invention is to provide a method for manufacturing a printed circuit board that allows selective formation of a solder plating pattern portion and a copper plating pattern portion.

本発明は、プリント基板の両面の銅部をスルホール穴を
通じて導通ずるように銅めっきを施した後、該プリント
基板上において半田めっき部分と銅めっき部分と半田め
っきも銅めっきもしない部分とを選択的に形成するプリ
ント基板製造方法を特徴とする。
In the present invention, after copper plating is applied to the copper parts on both sides of a printed circuit board so that the copper parts are electrically conductive through through-holes, solder plating parts, copper plating parts, and parts not having solder plating or copper plating are selected on the printed circuit board. The method is characterized by a method for manufacturing a printed circuit board.

発明の実施例 本発明の実施例を第3図および第4図を用いて説明する
Embodiment of the Invention An embodiment of the invention will be described with reference to FIGS. 3 and 4. FIG.

第3図は本発明の方法により、プリント基板が製造され
ていく様子を該基板の断面図で示すものである。両面に
銅箔2を備えたプリント基板1の所定の位置に孔3をあ
け、これに活性化処理及び無電解銅めっきを行ない更に
電解銅めつき4を行なう。
FIG. 3 is a sectional view of a printed circuit board showing how the printed circuit board is manufactured by the method of the present invention. A hole 3 is made at a predetermined position on a printed circuit board 1 having copper foils 2 on both sides, and is subjected to activation treatment and electroless copper plating, and further electrolytic copper plating 4 is performed.

との電解銅めつきによシ、導通層5が形成され、両面の
銅箔2が導通する。次に写真焼料法スクリーン法等を利
用し、フラットパック部品搭載部を残し、他の部分をレ
ジスト6で覆った後、半田めっき処理を行なう。半田め
っき7はフラットパック部品搭載部に施された半田めっ
きである。その後レジスト6を除去し、次に半田めつき
7された部分および孔3を写真焼付法スクリーン法等に
よυレジスト6で覆い、更に塩化第二鉄等のエラキング
液でエツチングし7、不必要な銅のみを溶解除去する。
By electrolytic copper plating, a conductive layer 5 is formed, and the copper foils 2 on both sides are electrically conductive. Next, using a photoprinting method or the like, the flat pack component mounting portion is left and the other portions are covered with a resist 6, followed by solder plating. Solder plating 7 is solder plating applied to the flat pack component mounting area. After that, the resist 6 is removed, and then the solder-plated part and the hole 3 are covered with a resist 6 using a photoprinting method, screen method, etc., and then etched with an eraking solution such as ferric chloride. Dissolves and removes only copper.

その後回路上のレジストを除去すれば、フラットパック
部品搭載パターンのみ半田めりき7で形成され、かつア
キシャル部品搭載部である孔3は銅めっき4にて形成さ
れたプリント板ができ上る。回路の防錆処理等が特に必
要な場合には、例えば、無雪、解スズめっき9を行う。
After that, by removing the resist on the circuit, a printed board is completed in which only the flat pack component mounting pattern is formed by solder plating 7, and the hole 3, which is the axial component mounting portion, is formed by copper plating 4. If anti-corrosion treatment of the circuit is particularly required, for example, snow-free and detinning plating 9 is performed.

また半田付時の半田ブリッジ防止処理として、エポキシ
樹脂等のソルダーマスク10を行なう。
Furthermore, a solder mask 10 made of epoxy resin or the like is applied as a solder bridge prevention treatment during soldering.

次に本発明の他の実施例について説明する。Next, other embodiments of the present invention will be described.

第4図はこの方法によりプリント基板が製造されていく
過程を示す該基板の断面図である。両面に銅箔2を備え
たプリント基板1の所定の18’r置に孔3をあけ、こ
れ圀活性化処理及び無電解銅めっきを行ない、更に電解
銅めつき4を行なう。
FIG. 4 is a cross-sectional view of a printed circuit board showing the process of manufacturing the printed circuit board by this method. Holes 3 are made at predetermined 18'r positions on a printed circuit board 1 having copper foils 2 on both sides, and subjected to field activation treatment and electroless copper plating, and further electrolytic copper plating 4.

この電解鋼めっきにより導通層5が形成され両面の銅箔
2が導通する。次に写真焼付法等によシ、孔3、部品搭
載部および他の回路パターンをレジスト6で覆った後、
塩化第二鉄等のエツチング液でエツチング処理し、全て
のパターン形成を行なう。その後全面に化学銅めっきに
よるフラッジ−めつき12を行なう。次に再度写真焼付
法等により、フラットパック搭載パターンを残し他の部
分をレジスト6で覆った後、平田めつき7を施した後レ
ジスト6を除去する。
A conductive layer 5 is formed by this electrolytic steel plating, and the copper foils 2 on both sides are electrically conductive. Next, after covering the holes 3, component mounting areas, and other circuit patterns with a resist 6 using a photoprinting method or the like,
All patterns are formed by etching using an etching solution such as ferric chloride. Thereafter, fludge plating 12 is performed on the entire surface by chemical copper plating. Next, by photo-printing or the like again, the flat pack mounting pattern is left and other parts are covered with the resist 6, and after Hirata plating 7 is applied, the resist 6 is removed.

次にアルカリタイプのエツチング液によりフラッシュエ
ツチングし不必要な銅を溶解除去し、パターンを形成す
る。その後前述した防錆処理及び半田ブリッジ防止処理
を行なえば、フラットバック部品af載パターンのみ半
田めつき7で形成され、かつアキ/キル部品搭載部であ
る孔3fよ防錆処理を施こされた銅めりきパターンにて
形成されたプリント基板が得られる。
Next, flash etching is performed using an alkaline type etching solution to dissolve and remove unnecessary copper, thereby forming a pattern. After that, by carrying out the above-mentioned rust prevention treatment and solder bridge prevention treatment, only the flat back component AF mounting pattern was formed with solder plating 7, and the rust prevention treatment was applied to the hole 3f which is the open/kill component mounting part. A printed circuit board formed with a copper plated pattern is obtained.

本発明の方法にてでき上り/こプリント板は、次の利点
を有する、 (11半田めっきパターンのオーバーハング除去の必要
がなく、スルーホールづま、!2が発生しない。よって
スルーホール内欠陥が容易に発見できる。
The printed circuit board produced by the method of the present invention has the following advantages: (11) There is no need to remove the overhang of the solder plating pattern, and no through-hole jamming occurs. easily discovered.

(11)上記したスルーホールづまシが発生しないため
、アキシャル部品の搭載が容易でちる。
(11) Since the through-hole jam described above does not occur, it is easy to mount axial components.

(町 上記したスルーホールづまりが発生しないため、
スルーホール内・を介して行なう補修等のだめの布線が
容易である。
(Town: Because the through-hole clogging mentioned above does not occur,
It is easy to wire for repairs, etc. inside or through the through-holes.

(1ν) フラットパック部品搭載パターンは、半田め
っきされているため、容易にフラットパック部品搭載作
業可能であシ、しいては従来の半田ペースト印刷作業の
廃止ができる。
(1v) Since the flat pack component mounting pattern is solder-plated, it is possible to easily mount the flat pack component, and the conventional solder paste printing work can be abolished.

(V)  半田めっきパターンのオーバーハング除去が
ないため、プリント基板に熱負荷かがらない。
(V) Since there is no overhang removal of the solder plating pattern, there is no heat load on the printed circuit board.

発明の詳細 な説明した如く、本発明によれば半田めっきパターンと
銅めっきパターンとを同一プリント基板上に選択的に混
在させて形成できるようにするとともにスルーポールづ
まりのないプリント基板を得ることができる。
As described in detail, according to the present invention, a solder plating pattern and a copper plating pattern can be selectively mixed and formed on the same printed circuit board, and a printed circuit board without through-pole clogging can be obtained. .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は従来の方法によりプリント基板が
製造されていく過程を示す該基板の断面図、第3図およ
び第4図は本発明の一実施例の方法によシブリント基板
が製造されていく過程を示す該基板の断面図である。 1・・・プリント基板    2・・・銅箔3・・孔 
        4・・・銅めりき5・導通層    
   6・・レジスト7・半田めりき     8・感
ツC膜9 ・無電解スズメッキ 10・・・ソルダーマスク 12・・・フラッシュメッキ銅 オ 3 口
1 and 2 are cross-sectional views of a printed circuit board showing the process of manufacturing the printed circuit board by a conventional method, and FIGS. 3 and 4 show a printed circuit board manufactured by a method according to an embodiment of the present invention. FIG. 3 is a cross-sectional view of the substrate showing the process in which it is removed. 1... Printed circuit board 2... Copper foil 3... Hole
4...Copper plated 5/Conducting layer
6.Resist 7.Solder milling 8.Sensitive C film 9.Electroless tin plating 10.Solder mask 12.Flash plating copper 3 ports

Claims (1)

【特許請求の範囲】 めっき部分と該半田めっきも該銅めつきもしない部分と
を選択的に形成することを特徴とするプリント基板製造
方法。 2 前記銅めっきを施した後、前記プリント基板上の半
田めっきすべき部分を残して他の部分を第1のレジスト
で覆った後半田めっき処理を施し、該第1のレジストを
除去した後前記銅めっきを除去すべき部分を残して他の
部分を第2のレジストで覆ってエツチング処理を施し、
該第2のレジストを除去するととを特徴とする特許請求
の範囲第1項記載のプリント基板製造方法。 3 前記銅めっきを施した後、前記プリント基板上の該
銅めつきを除去すべき部分を残して他の部分を第1のレ
ジストで覆った後エツチング処理をhmシ、該第1のレ
ジストを除去した後肢プリント基板の全面にフラ“ノン
−。メッキを施し、半田めっきすべき部分を残して他の
部分を第2のレジストで覆った後半田めっき処理を施し
、該第2のレジストを除去した後半田めっき部分以外の
部分の該7ランゾー、メッキをフラソ/−,エツチング
により除去することを4’f K’にとする特許請求の
範囲第1項記載のプリンl−基板製造方法。
[Scope of Claims] A printed circuit board manufacturing method characterized by selectively forming plated portions and portions that are neither solder plated nor copper plated. 2. After performing the copper plating, a second half solder plating process is performed in which the parts to be solder plated on the printed circuit board are left and the other parts are covered with a first resist, and after the first resist is removed, the Leaving the areas where the copper plating should be removed, cover the other areas with a second resist and perform an etching process,
2. The printed circuit board manufacturing method according to claim 1, further comprising removing the second resist. 3 After applying the copper plating, leave the part on the printed circuit board where the copper plating should be removed and cover the other part with the first resist, and then perform an etching process to remove the first resist. The entire surface of the removed hindlimb printed circuit board is plated, leaving the parts that should be solder plated and covering the other parts with a second resist, performing a second half solder plating process, and removing the second resist. 2. The printed circuit board manufacturing method as set forth in claim 1, wherein the plated parts other than the second half solder plated part are removed by 4'fK'.
JP14763182A 1982-08-27 1982-08-27 Method of producing printed board Pending JPS5939094A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14763182A JPS5939094A (en) 1982-08-27 1982-08-27 Method of producing printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14763182A JPS5939094A (en) 1982-08-27 1982-08-27 Method of producing printed board

Publications (1)

Publication Number Publication Date
JPS5939094A true JPS5939094A (en) 1984-03-03

Family

ID=15434691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14763182A Pending JPS5939094A (en) 1982-08-27 1982-08-27 Method of producing printed board

Country Status (1)

Country Link
JP (1) JPS5939094A (en)

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