JPS6310240A - Extending method for external interruption in electronic controller - Google Patents

Abstract

PURPOSE:To extend an external interruption without using a peripheral LSI, etc. by using the reception interruption function for serial interruptions as an external interruption function. CONSTITUTION:A serial communication port 8 produces the transmission/ reception clocks of a microcomputer. At a reception part the reception data is changed to 'L' from 'H' and a start bit is detected. Then both 'H' and 'L' of the bit data are sampled at the middle part of each bit by a reception clock and a reception end interruption signal is produced. At a transmission part the serial data are shifted for each transmission clock and a transmission end interruption signal is produced. Then the external interruption function is extended by means of the external interruptions given from external interruption ports 6 and 7, the timer interruptions given from timer/counter 4 and 5, and the serial interruption given from the port 8 respectively.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an external interrupt expansion method in an electronic control device, and particularly to an external interrupt expansion method for expanding the external interrupt function of an electronic control device using a microcomputer. It is.

[Prior art]

In recent years, as semiconductor integration technology has improved, electronic circuits forming electronic control devices are based on microcomputers. In particular, one central processing unit (CPU
), it was designed using a Hunchip microcomputer equipped with read-only memory (ROM), random access memory (RAM), timer counter, parallel input/output port, serial communication port, and several types of interrupt ports. The number of electronic control devices is increasing.

When designing an electronic control unit using the above-mentioned one-chip microcomputer, if the number of external interrupt sources required by the system is large for the central processing unit to be used, methods to expand the external interrupt function are attempted. There is.

Conventionally, as a method of expanding the external interrupt function as described above, the microcomputer user's manual MC
3-85 Intel Japan Corporation Programmable
Included Controller, April 10, 1980,
There was one disclosed on page 4-93.

Fig. 2 is a diagram showing the system configuration of the programmable interconnected controller disclosed in the above literature;
The figure is a block diagram showing a system configuration of a method for expanding external interrupt functions using the programmable included controller.

[Problem that the invention seeks to solve]

However, as shown in FIG. 3, the method for expanding the external interrupt function described above requires the use of a peripheral LSI such as a programmable interconnected controller 101, and a data bus for interfacing the peripheral LSI and the central processing unit (CPU). 102) Control bus 103
, address bus 104, etc., and the advantage of not requiring peripheral LSI, which is a feature of using a chip microcomputer, is lost.

The present invention has been made in view of the above-mentioned points, and it is an object of the present invention to eliminate the above-mentioned problems and provide a method for extending external interrupts in an electronic control device using a microcomputer without using a peripheral LSI or the like.

[Means for solving problems]

In order to solve the above-mentioned problems, the present invention is configured so that the serial interrupt reception interrupt function is used for external interrupts in an electronic control device using a microcomputer equipped with a serial communication port and the like.

[Effect]

With the above configuration, the reception interrupt function of the serial interrupt is used for external interrupts, so that external interrupts can be expanded without using peripheral LSIs or the like as in the conventional case.

〔Example〕

Hereinafter, one embodiment of the present invention will be described based on the drawings.

FIG. 1 is a block diagram showing the system configuration of a one-chip microcomputer used in an electronic control device to which the external interrupt expansion method of the present invention is applied. The microcomputer includes a central processing unit (CPU) 1, an internal read-only memory (ROM) 2 that stores control programs and control constants, and the central processing unit (CPU).
1 includes an internal random access memory (RAM) 3 for storing control data, two types of timers/counters 4 and 5, two types of external interrupt ports 6 and 7, and a serial communication system using an asynchronous communication method. port 8
and three types of parallel input/output ports 9, 10 and 11.

The timers/counters 4 and 5 are timers that count up according to the internal clock of the central processing unit (CPU) 1 or a clock applied from the outside, and generate an interrupt to the central processing unit (CPU) 1 when an overflow occurs. / is a counter. Further, the serial communication port 8 is a transmission port (TX
D) and a receiving port (RXD). Also,
The parallel input/output ports 9, 10 and 11 can be configured with 8-bit input/output ports.

The central processing unit (CPU) 1 includes a reset terminal 12 for initializing the central processing unit (CPU) 1, and a controller logic 13 necessary for exchanging data with the microcomputer and peripheral LSI. , an oscillator 14 for operating the central processing unit (CPU) 1, and a power supply terminal 15 are connected.

Figure 4 shows the serial communication port 8.
FIG. 3 is a waveform diagram showing waveforms of serial transmission/reception signals emitted from the transmitting section and the receiving section of FIG. As shown, the serial communication port 8 generates a transmit clock signal (TXC) and a receive clock (RXC) which are frequency-divided versions of the oscillator output of the chip microcomputer. In addition, in the receiving section (b), the received data (RX
D) changes from high level to low level and the start bit is detected, the reception clock (RX
C) has a function of sampling the high level and low level of bit data and generating a reception end interrupt signal (RXI) after completion of reception, and in the transmitting section of (a), the serial data is transmitted at the transmission clock. It is assumed that the signal is shifted each time the signal is applied, and has a function of generating a transmission end interrupt signal (TXI) after the end of transmission.

To summarize the above points, the microcomputer shown in Figure 1 has five types of interrupt functions [external interrupt from external interrupt board 6 (EXIO), external interrupt from external interrupt board 7 (Exll), timer/counter. Timer interrupt (TMIO) from timer/counter 4, timer interrupt (TMII) from timer/counter 5, serial interrupt (SRI) from serial communication port 8.
)) to expand external interrupt functionality.

The external interrupt function expansion method will be explained below. Fifth
The figure shows a system interrupt configuration. In a system that uses the five types of interrupt functions as described above and requires four types of external interrupt functions and one type of timer interrupt function, the timer interrupt is (TMIO)2
6 and serves as an interval timer to notify the central processing unit (CPU) 1 of the passage of time every arbitrary period.

As for external interrupt assignment, terminal 21 is assigned to external interrupt (EXIO) 27, terminal 22 is assigned to external interrupt (EXIO) 27, and terminal 22 is assigned to external interrupt (EXIO) 27.
EXll) 28 respectively. The terminal 23 receives a timer interrupt (TMII) 29 as shown in Figure 6(a).
Set to a known event count mode. Timer/
The counter data of counter 5 is set to the data immediately before the overflow occurs. For example, if timer/counter 5 counts 1 byte, F F as shown in Figure 6 (a)
Set M (HEX), )l -mitL 23
(7) A pulse waveform is applied to the clock terminal of the timer/counter 5, and an interrupt signal is generated every time the pulse waveform falls. Terminal 24 accepts serial interrupts (S
RI) (7) It is allocated to the receiving boat (RXD) 30 and used as external allocation.

As for mode setting, as in general asynchronous mode setting, (1) baud rate, (2) character length, (3) presence/absence of parity and parity determination, and (4) number of stop bits are arbitrarily set.

In this embodiment, serial interrupt (SRI) is used as shown in Fig. 5.
) (7) To use the receive port (RXD) 30 for external interrupts and the transmit port (TXD) 31 as a serial output line for the monitor 25 for software debugging of an electronic control unit using a one-chip microcomputer. Then, set the mode according to the serial interface conditions with the software debugging monitor 25 [(1) baud rate (x1), (2) character length (8 bits), (3) no parity, ( 4) A 10-bit frame configuration with a stop bit (1 bit)].

FIG. 7 is a waveform diagram showing the operating principle. In the same figure, (A) is the output waveform of the terminal 24, and from the falling edge of the output waveform of the terminal 24, the start bit is detected by the #1 clock of the reception clock (RXC) of (B), and the subsequent reception From #2 to $10 clock of the clock (RXC), the reception port (RxD) of (C) judges as if the serial 8 bits and 1 stop bit are low level, and the reception clock of (B) (D) generates a reception interrupt request (RX I) and
The external interrupt request No. 4 is notified to the central processing unit (CPU) 1. There is an interrupt delay time (RID) between the falling edge of the output waveform of the terminal 24 and the actual generation of an interrupt to the central processing unit (CPU) 1, as shown in (E).
LY) occurs, but from the detection of the start bit of the receive boat (RXD) in (C), the receive interrupt request (RXD) in (D) is generated.
1 of the reception clock (RXC) of (B) until I ).
Since it is equivalent to one clock and does not endure and does not change, it is seen from the central processing unit (CPU) 1 side as terminal 2 in (A).
There is no problem in determining that it is an interrupt request based on the output waveform of No. 4.

As explained above, according to this embodiment, the receive port (RXD) of the serial interrupt (SRI) is used for an external interrupt, and by determining the contents of the serial buffer (5BuF), the (W) The output waveform of
When the normal waveform and the noise applied waveform are input as shown in Fig. 8, the data received by the reception port (RXD) 30 of (X), that is, the contents of the serial buffer (SBuF), is as shown in Fig. 8 (Z). In the case of a normal waveform, it is 00M (HEX), in the case of noise application, it is F F M (HEX), and when viewed from the central processing unit (CPU) 1, the same figure (Y
) when a receive interrupt request (RXI) occurs.
From the contents of the buffer (SBuF), it is possible to determine whether or not it is a regular external interrupt.

Furthermore, as shown in FIG. 9, the input waveform applied to the receive port (RXD) 30 of the serial interrupt (SRI) is
) to (h), it is possible to classify the interrupt levels into eight types by setting the pulse width of the low level section to eight types.

That is, when the input waveform is (a), the serial buffer (SB
uF) contents FE, interrupt level #1, input waveform is (b
), the contents of the serial buffer (SBuF) are 105
Interrupt level #2... When the input waveform is (h), the contents of the serial buffer (SBuF) are 001 interrupt and the interrupt level can be classified as bell #8. Therefore, the serial buffer (SB
By simply determining the contents of uF), the same effect as that obtained by adding a peripheral LSI such as a programmable controller as shown in FIG. 2 can be obtained.

Although the above embodiment uses a serial interrupt (SRI) of a one-chip microcomputer, even in a system consisting of a single central processing unit (CPU) and peripheral LSIs, by adding a serial communication LSI. The same effect as above can be obtained.

〔Effect of the invention〕

As explained above, according to the present invention, since the reception interrupt function of serial 1 interrupt is used for external interrupts, an excellent effect can be obtained in that external interrupts can be expanded without using peripheral LSI etc. as in the conventional case. It will be done.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the system configuration of a one-chip micro combinator used in an electronic control device to which the external interrupt expansion method of the present invention is applied, and FIG. 2 is a blogmable
FIG. 3 is a block diagram showing the system configuration of the included controller; FIG. 3 is a block diagram showing the system configuration of a method for expanding the external interrupt function using the programmable included controller; FIG. Figure 5 is a diagram showing the system interrupt configuration of this embodiment, Figures 6 (a) and (b) are diagrams explaining the operation of the event counter in this embodiment, and Figure 7 is a waveform diagram to explain the principle of serial interrupt operation. , FIG. 8 is a diagram showing the relationship between pulse width and serial buffer in this embodiment, and FIG. 9 is an explanatory diagram of interrupt level setting based on pulse width in this embodiment. In the figure, 1... central processing unit (CPU), 2...
...Read-only memory (ROM), 3...Random access memory (RAM), 4.5...
Timer/counter, 6, 7...external interrupt port,
8... Serial communication port, 9
, 10.11...Parallel input/output port, 1211
0. Reset terminal, 13...Control bus, 1
4... Oscillator, 15... Power supply terminal.

Claims (3)

[Claims] (1) A method for extending external interrupts in an electronic control device comprising a central processing unit, a serial communication section, etc., characterized in that the receiving interrupt function of a serial interrupt is used as an external interrupt function. (2) In the method for expanding external interrupts in an electronic control device according to claim (1), the external interrupt in the electronic control device is characterized in that it is determined whether or not the external interrupt is a regular external interrupt based on the contents of a serial buffer. Expansion method. (3) A method for extending external interrupts in an electronic control device according to claim (1), characterized in that the interrupt level can be arbitrarily extended depending on the contents of a received serial buffer. Method.