JPS62134739A - Artificial error generating circuit - Google Patents

Abstract

PURPOSE:To generate an artificial error by storing an instruction from a channel common control part in a data transfer control part, comparing it with information of a processing request in a data transfer control part, and transferring an operation of the data transfer control part to an error processing, when a coincidence output is obtained. CONSTITUTION:A processing request of an input/output device number which desired to generate an artificial error is generated from input/output channel devices 12A-12C, held in input ports 13A-13C, and when a request from the input/output device number of a purpose is selected, by a controlling circuit 19, request codes (read/write codes) from the input ports 13A-13C are inputted to the controlling circuit 19, the request code is converted to the request contents in the controlling circuit 19, and thereafter, sent out to a comparing circuit 11. At the same time, the input/output device number from the input ports 13A-13C is selected, sent out directly to the comparing circuit 111, and compared with the contents of a storing circuit 110 together with the request contents. In such a case, if a coincidence output signal is obtained, it is sent out to an error generating circuit 112, and functions so that the controlling circuit 19 is transferred to an error processing.

Description

[Detailed Description of the Invention] [(Already required)] At least a central processing unit (C1) υ), and the above-mentioned 1. α
In a data processing device comprising a device-iffi (MS), a channel common control section, and a data transfer control section, instructions from the channel common control section are stored in the data transfer control section and the data transfer control is performed by storing an instruction from the channel common control section. A pseudo error is generated by providing an error generating circuit that compares the information with the processing request information being executed within the unit and transitions the operation of the data transfer control unit to error processing when a -failure output is obtained. This is how it was done.

[Industrial application field]

The present invention particularly relates to a pseudo error generation circuit in a data transfer control section of a channel in a data processing device.

Conventionally, data processing apparatuses have often been used in closed and narrow areas, such as hatch processing or data processing within a company.

However, as data processing equipment has become more sophisticated in recent years, online database processing, network processing, etc.
At the same time as a system in which a large number of open data processing devices interact with each other, the system cannot be stopped due to a failure, and the impact has become even greater than that of a training camp. The content has also become more sophisticated, and it has become necessary to isolate the part where the failure has occurred, perform processing on behalf of other devices, and so on.

In particular, child devices have an algebraic connection path between them and input/output devices, making it possible to dynamically select a data transfer path, and immediately switch to another path in the event of a failure. It's starting to look like this.

Therefore, an effective pseudo-error generating capability has been required to verify the failure handling function of the channel device.

[Conventional technology]

Figure 3 shows the standard in the data transfer control section of a conventional channel. FIG. 2 is a diagram showing a general configuration.

In this figure, numeral 10 is the above-mentioned MS 4A, 11 is a data transfer control section for the channel, and a plurality of human output channel devices 12A to 12G are connected.

13A-13C are the input/output channel devices 12A-12C
This is a human-powered boat from
Address of main memory (MS) 10 from ~12C.

It has the function of receiving and receiving data 1 command 1 person output 4A position number etc.

148 to 14C are the human output channel devices 12^ to 12
It is an output port to C, and is the output port to 1. above. Q device (MS) 1
Send read data from 0.

The processing circuit 15 converts the addresses from the human output channel devices 12Δ to 12C to the target addresses of the main memory (MS) 10, and 15^ is a temporary memory 1. for this conversion. This is the α circuit.

16 C is an address output port for the device (MS) 10, and 17 is the address output port for the device (MS) 10.
) Data output port for 10 and 18 for nuclear storage (MS) t.

It is a human-powered boat of data from.

19 is a control circuit that controls the entire data transfer control section 11;
Detects requests from and controls boat selection, address translation, etc.

Generally, the channel data transfer control unit 11 receives processing requests from a plurality of human output channel devices 12A to 12C, and multiplexes data transfer to and from the main storage device (MS).

The data transfer control unit 11 generates a pseudo error η
If you want to use it, the scan-in function provided by the SVr' (not shown) can be used.
Is the relevant data transfer system from A and J Sessa (SVP)? :Input port of tl1 section 11 138-13c
, output boats 14A to 14G, and the above 1. ; Yu device (M
S) Bo number 6 to +8 with 10. -[1, 'L I, (
For example, this is done every time error data that does not cause a parity error is sent to one circuit 15A or the like.

[Problem that the invention seeks to solve]

Therefore, in the conventional pseudo-error generation circuit, when the data transfer control section 11 of a channel is in operation, various ports in the data transfer control section 11 are directly connected.

Or, because error data was set in a temporary storage circuit, etc., the data transfer control unit 11 is currently executing a request from which input/output channel device, or which input/output device is executing a request. It was not possible to recognize whether the input/output device was in use, or to detect the content of the request from the input/output device, and the error data was collected seven times.

Therefore, for example, there is a problem that it is not possible to generate a pseudo error for a specific input/output device, or to generate a pseudo error for a specific processing request. Ta.

In addition, since error data is set using the scan-in-no-J method from the service processor (SVP), there is a problem in that it is only possible to set pseudo-error occurrence data directly from the central processing unit (C-en J) 20. In view of the above-mentioned drawbacks of the conventional technology, the present invention provides a central processing unit (CP).
The purpose of this invention is to provide a method for generating a pseudo error directly from IJ') and for a specific input/output device or the content of an input/output processing request.

[Failure to solve the problem]

FIG. 1 is a block diagram showing one embodiment of the present invention.

In the present invention, instructions (pseudo error occurrence data) from the channel common control section 30 are recorded in the data transfer control section 11 of the channel. From the program I-gram executed by the central processing unit (CIIU) 20,
Is the pseudo error occurrence data output for the relevant channel sent to the channel common side? 'It is held through the JI section 30.

Also, a comparison time 1 "j3111" in which the data from the 1Q circuit 110 and the data inside the data transfer control section 11 (input/output device number one person output processing content, etc.) are compared,
An error generation circuit 112 is provided which generates a "ζ error (specifically, transitions the operation of the control In circuit 19 to error processing) by the coincidence output signal from the comparison circuit 111, and the memory circuit 110 By comparing the held input/output device numbers, single-person output processing vl request contents, etc., it is possible to generate an error for a specific processing request of a specific input/output device (j4).

[A'14J'f According to the present invention, at least the central processing unit (C
In a data processing device consisting of a P2 device (gate), a channel common control section, and a data transfer control section, the data transfer control section 1 includes an instruction from the channel common side (1) 1 section. Write down ↑ and compare it with the information of the processing request being executed within the data transfer control unit, and -
By providing an error generation circuit that transitions the operation of the data transfer control unit to error processing when rescue power is obtained, a pseudo error can be generated, so the central processing There is an effect that a pseudo error can be generated directly from the device (Cr'U), for example, for specific input/output processing request contents of a specific input/output device.

(Example〕 Embodiments of the present invention will be described in detail below with reference to the drawings.

[1; FIG. 1 described in 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a block diagram showing another embodiment of the present invention.
11 is a diagram showing a storage circuit 110.1 provided in a data transfer control unit 11. Ratio 1 membrane circuit 111.
The error generation circuit 112 is a necessary functional block to implement the present invention. Note that the same reference numerals indicate the same objects throughout the figures.

In this embodiment, the central processing unit (CPII) 20 extracts and executes the input/output processing program stored in the above-mentioned 1a device (MS) 10, thereby executing the input/output processing program stored on the channel common side. Via the I11 section 30, it controls the turnout car/yail devices 12A to 12c.

, 2, 1 cough central processing unit (C1”U) 20 or ai,
) When the specified program is executed and a pseudo error occurrence data set command is issued, the central processing unit (CPU) 20
The error occurrence data is transmitted from the channel common INJ '4'n unit 30 to the t12 circuit 110 provided inside the data transfer control unit 11 of the channel.
(For example, input/output device number 9 output processing request contents, etc.) are held.

At this point, the processing request for the input/output device number for which the pseudo error is to occur is sent to the human output channel;
12C and held in the human-powered boats 13A-13c, and when the control circuit 19 receives a request from the target input/output device number, the human-powered boats 138-1
The request code (read/write code) from 3c is taken into the control circuit 19, and the control circuit 19 converts the request:1-code into request content, and then sends it to the comparison circuit 111.

At the same time, the human output device number -j is translated from the human boats 13A to 13c and directly sent to the comparison circuit 111, where it is compared with the contents of the Q circuit HO, together with the request contents.

If a coincidence output No. 13 is obtained, it is sent to the error generation circuit 112 and functions to cause the control circuit 9 to transition to error processing.

Furthermore, by providing a valid mode for the error occurrence data held in the circuit 10, an error can be generated by the input/output device number 1 or the processing request content alone.

Next, another embodiment of the present invention will be described with reference to FIG. The difference between this embodiment and the embodiment shown in FIG. 1 is that the data transfer control unit It of the channel is in the two-legged notation 1. There is a method of inputting error occurrence data to the a circuit 110, and in this embodiment, the human output channel device 12A
-12C issues a processing request to the data transfer control section 11, and receives a processing request from the channel common control section 30 (specifically, a data set request to the α circuit 110 described in 1. ) Received at 130, control circuit 19
After being selected, the error occurrence data is set in the contact memory circuit 110.

The subsequent operation can be understood to be exactly the same as the pseudo error generation operation explained in FIG.

As described above, the present invention records the error occurrence data from the central processing unit (CI"11) in the data transfer control section of the channel, and controls the processing executed in the data transfer control section fa11. The feature is that when a -spread output signal is obtained compared to the requested content, error processing corresponding to the -defeat signal can be entered.

〔Effect of the invention〕

As described above in detail, the pseudo error generation circuit of the present invention includes at least a central processing unit (CPU) and 1. above. In a data processing device comprising an α device (MS), a 1-channel common control section, and a data transfer control section, instructions from the channel common control section are stored in the data transfer control section, and instructions from the channel common control section are stored in the data transfer control section. Compare the information with the processing request being executed in , and when a matching output is obtained,
By providing an error generation circuit that transitions the operation of the data transfer control unit to error processing, a pseudo error is generated.
For example, it is possible to directly generate a pseudo error for specific input/output processing request contents of a specific input/output device from U).

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a block diagram showing another embodiment of the present invention [2]
1. FIG. 3 is a diagram showing a standard configuration of a conventional channel data transfer control section. It is. In the drawings, IO is the main V'tU location (MS), 20 is the central processing unit (CPIJ). 30 is a channel common control part 1; 11 is 1 in the data. Sending; 11+1 Igo ■ Department. 12A to 12 (- are input/output channel devices. 13A to 13C are input ports. 148 to 14G are output ports. 19 is a control circuit, 110 is 1. (1 circuit), 111 is a comparison circuit, and 112 is an error generation circuit. . are shown respectively.

Claims (2)

[Claims] (1) In a data processing device consisting of at least a central processing unit (CPU) (20), a main memory (MS) (10), a channel common control unit (30), and a data transfer control unit (11). , a storage circuit (110) for storing instructions from the channel common control unit (30) in the data transfer control unit (11) of the channel; and information stored in the storage circuit (110) and the data transfer. A comparison circuit (111) is provided to compare the processing request information executed by the control unit (11), and the comparison circuit (11
1) A pseudo-error generation circuit comprising a circuit (112) for generating an error in the data transfer control unit (11) according to the output of (1). (2) Instruction information from the channel common control unit (30) to the storage circuit (110) is stored via one of the input ports (13) included in the data transfer control unit (11). The pseudo-error generating circuit according to claim 1, characterized in that: