JPS62121426A - Liquid crystal display - Google Patents

Abstract

PURPOSE:To prevent a white or black line from being formed at the joint part of two liquid crystal display panel by supplying the (n+1)th and the 2nd scanning line electrode driving signals among scanning line driving signals which have 1/(n+2) duty to adjacent scanning line electrodes at the joint part. CONSTITUTION:At the liquid crystal display panels LCD1 and LCD2 consisting of (n) scanning lines respectively, a scanning line electrode driving circuit C-DRV supplies (n) driving signals C2-Cn+1 among driving signals C1-Cn+2 with 1/(n+2) duty except the 1st and the final driving signals C1 and Cn+2 to corresponding scanning line electrodes in parallel. Waveforms of logically found effective voltages and waveforms of substantial driving voltages in consideration of the load capacity of the scanning line electrode are rounded almost equally as the waveforms of the driving signals C2 and C3-Cn+1. Consequently, the driving signal Cn+1 of the LCD1 and the driving signal C1 of the LCD2 are equalized in effective voltage and excellent display quality is obtained without forming any white or black line at the boundary line.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to a liquid crystal display device, and relates to a technique that is effective when applied to, for example, a liquid crystal display device using two liquid crystal display panels with a dot matrix configuration. .

[Background technology]

Dotma) IJ Fuchs' liquid crystal display device was published in the October 1980 issue of "Electronic Materials 1, pages 21 to 43.
, or ■Hitachi, March 1983 “Hitachi MO3LS
I Data Book is known by LCD driver LSIJ.

In order to obtain a large display screen, when one display screen is obtained using two liquid crystal display panels with a dot matrix configuration, the scanning line electrodes of the two liquid crystal display panels are formed by a common scanning line electrode drive circuit. The scan line drive signals are supplied in parallel. A signal line drive signal formed by a signal line electrode drive circuit is supplied to each signal line electrode. In this case, display unevenness occurs at the joint between the two liquid crystal display panels, and black or white stripes occur in the center of the screen, deteriorating display quality.

The inventor of the present application investigated the cause of the occurrence of the black stripes or white stripes and found the following.

That is, in the liquid crystal display panel having the dot matrix structure as described above, in order to display white/black by dynamically driving the dots at the intersections of the scanning line electrodes and the signal line electrodes, the dots are driven at a bias ratio of 1/n, for example, at 115 bias. It is time-divisionally driven with a specific duty.

First, second, fourth and fifth level voltages (hereinafter VI
SV6, V5 and V2) are utilized. Among the levels, the first and sixth level voltages (1) and (2) are set as selection levels, and the second and fourth level voltages V6 and V5 are set as ratio selection levels. The voltage applied to each scanning electrode is
It is made to be averaged over two frame periods.

That is, in the first frame period, the selection level is set to the level V1, and the non-selection level is set to the fifth level 5. In the second frame period, the selection level is set to the sixth level v6, and the non-selected level is set to the second level ■6. Each scan electrode is sequentially brought to a selection level in each frame period.

As a result, the first scanning line signal C1, the n-th scanning line signal Cn, and the second C2 to n-1th scanning line signals Cn-1 are both at the second level ■ in one frame. Since the selected level is set for the same amount of time, such as 6, geometrically, each frame has the same area.

However, for example, when the first frame period starts, the first scanning line signal CI is changed from the non-selection voltage at the second level, which is a step away, to the selection voltage v1 at the second level, and then becomes the selection voltage v1 at the second level. It is changed to a non-selection voltage (5) at a fifth level which is a step away. nth scanning line signal Cn
is changed from the non-selection voltage V5 of the fifth level, which is four steps apart, to the selection voltage Vl of the second level, and then changed to the voltage V6 of the second level, which is one step apart, when the second frame period starts. In addition, other scanning line signals C2 to C
The voltages n-1 each change from the fifth level voltage V5, which is four steps apart, to the selection voltage 1 of the above-mentioned level. Therefore, since the harmonic components in the respective signals are different, the effective voltages determined by Fourier integration are different. Further, the scanning line electrode has a capacitive load, and the waveform rounding of the drive signal actually supplied to the scanning line electrode differs depending on the change step (level).

The above-mentioned effective voltage also differs depending on the rounding of the waveform. Three different types of effective voltages are generated due to the above two causes.

In the above-mentioned high-duty time-division drive system, white W and iB are displayed in the change curve of the transmittance characteristic with respect to the effective voltage of the liquid crystal, as shown in FIG. 4, for example, so the above-mentioned causes are A slight difference in the effective voltage caused by this causes a relatively large change in the transmittance, which causes a relatively large change in the brightness of the dot. Therefore, when two liquid crystal display panels are connected to form one screen, for example, the difference in effective voltage between the upper scanning line signal Cn+2 and the lower scanning line signal C1 causes a black line to appear along the scanning line electrode. Otherwise, white streaks will occur. Note that when the duty ratio is small, such as in an 8-segment numeric display device, the operating points are Wo and B', and are not affected by small fluctuations in effective voltage.

[Purpose of the invention]

An object of the present invention is to provide a liquid crystal display device with a simple configuration and improved display quality.

The above and other objects and novel features of this invention include:
It will become clear from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief overview of typical embodiments of the invention disclosed in this application is as follows. That is,
Scanning line electrodes of two dot matrix liquid crystal display panels are driven in parallel using 2 to n+1 scanning line drive signals of 1 to n+2 scanning line electrode drive signals with a duty of 1/(n+2). It is something.

〔Example〕

FIG. 1 shows a block diagram of an embodiment of a liquid crystal display device according to the present invention.

In the same figure, liquid crystal display panels LCD1 and LCD2 are
N scanning line electrodes are extended in the horizontal direction, and m signal line electrodes are extended in the vertical direction. This results in a display consisting of m x n dots. The side LCD1 and LCD2 are connected vertically to form one display screen. This provides a large display area of m×2n dots.

Such a dot matrix liquid crystal display panel LCD
Since LCD 1 and LCD 2 are well known from the above-mentioned documents, detailed explanations of their structures and operating principles will be omitted.

Each of the n scanning line electrodes of the liquid crystal display panels LCDI and LCD2 has a scanning line electrode drive circuit C-DR.
The following drive signal (time division selection signal) is supplied by V. Although the number of scanning lines is n, the scanning line electrode drive circuit C-DRV forms a selection signal for n+2 lines, in other words, a drive (selection) signal CI to Cn+2 with a duty of 1/(n+2). do. However, as will become clear from the explanation later, the first drive signal C1 and the (n+2)th drive signal Cn+2 are not applied to the liquid crystal display panel, so they are not actually output from the circuit C-DRV. In other words, signals c1 and C
n+2 may be a virtual signal. The n driving signals c2 to Cn+1 excluding the first and last driving signals c1 and Cn+2 are applied to the two liquid crystal display panels LCDI and L.
It is supplied in parallel to the corresponding scanning line electrode in CD2. That is, as shown in the enlarged view of the junction between the two liquid crystal display panels LCDI and LCD2 shown in FIG. Of the drive signals Cn+2, drive signals Cn-1, Cn, and Cn+1 are supplied, and the last drive signal Cn+2 is not used. This is similar to the lower three scanning line electrodes in the lower liquid crystal display panel LCD2. Further, drive signals C2, C3, and C4 of drive signals consisting of 01 to Cn+2 are supplied to the upper three scanning line electrodes of the lower liquid crystal display panel LCD2 in order from the top, and the first drive signal C1 is Not used. This means that the upper liquid crystal display panel LCD
This is similar to the upper three scanning line electrodes in I. In addition, display signals S1 to 87, etc., respectively formed by signal line electrode drive circuits 5-DRV1.5-DRV2, which will be described later, are supplied in parallel to the upper and lower display panels LCDI and LCD2.

The scanning line electrode drive circuit C-DRV may be configured to use the 1/(n+2
) It forms the duty drive signal. The basic configuration of the scanning line electrode drive circuit C-DR■ is, for example, 0
Product name 'HD44100' sold by Kikuhitachi
It can be configured by a semiconductor integrated circuit device similar to a semiconductor integrated circuit device such as Hj. Each of the scanning line drive signals Ct to Cn+2 is sequentially set to a selection level in each display frame period. Although not particularly limited, the selection level and non-selection level of each scanning line drive signal are changed every display frame in order to prevent effective DC voltage from being applied to the liquid crystal.

FIG. 3 shows the scanning line drive signal waveform.

In the first frame period, the selection level of each scanning line drive signal is the first to sixth voltage levels v1, ■6, and ■3.
, v4, V5, and v2, the first voltage level v1 is set, and the non-selection level is set to the fifth level V5. In the second frame period following the first frame period, the selection level is set to the sixth level V2, and the non-selected level is set to the second level V6.

The signal line electrodes of the liquid crystal display panels LCDI and LCD2 include, but are not particularly limited to, a signal line electrode drive circuit 5 constituted by a one-chip monolithic semiconductor integrated circuit device.
Display signals formed by -DRVI and 5-DRV2 are supplied, respectively.

Signal line? ! ! The pole drive drive circuits DRV1 and 5-DRV2 respectively form m drive signals Sl (Xm) and S2 (xm) corresponding to the scanning line drive signal and according to display data. This signal line electrode drive circuit 5-DRV
I and 5-DRV2 include shift registers that receive serially supplied display data and convert it into parallel signals to form display signals corresponding to each signal line electrode.

The display control circuit C0NT forms the display data and its timing signal. That is, in response to the reference clock signal generated by the oscillation circuit OSC, the scanning line electrode drive circuit C-DRV and the signal line electrode drive circuit 5-DRV
1 and 5-DRV2, scan timing signals φC of scan line electrodes associated with each other, selection timing signals φS of signal line electrodes (including a shift clock signal), and a RAM (random) in which display data (not shown) are stored.・
(access memory) read address signal. The display data read out according to this address signal is transferred to the signal line electrode drive circuits 5-DRVl and 5-DRV1.
2. Display data D1 and D2 to be supplied to 2 are formed. Although not particularly limited, the RAM has a read-only output terminal, and is designed to perform reading regardless of writing/reading from a microprocessor CPU or the like.

In this example, l/(rx
+2) Duty scanning line electrode drive signals CI to C3
Then, out of the last scanning line electrode drive signal Cn+2, drive signals C2, C3, etc. other than the drive signals C1 and Cn+2 are used.

The waveforms of these driving signals C2, C3 to Cn + l change from the non-selection voltage 5 to the selection voltage Vl in the first frame period (from the non-selection voltage 6 to the selection voltage V2 in the second frame period), and from the selection voltage V1 to the selection voltage V1 in the second frame period. ■1 to non-selection voltage V5 (in the second frame period, from selection voltage v2 to non-selection voltage V6)
Therefore, the effective voltage theoretically determined by the Fourier integral and the waveform rounding of the actual driving voltage in consideration of the load g on the scanning line electrode can be made the same. As a result, the effective voltages of the drive signal Cn-)-1 of the upper liquid crystal display panel LCDI and the drive signal C1 of the lower liquid crystal display panel LCD2 shown in FIG. 2 can be made equal. As a result, good display quality can be obtained without white or black stripes occurring at the boundary line between the two liquid crystal display panels LCDI and LCD2.

Note that the level of each signal line drive signal is determined depending on the data to be displayed, and the level is changed in synchronization with each scanning line drive signal. Each signal line drive signal
Alternatively, it has a display level of the sixth voltage level (1) or v2 and a non-display level of the third or fourth voltage level (3) or (4). In the first frame period, each signal line drive signal has a selection level 1 of each scanning line drive signal and a non-selection level V
5, the display level is set to either the display level (6th level) (2) or the non-display level (4th level). Each signal line drive signal is set to the display level of the sixth level (2) or the non-display level of the third level V3 in the second frame period. For example, if the display dots to be driven by the signal line drive signal si are to be in a non-display state or a white display state, the signal line drive signal S1 is
As shown in the figure, the voltage is changed from voltage ■3 to voltage ■4.

Further, the signal line drive signal S2 corresponding to black data is
For example, in synchronization with the selection timing of the scanning line electrode drive signal C2, voltage V3 is changed to a selection voltage such as voltage v2, and then to voltage v4.

As a result, the dot formed at the intersection of the scanning line electrode to which the scanning line electrode drive signal C2 is supplied and the signal line electrode to which the signal line drive signal S2 is supplied has an operating point B shown in FIG. A dot formed at the intersection of the scanning line electrode to which the scanning line electrode drive signal C2 is supplied and the signal line electrode to which the signal line drive signal S1 is supplied is supplied with an effective voltage such as:
By supplying an effective voltage such as the operating point W shown in FIG. 4, both dots display black and white.

[Effects] (1) Of the scanning line drive signals with a duty of 1/(n+2), the fi+1th and second scanning line electrodes are applied to the scanning line electrodes adjacent to each other at the junction of the two liquid crystal display panels. By supplying the signals, drive signals having the same change level can be supplied to the scanning line electrodes of the two liquid crystal display panels at the junction. As a result, since the effective voltage can be made equal, the brightness and darkness of the dots at the junction can be made almost the same, so that it is possible to prevent the occurrence of white or black streaks at the junction.

f211/(n←2) duty scanning line drive (with a simple configuration in which the scanning line electrode drive signal at either end of number 8 is not used), the display at the junction of the two liquid crystal display panels is This has the effect of improving quality.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that this invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor. For example, in the embodiment shown in FIG. 1, the upper and lower liquid crystal display panels LCDI and LCD2
are respectively n+1 scanning electrodes, and the scanning line drive signals c1 to c1 are applied to the upper liquid crystal display panel LCDI in order from the top.
Cn+l is supplied, and scanning line drive signals 02 to Cn4-2 are supplied to the lower liquid crystal display panel LCD2 in order from the top. , Cn+ l and 0
It is also possible to supply drive signals having the same amount of level change, such as 2. In this case, dots with slightly different brightness and darkness are displayed at the top and bottom ends of the display screen made up of two liquid crystal display panels, but this does not cause any visual disturbance as in the case of a display screen made up of one liquid crystal display panel.

Further, the waveform of the drive signal can adopt various embodiments such as a 1/4 bias method. The duty of the scanning line electrode drive signal is arbitrarily set according to the number of scanning line electrodes of the liquid crystal display panel.

In addition, a scanning line drive signal with a duty of 1/(n+2) is formed, and drive signals at both ends are excluded from the 2nd Pli to the n+th
The first drive signal may be supplied to one liquid crystal display panel. In this case, since the effective voltages for all the scanning line electrodes can be made equal, the brightness and darkness of the dots on both sides including the scanning line electrodes at both ends can be made the same.

[Application field]

This invention can be widely used in liquid crystal display devices.

[Brief explanation of drawings]

Fig. 1 is a process diagram showing an embodiment of the present invention, Fig. 2 is an enlarged view of display dots at the joint, and Fig. 3 explains an example of the operation of dot matrix liquid crystal display scanning. The waveform diagram for this purpose, FIG. 4, is a characteristic diagram of the liquid crystal. L CD 1, L CD 2...Liquid crystal display panel, C-DRV...Scanning line electrode drive circuit, C0NT...Display control circuit, 5-DRVI, 5-DRV2...Signal line electrode drive circuit 1st Figure 2 figure

Claims (1)

[Scope of Claims] A scan line drive circuit that forms scan line electrode drive signals of 1 to n+2 with a duty of 1, 1/(n+2), and of the n+2 scan line electrode drive signals of the scan line drive circuit, and two liquid crystal display panels having a dot matrix configuration to which the scanning line electrode driving signal is supplied in parallel, and the n+1th scanning line electrode is driven to the scanning line electrodes adjacent to each other at the junction of the two liquid crystal display panels. signal and second
A liquid crystal display device, characterized in that the liquid crystal display device is configured to supply respective scanning line electrode drive signals. 2. The liquid crystal display device according to claim 1, wherein the scanning line electrode drive signal with a duty of 2,1/(n+2) is a multivalued signal of a 1/5 bias system.