JPS62125669A - Manufacture of bipolar transistor - Google Patents
Manufacture of bipolar transistorInfo
- Publication number
- JPS62125669A JPS62125669A JP26647985A JP26647985A JPS62125669A JP S62125669 A JPS62125669 A JP S62125669A JP 26647985 A JP26647985 A JP 26647985A JP 26647985 A JP26647985 A JP 26647985A JP S62125669 A JPS62125669 A JP S62125669A
- Authority
- JP
- Japan
- Prior art keywords
- region
- base
- emitter
- conductivity type
- mask layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Bipolar Transistors (AREA)
Abstract
Description
【発明の詳細な説明】
〈産業」−の利用分野〉
本発明はバイポーラ1〜ランジスタ装置ざjの製造方法
に係わり、特に、グラフトベース領域とエミッタ領域と
を自己整合的に形成するバイポーラ1〜ランジスタ装置
の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION <Field of Application in Industry> The present invention relates to a method of manufacturing bipolar devices 1 to transistor devices, and particularly relates to a method for manufacturing bipolar devices 1 to 1 to transistor devices in which a graft base region and an emitter region are formed in a self-aligned manner. The present invention relates to a method of manufacturing a transistor device.
〈従来の技術〉
第2図(a)乃至(e)は従来のバイポーラ1〜ランジ
スタ装置の製造方法の各工程を示す断面図であり、該製
造方法においては、まず、n型の半導体基板1の表面を
熱酸化して二酸化シリコン膜2を成長させる(第2図(
a))。続いて、ホトエツチングにより二酸化シリコン
膜2を選択的に除去し、グラフ1〜ベース形成予定領域
を露出させる。このグラフトベース形成予定領域にp型
の不純物を導入してグラフ1へベース領域z3を形成す
る(第2図(b))。この後、ホトレジス1へ工程を経
て二酸化シリコン膜2を選択的に除去し、ベース形成予
定領域を露出させ、P型の不純物を導入してベース領域
4を形成する(第2図(C))。<Prior Art> FIGS. 2(a) to 2(e) are cross-sectional views showing each step of a conventional method for manufacturing a bipolar device 1 to a transistor device. In this manufacturing method, first, an n-type semiconductor substrate 1 is The surface of the silicon dioxide film 2 is grown by thermal oxidation (see Fig. 2).
a)). Subsequently, the silicon dioxide film 2 is selectively removed by photoetching to expose the region from graph 1 to the region where the base is to be formed. A p-type impurity is introduced into this graft base formation region to form a base region z3 in graph 1 (FIG. 2(b)). Thereafter, the silicon dioxide film 2 is selectively removed through a process on the photoresist 1 to expose the region where the base is to be formed, and P-type impurities are introduced to form the base region 4 (FIG. 2(C)). .
ベース領域4の形成工程が終了すると、半導体基板1の
表面は再び二酸化シリコンll’a 2で被われるので
5ホl〜レジスl〜]二程により二酸化シリコン膜2を
選択的に除去してベース領域4中のエミッタ形成予定領
域を露出させる(第2図(d))。続く工程ではエミッ
タ形成予定領域にn型の不純物を導入してエミッタ領域
5を形成しく第2図(e))、以後標準的な工程を経て
バイポーラトランジスタ装置が完成する。When the step of forming the base region 4 is completed, the surface of the semiconductor substrate 1 is covered with silicon dioxide ll'a 2 again, so the silicon dioxide film 2 is selectively removed in step 5 to form the base region. A region in region 4 where an emitter is to be formed is exposed (FIG. 2(d)). In the next step, n-type impurities are introduced into the region where the emitter is to be formed to form the emitter region 5 (FIG. 2(e)), and the bipolar transistor device is then completed through standard steps.
〈発明の解決しようとする問題点〉
−1−記従来の製造方法では、グラフトベース領域3の
形成とベース領域4の形成とエミッタ領域5の形成とが
互いに何等関係のない独立したホトレジスト工程を経て
形成されていたので、マスク合せの誤差により第3図に
示されているようにエミッタ領域5の一部が高不純物濃
度のグラフトベース領域3内に及ぶことがあった。その
結果、ベース・エミッタ間のキャパシタンスが大きくな
り、バイポーラ1−ランジスタ装置の高周波特性が悪化
するという問題点が生し、加えて、ベース・エミッタ間
のキャリアの移動が一様でなくなり、ノイズ特性も悪化
するという問題点もあった。<Problems to be Solved by the Invention> In the conventional manufacturing method described in -1-, the formation of the graft base region 3, the formation of the base region 4, and the formation of the emitter region 5 are performed in independent photoresist steps that have no relation to each other. Since the emitter region 5 was formed over a period of time, a part of the emitter region 5 may extend into the graft base region 3 having a high impurity concentration due to an error in mask alignment, as shown in FIG. As a result, the capacitance between the base and emitter becomes large, resulting in a problem that the high frequency characteristics of the bipolar transistor device deteriorate.In addition, carrier movement between the base and emitter becomes uneven, resulting in noise characteristics. There was also the problem that it worsened.
従って、本発明はグラフ1−ベース領域とエミッタ領域
とを自己整合させ、エミッタ領域をグラフトベース領域
外のベース領域に形成することにより、高周波特性とノ
イズ特性に優れたバイポーラ1〜ランジスタ装置の製造
方法を提供することを目的にしている。Therefore, the present invention can produce a bipolar transistor device with excellent high frequency characteristics and noise characteristics by self-aligning the base region and the emitter region and forming the emitter region in the base region outside the graft base region. The purpose is to provide a method.
〈問題点を解決するための手段〉
本発明は、第1導電型の半導体、!&板の表面部に第2
導電型の不純物を導入してベース形成予定領域を規定し
た後、該ベース形成予定領域内の所定領域をマスク層で
被い、該マスク層で被われた所定領域を除くベース形成
予定領域に第2導電型の不純物を導入して高不純物濃度
のグラフ1〜ベース形成予定領域を規定する。ベース領
域とクラフトベース領域とを形成した後、前記所定領域
を被っているマスク層を除去し該所定領域内のエミッタ
形成な定領域に第1導電型の不純物を導入してエミッタ
領域を形成することを要旨とする。<Means for solving the problems> The present invention provides a first conductivity type semiconductor,! &Second on the surface of the board
After defining a region where a base is to be formed by introducing a conductivity type impurity, a predetermined region within the region where a base is to be formed is covered with a mask layer, and a layer is formed in the region where a base is to be formed except for the predetermined region covered with the mask layer. 2-conductivity type impurity is introduced to define a high impurity concentration graph 1 to a region where a base is to be formed. After forming the base region and the craft base region, the mask layer covering the predetermined region is removed, and impurities of a first conductivity type are introduced into a predetermined region in the predetermined region where an emitter will be formed to form an emitter region. The gist is that.
〈実施例〉
第1図(a)乃至(g)は本発明の第1実施例の各工程
を示す断面図であり、まず、n型の半導体基板11の表
面を熱酸化して二酸化シリコン膜12を約5000人成
長させる(第1図(a))。<Example> FIGS. 1(a) to 1(g) are cross-sectional views showing each step of the first example of the present invention. First, the surface of an n-type semiconductor substrate 11 is thermally oxidized to form a silicon dioxide film. 12 to about 5,000 people (Figure 1 (a)).
続いて、ホトエツチングによりベース形成予定領域13
を露出させ、約40乃至50kevのエネルギでボロン
を1013乃至10′4注入する(第1図(b))。こ
の後、露出している半導体基板11の表面と二酸化シリ
コン膜12とを被うポリシリコン膜1−4を約1. O
OO人波着し、さらに窒化シリコン膜1−5を約200
0人波着する(第1図(C))。窒化シリコン膜15の
上にホトレジスト膜]−6を塗布し、これをパターン形
成してベース形成予定領域1;3中の所定領域をホ!へ
レジスト膜16で被う。この後、ホトレジスト膜1−6
をマスクとして窒化シリコン膜15を選択的に除去し、
露出したポリシリコン膜14を通して約60乃至70k
evで半導体基板]−1のグラフI・ベース形成予定領
域17に1014乃至1015のボロンを注入する(第
1−図(d))。ホトレジスト膜16を除去した後、約
1000℃の窒素雰囲気中で約30分加熱してベース領
域18とグラフ1〜ベース領域19とを形成する(第1
図(e))。この後、酸化雰囲気中でポリシリコン膜1
4を酸化すると、このポリシリコン膜14は二酸化シリ
コン膜となる。このポリシリコン膜14の酸化中に窒化
シリコン膜15の下のポリシリコン膜]−4の中心部2
0は酸化されない(第1図(f))。続いて、窒化シリ
コン膜15を除去した後、約30keyで約1016の
n型の不純物を酸化されずに残ったポリシリコン膜1.
4を通して注入しエミッタ領域21を形成する。しかる
後、ベース電極22とエミッタ電極23と裏メタル24
とを形成し、バイポーラトランジスタ装置を完成させる
(第1図(g))。Subsequently, the base formation area 13 is formed by photoetching.
is exposed, and 1013 to 10'4 of boron is implanted at an energy of about 40 to 50 keV (FIG. 1(b)). Thereafter, the polysilicon film 1-4 covering the exposed surface of the semiconductor substrate 11 and the silicon dioxide film 12 is removed by about 1. O
OO layer is applied, and silicon nitride film 1-5 is further applied to approximately 200 mm.
Zero people arrive at the wave (Figure 1 (C)). A photoresist film]-6 is applied on the silicon nitride film 15 and patterned to form a predetermined area in the base formation area 1; It is covered with a resist film 16. After this, the photoresist film 1-6
The silicon nitride film 15 is selectively removed using as a mask,
Approximately 60 to 70k through the exposed polysilicon film 14
1014 to 1015 boron is implanted into the base formation region 17 of the semiconductor substrate]-1 (FIG. 1(d)). After removing the photoresist film 16, the base region 18 and graphs 1 to 19 are formed by heating in a nitrogen atmosphere at about 1000° C. for about 30 minutes (first
Figure (e)). After this, the polysilicon film 1 is heated in an oxidizing atmosphere.
When the polysilicon film 14 is oxidized, the polysilicon film 14 becomes a silicon dioxide film. During the oxidation of this polysilicon film 14, the polysilicon film under the silicon nitride film 15 ]-4 center part 2
0 is not oxidized (FIG. 1(f)). Subsequently, after removing the silicon nitride film 15, about 1016 n-type impurities are removed from the remaining polysilicon film 1 without being oxidized using about 30 keys.
4 to form an emitter region 21. After that, the base electrode 22, emitter electrode 23 and back metal 24 are connected.
A bipolar transistor device is completed (FIG. 1(g)).
この実施例では、酸化されずに残ったポリシリコン膜の
中心部20を貫通してイオン注入がなされるので、該中
心部20は不純物濃度が+7+ <、エミッタ領域21
とエミッタ電極23との良好なオーミック接触を得られ
る。更に、エミッタ形成−r定領域20のポリシリコン
膜14を除去後エミッタ領域21を形成してもよいし、
あるいは、エミッタ形成予定領域20のポリシリコン膜
14を残したままでイオン注入することによりポリシリ
コン膜14をドープトポリシリコンにすることによりエ
ミッタ領域2】を形成してもよい。本実施例はNPN形
バイポーラ1−ランジスタについて示しであるが、T)
N P形バイポーラ1−ランジスタにも適用が可能で
ある。In this embodiment, ions are implanted through the central portion 20 of the polysilicon film that remains unoxidized, so that the impurity concentration in the central portion 20 is +7+<, emitter region 21
Good ohmic contact between the emitter electrode 23 and the emitter electrode 23 can be obtained. Furthermore, the emitter region 21 may be formed after removing the polysilicon film 14 in the emitter formation-r constant region 20,
Alternatively, the emitter region 2 may be formed by making the polysilicon film 14 into doped polysilicon by ion implantation while leaving the polysilicon film 14 in the emitter formation region 20. This example shows an NPN type bipolar 1-transistor, but T)
It can also be applied to an NP type bipolar transistor.
〈効果〉
以−ヒ説明してきたように、この発明し;よれば、マス
ク層に被われたベース形成予定領域の所定領域外にグラ
フ1へベース領域を、所定領域内にエミッタ領域をそれ
ぞれ形成したので、グラフトベース領域とエミッタ領域
とが重なる+1(がなく、良好な高周波特性とノイズ特
性とを有するバイポーラ1−ランジスタ装置が得られる
。<Effects> As explained below, according to the present invention, the base region is formed outside the predetermined region of the base formation region covered by the mask layer in graph 1, and the emitter region is formed within the predetermined region. As a result, there is no overlap between the graft base region and the emitter region, and a bipolar 1-transistor device having good high frequency characteristics and noise characteristics can be obtained.
第1−図(a)乃至(g)は本発明の一実施例の各工程
を表わす断面図、第2図(a)乃至(e)は従来例の各
工程を表わす断面図、第3図は従来例の問題点を説明す
る断面図である。
1]・・・・・・・半導体基板、
13・・・・・・・ベース形成予定領域、15・・・・
・・・マスク層、
]7・・・・・・・グラフトベース形成予定領域、18
・・・・・・・ベース領域、
19・・・・・・・グラフトベース領域、20・・・・
・・・エミッタ形成予定領域、21・・・・・・・エミ
ッタ領域。
特許出願人 ローム株式会礼代理人 弁
理士 桑 井 清 −(e5)
(b)
(C)
第1図
(CI)
ce>
第1図
(↑)
第1図
(a)
(b)
(C)
第乙図
第3図1 - Figures (a) to (g) are cross-sectional views showing each process of an embodiment of the present invention, Figures 2 (a) to (e) are cross-sectional views showing each process of a conventional example, and Figure 3. FIG. 2 is a sectional view illustrating problems in the conventional example. 1]... Semiconductor substrate, 13... Base formation area, 15...
...Mask layer, ]7...Graft base formation area, 18
...Base region, 19 ...Graft base region, 20 ...
. . . Emitter formation planned region, 21 . . . Emitter region. Patent Applicant ROHM Co., Ltd. Representative Patent Attorney Kiyoshi Kuwai - (e5) (b) (C) Figure 1 (CI) ce> Figure 1 (↑) Figure 1 (a) (b) (C) Figure B Figure 3
Claims (1)
を導入してベース形成予定領域を規定する工程と、該ベ
ース形成予定領域内の所定領域をマスク層で被う工程と
、該マスク層で被われた所定領域を除くベース形成予定
領域に第2導電型の不純物を導入して高不純物濃度のグ
ラフトベース形成予定領域を規定する工程と、ベース領
域とグラフトベース領域とを形成する工程と、前記所定
領域を被っているマスク層を除去し該所定領域内のエミ
ッタ形成予定領域に第1導電型の不純物を導入してエミ
ッタ領域を形成する工程とを有するバイポーラトランジ
スタ装置の製造方法。A step of introducing an impurity of a second conductivity type into the surface portion of the semiconductor substrate of the first conductivity type to define a region where a base is to be formed; a step of covering a predetermined region within the region where a base is to be formed with a mask layer; A step of introducing a second conductivity type impurity into a region where a base is to be formed except a predetermined region covered with a mask layer to define a region where a graft base is to be formed with a high impurity concentration, and forming a base region and a graft base region. a step of removing a mask layer covering the predetermined region and introducing an impurity of a first conductivity type into a region where an emitter is to be formed in the predetermined region to form an emitter region. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26647985A JPS62125669A (en) | 1985-11-26 | 1985-11-26 | Manufacture of bipolar transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26647985A JPS62125669A (en) | 1985-11-26 | 1985-11-26 | Manufacture of bipolar transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62125669A true JPS62125669A (en) | 1987-06-06 |
Family
ID=17431498
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP26647985A Pending JPS62125669A (en) | 1985-11-26 | 1985-11-26 | Manufacture of bipolar transistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62125669A (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4982281A (en) * | 1972-12-11 | 1974-08-08 | ||
JPS5024083A (en) * | 1973-07-04 | 1975-03-14 | ||
JPS60223159A (en) * | 1984-04-18 | 1985-11-07 | Rohm Co Ltd | Manufacture of semiconductor device |
-
1985
- 1985-11-26 JP JP26647985A patent/JPS62125669A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4982281A (en) * | 1972-12-11 | 1974-08-08 | ||
JPS5024083A (en) * | 1973-07-04 | 1975-03-14 | ||
JPS60223159A (en) * | 1984-04-18 | 1985-11-07 | Rohm Co Ltd | Manufacture of semiconductor device |
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