JPS6159658B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming an electrode or an electrode wiring layer on a semiconductor substrate by dry etching treatment.

To form an electrode or an electrode wiring layer on a semiconductor substrate, usually a metal film is formed on the entire surface of the semiconductor substrate, and then an etching mask having a predetermined pattern is formed on top of this to remove unnecessary parts of the metal film. This is done by performing a selective etching process to remove the .

Such selective etching processing methods are broadly classified into wet etching methods using well-known etching solutions for metal films and dry etching methods such as plasma etching methods.

Dry etching has been widely adopted in place of wet etching in recent years because it does not require the use of an etching solution unlike wet etching, does not require drainage treatment, and can keep the working environment clean. It is being done.

In the dry etching method, the etching speed in the vertical direction is higher and the etching speed in the horizontal direction is lower than that in the wet etching method. Therefore, when an electrode wiring layer is formed by etching a metal film formed on a semiconductor substrate using a dry etching method, for example, the etched cross section of the electrode metal layer 1 formed as shown in FIG. The shape is substantially perpendicular to the surface of the semiconductor substrate 2, and its cross-sectional shape does not change even under the influence of side etching or over-etching, and only the pattern width of the electrode metal layer is reduced with a substantially perpendicular cross-sectional shape.

By the way, when an electrode wiring layer having a cross-sectional shape perpendicular to the surface of the semiconductor substrate is formed on a semiconductor substrate as an electrode wiring layer of a semiconductor device, the following problems may occur. For example, when it is necessary to form a protective film such as a silicon dioxide (SiO ₂ ) film on a semiconductor substrate that has a wiring pattern with a vertical cross-sectional shape, it is difficult to uniformly apply the protective film, and it is difficult to apply the protective film uniformly. When it is necessary to perform this, a so-called step disconnection may occur in the second and subsequent wiring layers at a stepped portion of the electrode wiring layer having a cross-sectional shape substantially perpendicular to the surface of the semiconductor substrate.

The present invention was made in view of these problems, and after forming a prescribed resist pattern on a metal film formed on the surface of a semiconductor substrate, electrodes are etched by dry etching using a halogen gas. In forming the electrode wiring layer, a gas having a halogen radical absorbing group is added to the halogen-based gas to obtain an electrode and an electrode wiring layer in which the etched cross section has a tapered shape. .

Next, a method of forming an electrode wiring layer on a semiconductor substrate according to an embodiment of the present invention will be described.

First, high-purity aluminum was formed to a thickness of 1.5 μm on a silicon substrate on which a predetermined area had been formed, and then a positive film manufactured by Shipley Co., Ltd. called AZ-1350J was used as an etching mask when forming an electrode wiring layer. A mold photoresist is applied to a thickness of about 1 μm, and a resist pattern is formed by a well-known photolithography process. The sample with the etching mask formed in this way was treated with CCl ₄ 0.2torr, C ₂ H ₄ 0.095torr,
High frequency power of 800 W was applied for 21 minutes while flowing a mixed gas consisting of 0.17 torr of helium (He).

A photograph of the results is shown in Figure 2.

This photograph was taken using a scanning electron microscope, and 1 is an aluminum wiring layer formed by this method, and 2 is a semiconductor substrate.

As is clear from a comparison of FIGS. 1 and 2, by adding ethylene to the etching gas, an aluminum wiring layer having a tapered cross-sectional shape can be formed. Note that the magnification of FIGS. 1 and 2 is 10,000 times.

In addition, the partial pressure of carbon tetrachloride in the etching gas is
FIG. 3 shows a graph of the cross-sectional taper angle measured when P ₁ and ethylene partial pressure were P ₂ and the partial pressure ratio of ethylene to carbon tetrachloride P ₂ /P ₁ was varied.
The horizontal axis is the ethylene partial pressure ratio P ₂ /P ₁ and the vertical axis is the taper angle of the etched cross section with respect to the substrate surface. It can be seen that as the partial pressure ratio of ethylene increases, the taper angle decreases and can be reduced to about 60°. As is clear from FIG. 3, the taper angle can be controlled by the amount of ethylene added, but it is desirable that the partial pressure ratio of ethylene is 50% or less. If the etching speed is higher than that, the wear of the resist pattern will be rapid compared to the etching speed, leading to a decrease in pattern accuracy, making it impossible to put it into practical use.

In this way, by adding a substance having a halogen radical absorbing group to the etching gas, the shape of the etched cross section can be made tapered. The reason for this is not clear, but for example, by reducing the amount of chlorine radicals that etch aluminum, the etching rate of aluminum slows down and the resist pattern is gradually etched. This is thought to be due to the influence of the etched cross section.

Here, as a gas that absorbs chlorine radicals,
Although C ₂ H ₄ was used, other hydrocarbons such as hydrogen (H ₂ ) or ethane (C ₂ H ₆ ) are also effective.

In addition to Al, the same effect can be obtained with molybdenum (MO), tungsten (W), titanium (Ti), chromium Cr, gold (Au), platinum (Pt), etc. as the metal layer to be etched.

As explained above, the cross section of the electrode and electrode wiring layer formed on the semiconductor substrate by the method of the present invention becomes tapered, and it is possible to form an insulating coating on a multilayer wiring layer or an electrode wiring layer without interruption. It can be done, and the industrial value is extremely large.

[Brief explanation of the drawing]

FIG. 1 is an electron micrograph of an electrode wiring layer etched using the conventional method, and FIG. 2 is an electron micrograph of an electrode wiring layer etched using the method of the present invention. FIG. 3 is a diagram showing the relationship between the ethylene partial pressure ratio and the taper angle of the etched cross section of the wiring layer. 2...Semiconductor substrate, 1...Aluminum wiring layer.

Claims (1)

[Claims] 1. A semiconductor substrate on which a conductor film is formed on one principal surface and a resist pattern for forming an electrode or an electrode wiring layer is further formed on the conductor film, and a substance having a halogen radical absorbing group is placed in a halogen gas. is added, and dry etching is performed using an etching gas selected such that the ratio of the partial pressure of the additive substance to the partial pressure of the halogen-based gas is 50% or less to form an electrode or an electrode wiring layer. manufacturing method.