JPS6146026A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent any increase in the chip size, by a method wherein, when alignment of a pattern is effected with a photoresist sensitivity wavelength, alignment is effected many times with respect to the same target while gradually reducing the size of patterns of reticles or masks which are sequentially used in respective steps. CONSTITUTION:The size of a window 2 which is aligned with the same target is gradually reduced as the process proceeds. More specifically, with respect to each target 4 having a mark 3 of the window used in a previous step, a window havint a size which enables the window mark 3 to be out of sight, that is, which is smaller than that of the window used in the previous aligning step, is used in a subsequent step. In consequence, the window mark left in the previous step is out of sight, and the alignment accuracy is not deteriorated. Repetition of this process enables pattern alignment to be effected in a plurality of steps using only one target, and it is possible to prevent any increase in the chip size due to the alignment mark.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Field of Application) The present invention relates to a method of manufacturing a semiconductor device using multiple steps of forming a pattern on a photoresist.

(Prior art) In the manufacturing process of semiconductor devices, the formation of fine patterns is an important step, and the alignment of patterns during pattern formation has become extremely difficult as the density and miniaturization of elements increase. strict precision is now required.

The present invention relates to alignment marks used for pattern alignment.

Before describing the present invention, an example of a method for recognizing an alignment mark and an accompanying misalignment will be described.

As an alignment mark, a mark formed on a wafer is temporarily called a target, a mark formed on a reticle or a mask is temporarily called a window, and a target t' is shown in Fig. 1 as an example of each mark. , window 2 is shown in FIG.

FIG. 3 shows a state in which the target L and the window 2 overlap without any positional deviation. If we measure the one-dimensional light intensity distribution on line segments P and Q in Figure 3 and perform all mathematical operations, it will be 84.
Obtain the peak shown in the figure. Here, the peaks m1 to m4 in the figure indicate the positions of the ends of the window 2, and the peaks w1 to W4 indicate the positions of the ends of the target t. If there is no positional deviation as shown in FIG. 3, the centers of ml and m2 must match the centers of Wl and Wl, and the centers of m3 and m4 must match the centers of W3 and W4. ml and rn 2 when the positions of the busy tag, t L and window 2 in Fig. 5 are misaligned,
Let the center coordinates of in 3 and m4, Wl and Wl, and W3 and W4 be d1゜d2 * tl * t2, respectively, and
The amount of deviation in each direction is ΔX.

If ΔY is expressed as, target 1t-1''!
If it is moved by 1 ΔX in the direction and -ΔY in the Y direction, the positional deviation will disappear as shown in FIG. The above is an example of a method for recognizing seven alignment marks and positional deviations related thereto.

Various wavelengths are used for the source of irradiation to recognize the positional relationship between the target and window of the alignment mark mentioned above, but the one that provides the best alignment accuracy is the one that is best suited for the putter/putter due to the consistency of the optical system. This is the wavelength for transfer, that is, the wavelength to which the photoresist is sensitive.

However, if the alignment is confirmed using the photoresist's photosensitive wavelength, the area near the target on the wafer that is illuminated by light will be exposed while all the confirmation steps are being performed. After that, when the normal processes of development, processing, and chipping are performed, a trace of a window remains near the target on the wafer as shown in FIG. If you use the same target button during the alignment confirmation process of this Birdman alignment exposure process,
The overlapping pattern does not look like the one shown in FIG. 5, but the window machining and zigzag left from the previous process can be seen as shown in FIG. 7, resulting in an alignment error.

For this reason, if alignment is confirmed using a photoresist photosensitive wavelength, it is necessary to provide as many targets on the t-wafer as there are alignment exposure steps, and the original chip area becomes larger, resulting in The drawback was that the yield of chips was low.

(Problems to be Solved by the Invention) An object of the present invention is to use K so that L targets can be used for multiple alignment steps when aligning a putter at seven photoresist photosensitive wavelengths. be.

(Means for Solving the Problems) According to the present invention, there is provided a method for manufacturing a semiconductor device in which alignment is performed using a reticle or mask having a sequentially smaller pattern in each process, with the same alignment target being used. .

(Example) The present invention will be explained below.

A feature of the present invention is that the window corresponding to the same target is made smaller as the process progresses.

In other words, as shown in FIG. 6, for the target 4 on which the window mark mark 3 remains from the previous process, in the next process, the window mark 3 is made so large that the window mark 3 is no longer visible. If a window υ is smaller than the window for the alignment process, as shown in FIG. 8, the pick/do marks from the previous process will disappear and the alignment accuracy will not be impaired. Furthermore, the window in the next step is made even smaller. By repeating this process, it is possible to perform pattern alignment in multiple steps using only a single target, and as a result, it is possible to prevent an increase in chip size due to the 7-line alignment mark.

In the present invention, the same effect can be obtained even if the alignment mark shown in FIG.

[Brief explanation of drawings]

FIG. 1 is a plan view showing a target rattle on a wafer. FIG. 2 is a plan view showing the window of the mask. FIG. 3 is a plan view showing how a window on a mask or reticle is projected onto a target on a wafer. FIG. 4 is a graph obtained by performing mathematical operations on the reflection intensity distributions taken at points P and Q in FIG. FIG. 5 is a plan view showing how the window is projected onto the target. FIG. 6 is a plan view showing the vicinity of the target after being used for alignment. FIG. 7 is a plan view showing how the same window is projected by using the target used for alignment again for alignment. FIG. 8 is a plan view showing how a smaller window is projected by using the target for alignment again after it has been used for alignment. L, 4...Target, 2...Group/Window, 3...Wind trace. 4 reached! ; No P? ■ Bud 2 times $ 3 Zuta 5 times 2nd time

Claims (1)

[Claims] In a semiconductor device manufacturing method in which a step of exposing a photoresist to form a pattern is performed multiple times, the size of an alignment pattern on a reticle or mask that is aligned with the same alignment target on a wafer is determined by the size of the alignment pattern on the reticle or mask. A method for manufacturing a semiconductor device, characterized in that the size is reduced as the formation process is repeated.