JPS6146647A - Data transmission system - Google Patents

Abstract

PURPOSE:To inform that a processor is defective due to a fault to a data transmission line supervisory device and other processors from the faulty processor by providing a system state detection circuit and a fault informing frame generating circuit to each data transmitter. CONSTITUTION:When the state of a system state signal line 401 changes from ''0'' representing the normal state to ''1'' representing the faulty state, the state of a fault informing frame generation command signal line 403 is brought to logical 1, a fault information frame generating circuit 404 generates a fault informing frame whose address is set to a global address and it is transmitted to a data signal line 405. Thus, a selection circuit 408 selects a data signal line 405 and transmits a fault forming frame to a data signal line 406. Further, a data transmission line transmitting circuit 409 transmits a fault informing frame to a data transmission line transmission signal line 701.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention is a network system configured between a plurality of processors. Regarding transmission systems.

(Prior Art) Conventionally, in a network system configured between multiple processors, there is often a means to notify processors connected by a data transmission path when the system goes down, so it is difficult to install a data transmission path monitoring device by yourself. and other processors could not be notified of the failure.

(Problem to be Solved by the Invention) Therefore, according to the known technology, the communication partner can know whether the other party is down due to a failure only by whether or not the retry determined by the communication procedure has failed. was completed. Therefore, the details of the other party's failure are unknown, it takes a long time to detect the failure, and there are disadvantages in that the other party cannot recognize the failure at all unless communication is made with the other party.

An object of the present invention is to eliminate the above-mentioned drawbacks by enabling a faulty processor to notify a data transmission path monitoring device and other processors connected to the data transmission path that it has failed due to a fault. An object of the present invention is to provide a data transmission system configured to improve the reliability of the data transmission system.

(Means for Solving the Problems) A data transmission system according to the present invention includes a plurality of data transmission devices each connected to a plurality of processors, and a data transmission path for coupling the plurality of data transmission devices. It is constituted by an inter-processor network, and each data transmission device is equipped with a system state detection circuit and a fault notification frame generation circuit.

The system state detection circuit is for detecting a change in the system state when a change occurs in the system state sent from the processor connected to the own data transmission device.

The fault notification frame generation circuit generates a fault notification frame according to a direct instruction sent from the system state detection circuit in response to a change in the system state, and also instructs to send the fault notification frame to the data transmission path. It is.

(Example) Next, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a network system between a plurality of processors constituting a data transmission system according to the present invention. In FIG. 1, 1 to 3 are processors, 4 to 6 are data transmission devices, and 7 is a data transmission line.

FIG. 2 is a block diagram showing an embodiment of the data transmission device 4 shown in FIG. 1 constructed according to the present invention. Second
The data transmission device 4 shown in the figure has a signal line 401 representing the system status from the processor 1, and a system status signal line 4.
System state detection circuit 40 for detecting a change in 01
2, the signal line 406 that instructs the generation of a failure notification frame by the output of the system status detection circuit 402, and the signal line 403 that instructs the generation of a failure notification frame.
If so, a failure notification frame generation circuit 404 for generating a failure notification frame and a failure notification frame generation circuit 4
The signal m405 carrying the output data of 04 and the processor 1
A signal line 413 for carrying data from the signal line 41, a processor receiving section 411 for inputting data from the signal line 41, and a signal line 407 for carrying the output data of the processor receiving section 411.
If the state on the fault notification frame generation instruction signal line 407 is %1, the data signal line 407 is selected, and if the state is %1, the data signal line 405 is selected.
Signal line 4 carrying output data of 08 and 9 selection circuit 408
06 and.

A data transmission line transmitting circuit 409 for inputting the data on the signal line 406, a signal line 701 for transmitting the output data of the data transmission line transmitting circuit 409 to the transmission line, and a data transmission line 701 for transmitting the data input from the data transmission line 7 as data. and a signal line 702 for receiving from the transmission path 7.

A data transmission line receiving circuit 410 for inputting the data of the data transmission line receiving signal line 702, a processor transmitting section 412 for sending the output of the data transmission line receiving circuit 410 to the processor 1, and output data of the processor transmitting section 412. It consists of a signal line 414 for carrying the .

Next, with reference to FIG. 2, the operation of the data transmission device constituting the data transmission system according to the present invention will be sequentially explained.
This section explains the operation of sending a failure notification frame. If the device shown in FIG. 2 is in a normal state, the processor 1 sends -ON to the system state signal line 401, and if it is in an abnormal state, it sends out a signal 11. The system state detection circuit 402 is
When the state of the system status signal line 401 changes from -ON to 11#, the state of the failure notification frame generation instruction signal line 403 is changed to zI I. When the state of the failure notification frame generation instruction signal line 403 is set to %1#, the failure notification frame generation circuit 404 generates a failure notification frame set to the destination global address, and sends it to the data signal line 405. do. At this time, since the state of the fault notification frame generation instruction signal line 406 is %1, the selection circuit 408 selects the data signal line 405 side and sends it to the data signal line 406. Furthermore, data signal line 4
Data transmission line transmitting circuit 409 inputting data on 06
sends the fault notification frame to the data transmission path transmission signal line 701
Send to. With the above steps, the failure notification frame transmission operation is completed.

As explained above, in the present invention, the data transmission device can detect changes in the connected processor or system status,
It is possible to notify other processors on the data transmission path of the failure details of the own processor.

(Effects of the Invention) As described above, the present invention is configured such that a data transmission device can detect a change in the system state of a processor, and can notify other processors of the contents of the change. With this processor, it is not necessary to communicate with the other party that the other party's processor is down and wait until a retry fails, but it has the advantage that it can be immediately known after a change in the system state.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a network system between a plurality of processors that implements a data transmission system according to the present invention. FIG. 2 is a block diagram showing an embodiment of the data transmission device shown in FIG. 1 according to the present invention. 1 to 3...Processors 4 to 6...Data transmission device 7...Data transmission path 402...System status detection circuit 404...Failure notification frame generation circuit 408...Selection circuit 409... ...Data transmission line transmitting circuit 410...Data transmission line receiving circuit 411...Processor receiving section 412...Processor transmitting section 6

Claims (1)

[Claims] In a data transmission system configured with an inter-processor network consisting of a plurality of data transmission devices each connected to a plurality of processors and a data transmission path for coupling between the plurality of data transmission devices, the data transmission device a system state detection circuit for detecting a change in the system state when a change occurs in the system state sent from the processor connected to its own data transmission device; A failure notification frame generation circuit that generates a failure notification frame in accordance with an instruction sent from a state detection circuit and instructs to send the failure notification frame to the data transmission path. A data transmission system characterized by: