JPS61281562A - Semiconductor light-emitting element - Google Patents
Semiconductor light-emitting elementInfo
- Publication number
- JPS61281562A JPS61281562A JP60123076A JP12307685A JPS61281562A JP S61281562 A JPS61281562 A JP S61281562A JP 60123076 A JP60123076 A JP 60123076A JP 12307685 A JP12307685 A JP 12307685A JP S61281562 A JPS61281562 A JP S61281562A
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- ohmic electrode
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Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
この発明は通信用の半導体発光素子、特に面発光素子に
関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor light emitting device for communication, particularly a surface emitting device.
(従来の技術)
従来、この種の面発光型半導体光素子が種々提−されて
いる。?3図は、この出願に係る発明者等が先に提案し
た素子構造を示す要部を断面とする斜視図である。この
従来提案された素子構造はp型GaAs基板を用いた内
部電流狭窄構造であり、バラス構造のも、のと同程度の
発光効率を狙ったものである(文献:[第31回応用物
理学関係連合講演会講演予稿集J 、 31a、−E−
3)。(Prior Art) Various surface-emitting type semiconductor optical devices of this type have been proposed in the past. ? FIG. 3 is a perspective view showing a main part in cross section, showing the element structure previously proposed by the inventors of this application. This conventionally proposed device structure is an internal current confinement structure using a p-type GaAs substrate, and the ballast structure also aims to achieve the same level of luminous efficiency as the ballast structure (Reference: [31st Applied Physics Related Union Lecture Proceedings J, 31a, -E-
3).
この素子構造は、第3図に示すように、(100)面方
位p型GaAs基板lO上に成長させた電流狭窄用のn
型GaAs層(以下、電流阻止層とも称す、る) 12
を具、える。このn型GaAs層12にはその表面から
基板10に達する、電流経路となる穴14が形成されて
いて、この穴14上にp型AlxGa1−xAs下側ク
ラッド層18、p型AILyGaI−yAs発光層18
、n型AuzGaI−zAs上側クラッド層20及びn
型GaAsオーミック接触層22を成長させて有してい
る。さらに、このオーミック接触層22に上側クラッド
層20に至る光取り出し用の窓24が形成されている。As shown in FIG. 3, this device structure consists of a current confinement n
Type GaAs layer (hereinafter also referred to as current blocking layer) 12
Ingredients and ingredients. In this n-type GaAs layer 12, a hole 14 is formed that reaches the substrate 10 from its surface and serves as a current path. layer 18
, n-type AuzGaI-zAs upper cladding layer 20 and n
A GaAs type ohmic contact layer 22 is grown. Furthermore, a window 24 for light extraction reaching the upper cladding layer 20 is formed in this ohmic contact layer 22 .
この素子構造では、電流は電流用Iに1層12に形成し
た穴14のみを流れ、発光層18の中央部付近のわん曲
した部分に効率良く集中し、光取り出し窓24から−I
一方に発光する。In this element structure, the current flows only through the hole 14 formed in one layer 12 in the current I, efficiently concentrates on the curved part near the center of the light emitting layer 18, and passes through the light extraction window 24 through the -I
It emits light on one side.
(発明が解決しようとする問題点)
しかしながら、このような従来の素子構造であると、そ
の製作に当り、光取り出し窓24の形成のために、オー
ミック接触層22を上側クラッド層20に達するまでの
エツチングを行う必要がある。これがため、上側クラッ
ド層20のAuGaAsが露出してAn酸化膜が形成さ
れてしまい、その結果、光出力に損失が生ずるという問
題があった。(Problems to be Solved by the Invention) However, with such a conventional device structure, in order to form the light extraction window 24, the ohmic contact layer 22 must be extended until it reaches the upper cladding layer 20. It is necessary to perform etching. As a result, the AuGaAs of the upper cladding layer 20 is exposed and an An oxide film is formed, resulting in a problem of loss of optical output.
さらに、この上側クラッド層の表面反射によって光が3
3%程度反射されてしまい、これも光出力の低下の一因
となていた。Furthermore, the light is reflected by the surface of this upper cladding layer into three
Approximately 3% of the light was reflected, which also contributed to the decrease in light output.
従って、この目的は光出力の損失の原因となるようなエ
ツチング工程を不要とし、光取り出し効率を高めるよう
にした構造の半導体発光素子を提供することにある。Therefore, the object is to provide a semiconductor light emitting device having a structure that eliminates the need for an etching process that causes loss of light output and improves light extraction efficiency.
(問題点を解決するための手段)
この目的の達成を図るため、この発明の半導体発光素子
を、基板上に内部電流阻止層と、下側クラッド層と、活
性層と、−上側クラッド層とを具える半導体発光素子と
する。(Means for Solving the Problems) In order to achieve this object, the semiconductor light emitting device of the present invention is provided with an internal current blocking layer, a lower cladding layer, an active layer, and an upper cladding layer on a substrate. A semiconductor light emitting device is provided.
そして、この基板を高不純物濃度のp型基板とし及び」
−側クラッド層をオーミック接触の形成し易いn型とす
る。Then, this substrate is made into a p-type substrate with high impurity concentration.
The - side cladding layer is made of n-type, which facilitates the formation of ohmic contact.
Sらに、この上側クラッド層」二に直接設けられたリン
グ状オーミック電極を具えると共に、このオーミック電
極のリングの内側及び外側に低反射率絶縁体を具えてい
る。この場合、低反射率とは従来の表面反射率を実質的
にOとするか、これに近い値に近づけるような反射率を
意味する。A ring-shaped ohmic electrode is provided directly on the upper cladding layer 2, and low reflectance insulators are provided on the inside and outside of the ring of the ohmic electrode. In this case, low reflectance means a reflectance that makes the conventional surface reflectance substantially O or approaches a value close to this.
(作用)
このような構造によれば、上側クラッド層上に直接リン
グ状オーミック電極をつけることが出来るので、従来の
ような成長工程及び光取り出し用の窓のエツチング工程
が不要である。従って、この窓開けに起因する表面荒れ
を防■にし、光取り出し効率を高めることが出来る。(Function) According to such a structure, since the ring-shaped ohmic electrode can be directly attached to the upper cladding layer, the conventional growth process and the process of etching a window for light extraction are unnecessary. Therefore, surface roughness caused by opening the window can be prevented and light extraction efficiency can be increased.
さらに、この発明の構造によれば、光取り出し窓に対応
する」−側クラッド層部分に絶縁体からなる低反射率膜
を設けであるので、この上側クラッド層の表面反射を無
くシ、光取り出し効率を従来よりも30%程度以−に高
めることが出来る。Further, according to the structure of the present invention, since a low reflectance film made of an insulator is provided on the side cladding layer portion corresponding to the light extraction window, surface reflection of this upper cladding layer can be eliminated and light can be extracted. Efficiency can be increased by about 30% or more compared to conventional methods.
さらに、リング状オーミック電極とし、その外側の光取
り出し窓領域外の−L側クりッド層上に絶縁体を具えて
、発光に関与しない素子領域部分には電流が流れないよ
うにしであるので、漏れ電流を少なく出来、従って発光
効率を高めることが出来る。Furthermore, a ring-shaped ohmic electrode is used, and an insulator is provided on the -L side cloud layer outside the light extraction window area outside the ring-shaped ohmic electrode, so that current does not flow in the element area that is not involved in light emission. Therefore, leakage current can be reduced and luminous efficiency can be increased.
(実施例)
以下、第1図及び第2図を参照して、この発明の半導体
発光素子の実施例を説明する。(Example) Hereinafter, an example of the semiconductor light emitting device of the present invention will be described with reference to FIGS. 1 and 2.
尚、これら図は、この発明が理解出来る程度に概略的に
示しであるにすぎず、各構成成分の寸法、形状及び配置
関係は図示例に限定されるものではない。また、図中、
断面を示すハツチング等は一部分を除き省略する。この
実施例では、p型GaAs基板を用いた例につき説明す
る。It should be noted that these figures are only schematic representations to the extent that the present invention can be understood, and the dimensions, shapes, and arrangement relationships of each component are not limited to the illustrated examples. Also, in the figure,
Hatching etc. indicating the cross section are omitted except for some parts. In this embodiment, an example using a p-type GaAs substrate will be explained.
第1図は発光素子の構造を示す部分的斜視図で、その一
部分を発光中心部を男開して断面で示しである。FIG. 1 is a partial perspective view showing the structure of a light emitting element, and a cross section of a portion of the light emitting element is shown with the light emitting center opened.
この発光素子の場合も、従来と同様に、p型GaAs基
板・30上に、n型GaAs電流阻止層32、例えば直
径30#Lm程度の電流経路用穴(内部窓ともいう)3
4、p型AJljGaAs下側りラッド層36、p、n
或いはノンドープ型AすGaAs活性層(発光層)38
、n型AJJGaAs上側りラッド層40を具えている
。そして、基板30の下面には第一電極(この実施例で
はp側電極)42を具えている。In the case of this light emitting element, as in the conventional case, an n-type GaAs current blocking layer 32 is formed on a p-type GaAs substrate 30, and a current path hole (also called an internal window) 3 with a diameter of about 30 #Lm, for example.
4. p-type AJljGaAs lower rad layer 36, p, n
Or non-doped AsGaAs active layer (light emitting layer) 38
, an n-type AJJGaAs upper rad layer 40. A first electrode (p-side electrode in this embodiment) 42 is provided on the lower surface of the substrate 30.
この発明の素子構造においては、」二側クラッド層40
の表面に、光取り出し領域44を内側に取り囲むような
、第二電極すなわちリング状オーミック電極(この実施
例ではn側電極)46を具えている。このオーミック電
極46の外側及び内側の、−L側りラッド層40の表面
に、それぞれ絶縁体からなる低反射率膜48a及び48
b(代表して48で示す)を具えている。この絶縁体の
低反射率膜48を、例えば、CeO,SixNy、Si
xOyNz、5102 /a−S i、Au203等に
より構成する。In the device structure of this invention, the second cladding layer 40
A second electrode, that is, a ring-shaped ohmic electrode (in this embodiment, an n-side electrode) 46 is provided on the surface of the light extraction region 44 so as to surround the light extraction region 44 inside. Low reflectance films 48a and 48 made of an insulator are provided on the surface of the -L side rad layer 40 on the outside and inside of this ohmic electrode 46, respectively.
b (representatively indicated by 48). This insulating low reflectance film 48 is made of, for example, CeO, SixNy, Si.
It is composed of xOyNz, 5102/a-S i, Au203, etc.
このリング状オーミック電極46及び低反射率膜48a
」−に、ワイヤポンディング用の金属層50を設けであ
る。この金属層50は下側の低反射率膜48aと密着性
の良い金属例えばAu−Cr等で形成する。This ring-shaped ohmic electrode 46 and low reflectance film 48a
''-, a metal layer 50 for wire bonding is provided. This metal layer 50 is formed of a metal such as Au-Cr that has good adhesion to the lower low reflectance film 48a.
このような発光素子の構造をより明確にするために、こ
の素子の製造方法を簡単に説明する。In order to clarify the structure of such a light emitting device, a method for manufacturing this device will be briefly explained.
第2図はこの素子の光取り出し側の金属層50を除いて
示す概略的の平面図である。FIG. 2 is a schematic plan view of this element with the metal layer 50 on the light extraction side removed.
先ず、従来と同様に通常の半導体技術を用いて、基板3
0−1−に電流素子層32を成長させ、続いて、電流経
路用内部窓34を開け、その上側に順次にダブルへテロ
接合構造を構成する下側クラッド層36、活性層38及
び上側クラッド層40を成長させる。次に、この上側ク
ラッド層40の表面に絶縁体からなる低反射率膜48を
つける。この膜48をつける方法としては、蒸着法を始
め通常行われている種々の方法を用いることが出来る。First, the substrate 3 is fabricated using normal semiconductor technology as in the past.
A current element layer 32 is grown on 0-1-, an internal current path window 34 is opened, and a lower cladding layer 36, an active layer 38 and an upper cladding layer are sequentially formed on the upper side of the window 34 to form a double heterojunction structure. 3. Grow layer 40. Next, a low reflectance film 48 made of an insulator is applied to the surface of this upper cladding layer 40. As a method for applying this film 48, various commonly used methods including a vapor deposition method can be used.
次に、この低反射率膜48に、光取り出し領域44を内
側に取り囲むような大きさの内径(例えば50ILm)
で、幅が例えば約20pmで、しかも、下地の上側クラ
ッド層40の表面に達する深さのリング状の穴52を設
ける(第2図参照)。Next, this low reflectance film 48 is provided with an inner diameter (for example, 50 ILm) that is large enough to surround the light extraction region 44 inside.
Then, a ring-shaped hole 52 having a width of, for example, about 20 pm and a depth reaching the surface of the underlying upper cladding layer 40 is provided (see FIG. 2).
その後、このリング状穴52内にn型オーミック電極4
B例えばAuGeNiをつける。このオーミック電極4
8の被着方法として蒸着その他の従来使用されている種
々の方法を用いることが出来る。次に、発光部となる低
反射率膜48bの部分を除いたリング状オーミック電極
4B及び低反射率膜48aの上側に、絶縁体と密着性の
良い例えばCr−Auの金属層50を設ける。Thereafter, the n-type ohmic electrode 4 is inserted into the ring-shaped hole 52.
B For example, attach AuGeNi. This ohmic electrode 4
As a method for depositing the material No. 8, various conventionally used methods such as vapor deposition can be used. Next, a metal layer 50 made of, for example, Cr--Au, which has good adhesion to an insulator, is provided on the ring-shaped ohmic electrode 4B and the low reflectance film 48a, excluding the portion of the low reflectance film 48b that becomes the light emitting part.
尚、この金属層50を先に形成し、その後にオーミック
電極46を設けるようにすることも出来る。Note that it is also possible to form this metal layer 50 first and then provide the ohmic electrode 46.
さらに、基板30、電流阻IL層32、下側クラッド層
3B及び−L側りラッド層40をInP層とし、活性層
38をG a x I nl−xA s y Pt−7
とすることも出来、その場合には発振波長が1.0〜1
.6ILmの発光素子が得られる。Furthermore, the substrate 30, the current blocking IL layer 32, the lower cladding layer 3B, and the -L side rad layer 40 are made of InP layers, and the active layer 38 is made of GaxInl-xAsyPt-7.
It is also possible to set the oscillation wavelength to 1.0 to 1.
.. A light emitting device of 6 ILm is obtained.
次に、この素子の動作につき簡単に説明する。Next, the operation of this element will be briefly explained.
p側電極42と、n側のリング状オーミ了り電極46と
の間に電圧を印加すると、矛−ミック電極46から注入
された電子と、p側電極42から内部窓34を経て注入
された正孔とが、活性層38のわん曲部に効率良く集中
して再結合し、発光す、る。この光は光取り出し領域4
4から低反射率膜48bを通り外部へ取り出す。この時
、この低席射率膜48bのために、表面反射により光が
内部に戻ることなく、効率良く出力される。このため、
従来よりも、30%程度光出力が増大する。When a voltage is applied between the p-side electrode 42 and the ring-shaped ohmic electrode 46 on the n-side, electrons injected from the ohmic electrode 46 and electrons injected from the p-side electrode 42 through the internal window 34 are generated. The holes efficiently concentrate on the curved portion of the active layer 38 and recombine to emit light. This light is extracted from the light extraction area 4.
4 to the outside through a low reflectance film 48b. At this time, because of the low emissivity film 48b, the light does not return inside due to surface reflection and is efficiently output. For this reason,
The light output is increased by about 30% compared to the conventional method.
(発明の効5り
上述した説明からも明らかなように、この発明の半導体
発光素子によれば、オーミック接触層を設けていないの
で、その成長工程及び光取り出し穴形成のためのエツチ
ング工程を必要とせず、従って、光取り出し面の酸化を
防1ト出来、出力を大とすることが出来る。(Effects of the Invention) As is clear from the above explanation, the semiconductor light emitting device of the present invention does not have an ohmic contact layer, so a growth process for the ohmic contact layer and an etching process for forming light extraction holes are necessary. Therefore, oxidation of the light extraction surface can be prevented and the output can be increased.
さらに、上側クラッド層に直接リング状オーミック電極
を具えると共に、その外側及び内側の表面に絶縁体から
なる低反射率膜を具えているので、発光部;の表面反射
が無くなり光取り出し効率が約30%向゛上する。Furthermore, since the upper cladding layer is provided with a ring-shaped ohmic electrode directly and a low reflectance film made of an insulator is provided on the outer and inner surfaces of the ring-shaped ohmic electrode, surface reflection of the light emitting part is eliminated, and the light extraction efficiency is approximately Increase by 30%.
さらに、オーミック電極の外側に絶縁体を設けた構造′
となっているので、発光に関与する部分以外に電畔が流
れず、従って電流効率の良い発光素子となる。 1Furthermore, a structure in which an insulator is provided outside the ohmic electrode'
Therefore, no electric current flows in areas other than those involved in light emission, resulting in a light-emitting element with high current efficiency. 1
第1図はこの発明の半導体発光素子の一実施例を概略的
に示す要部を断面とする斜視図、第2図は第1図の一部
分を示す光取り出し側の平面図、
第3図は従来の半導体発光素子を示す斜視図である。
30・・・基板、 32・・・電流阻止層3
4・・・電流経路用穴(又は内部窓)36・・・下側ク
ラッド層、 38・・・活性層(発光層)40・・・上
側クラッド層、 42・・・第一電極44・・・光像り
出し領域
46・・・第二電極(リング状オーミック電極)48・
・・低反射率膜、 50・・・金属層52・・・リ
ング状穴。
特許出願人 沖電気工業株式会社N 大才
(Q 60 <5へ)”i ”s 〜)
!
梗束の牛導伶登光)子
第3図
−り【り−
f)餅棧出FIG. 1 is a perspective view schematically showing an embodiment of the semiconductor light emitting device of the present invention, with main parts taken in section, FIG. 2 is a plan view from the light extraction side showing a part of FIG. 1, and FIG. FIG. 2 is a perspective view showing a conventional semiconductor light emitting device. 30... Substrate, 32... Current blocking layer 3
4... Current path hole (or internal window) 36... Lower cladding layer, 38... Active layer (light emitting layer) 40... Upper cladding layer, 42... First electrode 44...・Light image extraction area 46...second electrode (ring-shaped ohmic electrode) 48・
...Low reflectance film, 50...Metal layer 52...Ring-shaped hole. Patent applicant: Oki Electric Industry Co., Ltd. N Daisai
(Q 60 <5) “i”s ~)
! 3rd figure - ri [ri - f) mochi tsude
Claims (1)
活性層と、上側クラッド層とを具える半導体発光素子に
おいて、 基板をp型とし及び上側クラッド層をn型とし、 さらに、該上側クラッド層上に、リング状オーミック電
極を具えると共に、該オーミック電極のリングの内側及
び外側に低反射率絶縁体を具える ことを特徴とする半導体発光素子。(1) An internal current blocking layer and a lower cladding layer on the substrate,
In a semiconductor light emitting device comprising an active layer and an upper cladding layer, the substrate is p-type and the upper cladding layer is n-type, further comprising a ring-shaped ohmic electrode on the upper cladding layer, and a ring-shaped ohmic electrode on the upper cladding layer. A semiconductor light emitting device comprising a low reflectance insulator on the inside and outside of an electrode ring.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60123076A JPS61281562A (en) | 1985-06-06 | 1985-06-06 | Semiconductor light-emitting element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60123076A JPS61281562A (en) | 1985-06-06 | 1985-06-06 | Semiconductor light-emitting element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61281562A true JPS61281562A (en) | 1986-12-11 |
Family
ID=14851592
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60123076A Pending JPS61281562A (en) | 1985-06-06 | 1985-06-06 | Semiconductor light-emitting element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61281562A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02281762A (en) * | 1989-04-24 | 1990-11-19 | Matsushita Electric Ind Co Ltd | Super-luminescent diode |
JPH05243606A (en) * | 1992-03-03 | 1993-09-21 | Sharp Corp | Semiconductor light emitting device |
US5717709A (en) * | 1993-06-04 | 1998-02-10 | Sharp Kabushiki Kaisha | Semiconductor light-emitting device capable of having good stability in fundamental mode of oscillation, decreasing current leakage, and lowering oscillation threshold limit, and method of making the same |
-
1985
- 1985-06-06 JP JP60123076A patent/JPS61281562A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02281762A (en) * | 1989-04-24 | 1990-11-19 | Matsushita Electric Ind Co Ltd | Super-luminescent diode |
JPH05243606A (en) * | 1992-03-03 | 1993-09-21 | Sharp Corp | Semiconductor light emitting device |
US5717709A (en) * | 1993-06-04 | 1998-02-10 | Sharp Kabushiki Kaisha | Semiconductor light-emitting device capable of having good stability in fundamental mode of oscillation, decreasing current leakage, and lowering oscillation threshold limit, and method of making the same |
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