JPS61121373A - Surface light-emitting element and manufacture thereof - Google Patents
Surface light-emitting element and manufacture thereofInfo
- Publication number
- JPS61121373A JPS61121373A JP59242661A JP24266184A JPS61121373A JP S61121373 A JPS61121373 A JP S61121373A JP 59242661 A JP59242661 A JP 59242661A JP 24266184 A JP24266184 A JP 24266184A JP S61121373 A JPS61121373 A JP S61121373A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- light
- light emitting
- substrate
- emitting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 239000000758 substrate Substances 0.000 claims abstract description 45
- 230000000149 penetrating effect Effects 0.000 claims abstract description 5
- 239000004065 semiconductor Substances 0.000 claims abstract description 4
- 238000000926 separation method Methods 0.000 claims description 26
- 239000000470 constituent Substances 0.000 claims description 9
- 238000000605 extraction Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 7
- 230000002093 peripheral effect Effects 0.000 claims description 5
- 238000002955 isolation Methods 0.000 abstract description 6
- 230000003287 optical effect Effects 0.000 abstract description 5
- 238000002310 reflectometry Methods 0.000 abstract 2
- 238000005530 etching Methods 0.000 abstract 1
- 238000004891 communication Methods 0.000 description 4
- 238000007740 vapor deposition Methods 0.000 description 4
- 239000013307 optical fiber Substances 0.000 description 3
- 101150054880 NASP gene Proteins 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 230000010365 information processing Effects 0.000 description 2
- 230000003685 thermal hair damage Effects 0.000 description 2
- 239000011701 zinc Substances 0.000 description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 230000000994 depressogenic effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 230000012447 hatching Effects 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 230000001256 tonic effect Effects 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
この発明は光通信用、情報処理用の光源に使用して好適
な面発光素子、特にＧａＩｎ１ｓＰ／ＩｎＰ系面発光素
子及びその製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a surface emitting device suitable for use as a light source for optical communication and information processing, particularly a GaIn1sP/InP surface emitting device and a method for manufacturing the same.
（従来の技術）
光通信用の種々の構成の面発光素子が提案されかつ実用
化されている。第３図にこのような従来の面発光素子の
構造の一例を断面図で示す（文献： ＩＥＥＥ Ｊ
ＯＵＲＮＡＬ ＯＦ ＱＵＡＮ丁υＭ ＥＬＥＩ
ＩＩ；ＴＯＮＩＣ：Ｓ 、 ＱＥ−１７［＋７１．（
ＦＥＢＲＵＡＲＹ １９８１）） 。(Prior Art) Surface emitting devices of various configurations for optical communication have been proposed and put into practical use. Figure 3 shows a cross-sectional view of an example of the structure of such a conventional surface emitting device (Reference: IEEE J
OURNAL OF QUAN DING υM ELEI
II;TONIC:S,QE-17[+71. (
FEBRUARY 1981)).
この従来の発光素子は、ｎ −１ｎＰ基板３０の一方の
基板面３０ａ上にｎ −ＩｎＰ暦３１、発光層としての
ＩｎＧａＡｓＰ層３２、ｐ −１ｎＰ層３３及びコンタ
クト層としての、亜鉛Ｚｎがドープされたｐ −ＩｎＧ
ａＡｓＰ層３４とが順次にエピタキシャル成長により形
成されている。さらに、このコンタクト層３４上に電流
流路を制限するための穴３５を有する、例えばＳｉＯ□
からなる絶縁層３Ｂが蒸着により設けられていて、この
絶縁層３６上にはｐ側電極３７が蒸着により形成されて
いる。さらに、他方の基板面ｌｂ上には光取り出し用の
窓３８を有するｎ側電極３８が蒸着により形成されてい
る。This conventional light-emitting element includes an n-InP layer 31, an InGaAsP layer 32 as a light-emitting layer, a p-1nP layer 33, and a contact layer doped with zinc Zn on one substrate surface 30a of an n-1nP substrate 30. p-InG
The aAsP layer 34 is successively formed by epitaxial growth. Furthermore, the contact layer 34 has a hole 35 for restricting the current flow path, for example, a SiO□
An insulating layer 3B is provided by vapor deposition, and a p-side electrode 37 is formed on this insulating layer 36 by vapor deposition. Further, on the other substrate surface lb, an n-side electrode 38 having a window 38 for light extraction is formed by vapor deposition.
このような構造において、ｐ側電極３７から注入された
電流は絶縁層３Ｂの穴３５を通り、発光層３２の中央部
付近の発光領域３２ａに導入され、ここで発光を生じ、
発光した光は上側の各層３１．３０を通り、光取り出し
窓３８内の発光面３０ａから放出される。In such a structure, the current injected from the p-side electrode 37 passes through the hole 35 of the insulating layer 3B and is introduced into the light emitting region 32a near the center of the light emitting layer 32, where light is emitted.
The emitted light passes through the upper layers 31 and 30 and is emitted from the light emitting surface 30a within the light extraction window 38.
（発明が解決しようとする問題点）
ところで、光通信用光源としての面発光素子は、光の漏
洩損失を少なくしかつ効率を高めるために、発光径が小
さいこと及び光の拡がり角が小さいことが要求されてい
る。(Problems to be Solved by the Invention) Incidentally, in order to reduce light leakage loss and increase efficiency, surface emitting elements used as light sources for optical communication must have a small emission diameter and a small light spreading angle. is required.
しかしながら、第３図に示す従来の発光素子においては
、絶縁層３６で狭められた電流が他方の基板面３０ｂに
設けられたｎ側電極３９に向って末広がり状に流れるの
で、発光領域３２ａへの電流集中が悪く、従って、発光
径が大きくなると共に、光の拡がり角が大きくなって発
光パターンが台形状となってしまう、これがため１発光
素子を光ファイバーと結合させた時、光の損失が大きい
という欠点があった。However, in the conventional light-emitting element shown in FIG. 3, the current narrowed by the insulating layer 36 flows in a divergent manner toward the n-side electrode 39 provided on the other substrate surface 30b, so that the current flows toward the light-emitting region 32a. Current concentration is poor, and as a result, as the emission diameter increases, the spread angle of light increases, resulting in a trapezoidal emission pattern.This causes a large loss of light when one light emitting element is coupled to an optical fiber. There was a drawback.
さらに、発光径を小さくするために、絶縁層３４の電流
狭窄の穴３５を更に小さくすることも行われているが、
その場合には、熱抵抗が大きくなるため、素子自体が熱
破損を来たしてしまうという欠点があった・
この発明の目的は、このような従来の発光素子が有する
欠点を除去し、低電流でファイバーに効率良く光入力さ
せることが出来る面発光素子及びその製造方法を提供す
ることにある。Furthermore, in order to reduce the emission diameter, the hole 35 for current confinement in the insulating layer 34 is also made smaller.
In that case, there is a drawback that the thermal resistance increases, causing thermal damage to the device itself.The purpose of the present invention is to eliminate such drawbacks of conventional light emitting devices, and to create a light emitting device that can be used at a low current. It is an object of the present invention to provide a surface emitting element that can efficiently input light into a fiber, and a method for manufacturing the same.
（問題点を解決するための手段）
この出願の第一の発明は、半導体基板１の一方の基板１
８面の上側に発光層３を具え、他方の基板１ｂ面を発光
面１０とした面発光素子において、この発光層３は中心
部が周辺部よりも厚く形成された発光領域３ａを有し、
この素子の発光面１０とは反対側の裏面側から発光層３
を突き抜ける深さでこの発光領域３ａの周囲に設けられ
た環状の分離溝５と、この分離溝５の壁面に設けられた
透明絶縁層６と、この分ｇＩ溝５の壁面及びこの分離溝
５に囲まれた上述の裏面上に設けられた高反射率ｆｉｌ
ｌとを具えることを特徴とする。(Means for Solving the Problems) The first invention of this application provides that one substrate 1 of the semiconductor substrate 1
In a surface emitting device having a light emitting layer 3 on the upper side of the 8th surface and using the other substrate 1b surface as a light emitting surface 10, the light emitting layer 3 has a light emitting region 3a formed thicker in the center than in the peripheral part,
The light emitting layer 3 from the back side opposite to the light emitting surface 10 of this element
An annular separation groove 5 provided around the light emitting region 3a with a depth penetrating through the area, a transparent insulating layer 6 provided on the wall surface of the separation groove 5, and a transparent insulating layer 6 provided on the wall surface of the gI groove 5 and the separation groove 5 A high reflectance fil provided on the above-mentioned back surface surrounded by
l.
さらに、この出願の第二の発明は、一方の基板面１ａに
円形の凹所１２を形成する工程と、この凹所１２を含む
基板面ｌａ上に発光層３を含む複数の素子構成層（２，
３，４）を順次に成長させる工程と、
この素子構成！ （２，３，４）の表面４ａから発光層
３を突き抜ける深さにまで、この発光層３の発光領域３
ａの周囲に、環状の分離溝５を設ける工程と。Furthermore, the second invention of this application includes a step of forming a circular recess 12 on one substrate surface 1a, and a plurality of element constituent layers (including the light emitting layer 3) on the substrate surface la including the recess 12. 2,
3, 4) and the device configuration! The light emitting region 3 of this light emitting layer 3 extends from the surface 4a of (2, 3, 4) to a depth penetrating the light emitting layer 3.
a step of providing an annular separation groove 5 around a.
この分＃溝５の壁面に透明絶縁層６を設ける工程と、
光取り出し窓８を有する一方の電極９を前述の基板１の
他方の基板面ｌｂ上に形成し及び他方の電極７を前述の
分離溝の内側の素子構成層の表面上に設ける工程と、
この透明絶縁層上及び分離溝により囲まれた素子構成層
の表面上に高反射率層を設ける工程とを含むことを特徴
とする。For this purpose, a step of providing a transparent insulating layer 6 on the wall surface of #groove 5, forming one electrode 9 having a light extraction window 8 on the other substrate surface lb of the above-mentioned substrate 1, and forming the other electrode 7 on the above-mentioned substrate surface 1b. The method is characterized by comprising a step of providing a high reflectance layer on the surface of the element constituent layer inside the separation groove, and a step of providing a high reflectance layer on the transparent insulating layer and on the surface of the element constituent layer surrounded by the separation groove. .
（作用）
この発明の発光素子の構造では、発光領域３ａの゛周辺
を取囲んで絶縁層６を具える分離溝５が形成されている
ので、注入電流は発光領域３ａに集中して流れ、従って
、発光効率が高まり、かつ、発光領域３ａを狭めて発光
径を小さくすることが出来る。(Function) In the structure of the light emitting device of the present invention, since the separation groove 5 provided with the insulating layer 6 is formed surrounding the periphery of the light emitting region 3a, the injected current flows concentratedly in the light emitting region 3a. Therefore, the light emitting efficiency is increased, and the light emitting area 3a can be narrowed to reduce the light emitting diameter.
また、発光領域３ａの厚みはその中心部が周辺部よりも
厚いレンズ状の構造となっており、しかも、分離溝５の
壁面上及び発光面１０とは反対側の素子裏面とに高反射
率層１１が設けられているので、発光領域３ａから発光
面１０とは反対側及び横方向に向った光をほとんど反射
させて発光面１０から放出させることが出来、よって、
光出力を高効率で取り出せることが出来る。In addition, the thickness of the light emitting region 3a has a lens-like structure where the center part is thicker than the peripheral part, and there is a high reflectance on the wall surface of the separation groove 5 and on the back surface of the element opposite to the light emitting surface 10. Since the layer 11 is provided, most of the light directed from the light emitting region 3a to the side opposite to the light emitting surface 10 and in the lateral direction can be reflected and emitted from the light emitting surface 10.
Light output can be extracted with high efficiency.
また、このような構造により、光は発光面１０の中央部
に多く集中するので、光の拡がり角が従来よりも著しく
小さくなり、発光パターンは中央部で発光強度の強い山
形と、なるため、光ファイバーとの結合効率が良い。In addition, with such a structure, the light is concentrated in the central part of the light emitting surface 10, so the spread angle of the light is significantly smaller than before, and the light emitting pattern becomes a mountain shape where the light emission intensity is strong in the central part. Good coupling efficiency with optical fiber.
（実施例）
以下、図面を参照して、この発明の発光素子の一実施例
を説明する。(Example) Hereinafter, an example of the light emitting element of the present invention will be described with reference to the drawings.
第１図はこの発明の面発光素子の一実施例を概略的に示
す断面図、第２図（Ａ）〜（Ｇ）はその製造工程図であ
る。これら図において、断面を表わすハチング等を省略
すると共に、各構成成分の形状寸法及び配置関係はこの
発明の構成が理解出来る程度に概略的に示しである。FIG. 1 is a sectional view schematically showing an embodiment of a surface emitting device of the present invention, and FIGS. 2(A) to 2(G) are manufacturing process diagrams thereof. In these figures, hatching etc. representing cross sections are omitted, and the shapes and sizes and arrangement relationships of each component are shown schematically to the extent that the structure of the present invention can be understood.
先ず、発光素子の構造につき説明する。First, the structure of the light emitting element will be explained.
基板としてｐ −１ｎＰ基板１を用い、その一方の基板
面ｌａ上にｐ−ＩｎＰバ”／ ７７層２、ｐ −ＧａＩ
ｎＡＳＰ発光層３、ｎ −ＩｎＰコンタクト層４等の素
子構成層が順次積層形成されている。この発光層３の中
央付近の発光領域３ａはその断面が基板側ｌに向って中
央部が山形に盛り上った形状となっている。A p-1nP substrate 1 is used as a substrate, and a p-InP layer 2 and a p-GaI layer 2 are formed on one substrate surface la.
Element constituent layers such as the nASP light emitting layer 3 and the n-InP contact layer 4 are sequentially stacked. The cross section of the light emitting region 3a near the center of the light emitting layer 3 has a shape in which the central portion swells in a mountain shape toward the substrate side l.
この発光領域３ａの周辺部分には、素子の裏面側からす
なわちコンタクト層４の表面４ａから発光層３を突き抜
けた深さまで、環状の分離溝５が形成されていて、この
分離溝５により、発光領域３ａを発光層３の他の領域か
ら狭い領域内に分離している。An annular separation groove 5 is formed around the light emitting region 3a from the back side of the element, that is, from the surface 4a of the contact layer 4 to the depth penetrating the light emitting layer 3. The region 3a is separated from other regions of the light emitting layer 3 within a narrow region.
少なくともこの分離溝５の壁面上に５ｉ０２とか、Ｓｉ
ｘＭｙとか、その他の好適な透明絶縁層６が被着されて
いて、電流を中央の発光領域３ａに集中させるようにな
っている。At least on the wall surface of this separation groove 5, 5i02 or Si
xMy or other suitable transparent insulating layer 6 is deposited to concentrate the current to the central light emitting region 3a.
分離溝５の内側のコンタクト層４の表面４ａ上に他方の
電極７であるオーミック電極を有してい−る。このオー
ミック電極７とコンタクト層４との界面が粗面となるの
で、この表面４ａの周辺部に環状に形成しである。光取
り出し窓８を有する一方の電極９であるオーミック電極
を基板１の他方の基板面Ｉｂ上に設けて、この窓８に露
出した基板面Ｉｂが発光面１０となる。An ohmic electrode, which is the other electrode 7, is provided on the surface 4a of the contact layer 4 inside the separation groove 5. Since the interface between the ohmic electrode 7 and the contact layer 4 is a rough surface, it is formed in a ring shape around the surface 4a. An ohmic electrode, which is one electrode 9 having a light extraction window 8 , is provided on the other substrate surface Ib of the substrate 1 , and the substrate surface Ib exposed to this window 8 becomes a light emitting surface 10 .
また、分離溝５の壁面上の絶縁層６上及び分離溝５の内
側の電極７を含むコンタクト層４の表面４ａ上に、高反
射率層１１として、例えば金の層が被着されている。こ
の高反射率層１１の反射率は例えば８０％以上とするの
が好適である。このような反射率層１１によって、発光
領域３ａから発光面１０とは反対方向又は横方向に進ん
だ光を有効的に発光面ｌＯ側に反射させて、発光面１０
から効率良く放出させることが出来る。Further, a layer of, for example, gold is deposited as a high reflectance layer 11 on the insulating layer 6 on the wall surface of the separation groove 5 and on the surface 4a of the contact layer 4 including the electrode 7 inside the separation groove 5. . The reflectance of this high reflectance layer 11 is preferably 80% or more, for example. Such a reflectance layer 11 effectively reflects light that has traveled from the light emitting region 3a in the opposite direction or in the lateral direction to the light emitting surface 10 toward the light emitting surface 1O side, and the light emitting surface 10
It can be efficiently released from
次に、この面発光素子の製造方法の一実施例につき説明
する。Next, an example of a method for manufacturing this surface emitting device will be described.
先ず、（１０Ｇ）面方位のｎ −１ｎＰ基板ｌの一方の
基板面１ａに基板面に垂直な方向から見た形状が円形状
で径が２０〜４０涛１程度の、深さ５ＩＬ１１程度の凹
所１２を形成する。この径及び深さは設計に応じて適切
に設定することが出来る。第２図（Ａ）にこの凹所１２
が形成された基板ｌの、第２図（Ｂ）のＩ−■線上の断
面図を示し、８２図（Ｂ）にその平面図を示す。First, on one substrate surface 1a of an n-1nP substrate 1 with a (10G) plane orientation, a recess with a depth of about 5IL11 and a circular shape when viewed from the direction perpendicular to the substrate surface and a diameter of about 20 to 40 mm is formed. 12 is formed. This diameter and depth can be appropriately set depending on the design. This recess 12 is shown in Figure 2 (A).
A sectional view taken along the line I-■ in FIG. 2(B) of the substrate 1 on which is formed is shown, and FIG. 82(B) is a plan view thereof.
次に、この凹所１２が形成された基板面ｌａ上に、素子
を構成する各層であるＰ −ＩｎＰ ／＜ツファ層２、
ｐ−ＧａＩｎＡｓＰ発光層３、ｎ−ＩｎＰコｙタクト層
４を順次に適当な成長方法、好ましくは液相エピタキシ
ャル成長方法で、結晶成長させる。この場合、基板面１
ａの窪み１２上ではバッファ層２の中央部が凹み、さら
に発光層３の発光領域３ａにほぼ対応する中央部分が他
の部分よりも肉厚となるように成長し、この発光領域３
ａが丁度レンズ状に基板側に盛り上った形状となる（第
２図（Ｃ） ） 。Next, on the substrate surface la on which the recess 12 is formed, each layer constituting the element, P -InP /<Tuff layer 2,
The p-GaInAsP light-emitting layer 3 and the n-InP cotact layer 4 are crystal-grown in sequence using a suitable growth method, preferably a liquid phase epitaxial growth method. In this case, the substrate surface 1
The central part of the buffer layer 2 is depressed on the depression 12 of a, and the central part of the light emitting layer 3, which corresponds to the light emitting region 3a, grows thicker than the other parts.
The shape of a is raised toward the substrate in the shape of a lens (FIG. 2(C)).
次に、発光領域３ａの周囲であって、このコンタクト層
４の表面４ａから、発光層３を突き抜ける深さに、基板
面に垂直な方向から見て環状の分離溝５をエツチング形
成する。第２図（ロ）はこの分離溝５が形成されたウェ
ハを示す、第２図（Ｅ）の■−■線上の断面図であり、
第２図（Ｅ）はその平面図である。Next, an annular separation groove 5 is etched around the light emitting region 3a from the surface 4a of the contact layer 4 to a depth that penetrates the light emitting layer 3 when viewed from a direction perpendicular to the substrate surface. FIG. 2(B) is a sectional view taken along the line ■-■ in FIG. 2(E), showing the wafer in which this separation groove 5 is formed.
FIG. 2(E) is a plan view thereof.
次に、主としてこの分離溝５の内部の壁面上に透明絶縁
層６を蒸着等により被着形成する（第２図（Ｆ） ）
、この場合、分離溝５の外側のコンタクト層４の表面４
ａ上はもとより、分離窓５の内側の表面４ａ上の周辺部
にも環状に透明絶縁層６を被着形成しても良い。Next, a transparent insulating layer 6 is formed mainly on the inner wall surface of this separation groove 5 by vapor deposition or the like (FIG. 2(F)).
, in this case, the surface 4 of the contact layer 4 outside the isolation trench 5
A transparent insulating layer 6 may be formed in a ring shape not only on the inner surface 4a of the separation window 5 but also on the periphery of the inner surface 4a of the separation window 5.
さらに、コンタクト層４の表面４ａ上に透明電極６の内
側に環状のオーミック電極７を蒸着し、基板１の他方の
基板面ｌｂ上に光取り出し窓ＩＯを有するオーミ７り電
極９を蒸着してそれぞれ金属化する（第２ｒＡ（Ｆ））
。Further, an annular ohmic electrode 7 is deposited on the surface 4a of the contact layer 4 inside the transparent electrode 6, and an ohmic electrode 9 having a light extraction window IO is deposited on the other substrate surface lb of the substrate 1. Metalize each (2nd rA(F))
.
そして、最後に、光反射用の高反射率層１１としての金
又はその他の任意好適な層を素子の裏面側に蒸着してこ
の層１１を少なくとも分離溝５内の絶縁層６上及びコン
タクト層４の電極７内に露出している表面４ａ上に形成
しく第２図（Ｇ）） 、この工程を終了する。Finally, gold or any other suitable layer as a high reflectance layer 11 for light reflection is deposited on the back side of the device, and this layer 11 is applied at least on the insulating layer 6 in the isolation groove 5 and on the contact layer. 2(G)), and this step is completed.
この発明は上述した実施例にのみに限定されるものでは
ない０例えば、素子を構成する各層の導電型を上述した
実施例の場合とは反対導電型とすることが出来る。The present invention is not limited to the embodiments described above. For example, the conductivity type of each layer constituting the element can be made to be the opposite conductivity type to that in the embodiments described above.
また、素子構成層として上述した各層以外の層を含んで
いても良い。Further, layers other than the above-mentioned layers may be included as element constituent layers.
さらに、上述した絶縁層、各電極及び高反射率層の製造
工程は任意適切にその順序を変更しても良い。Furthermore, the order of the above-described manufacturing steps for the insulating layer, each electrode, and the high reflectance layer may be changed as desired.
（発明の効果）
上述した説明か５も明らかなように、この発明の面発光
素子によれば、発光領域の周辺を取囲む絶縁層を具える
分離溝（エア・アイソレーション）により、電流狭窄が
行われて注入電流は発光領域に集中して流れ、従って、
発光効率が高まり、かつ、発光領域３ａを狭めて発光径
を小さくすることが出来る。(Effects of the Invention) As is clear from the above explanation 5, according to the surface emitting device of the present invention, current confinement is achieved by the isolation groove (air isolation) provided with the insulating layer surrounding the periphery of the light emitting region. is carried out, the injected current flows concentrated in the light emitting region, and therefore,
The light emitting efficiency is increased, and the light emitting area 3a can be narrowed to reduce the light emitting diameter.
また、発光頭載の中心部が周辺部よりも厚く一種のレン
ズ構造となっており、しかも、分離溝の壁面上及び発光
面とは反対側の素子裏面上に高反射率層を具えているの
で１発光面とは反対側及び横方向に向った光をほとんど
反射させて発光面から放出させることが出来、よって、
光出力を高効率で取り出せることが出来る。In addition, the center part of the light emitting head is thicker than the peripheral part, forming a kind of lens structure, and a high reflectance layer is provided on the wall surface of the separation groove and on the back surface of the element on the opposite side from the light emitting surface. Therefore, most of the light directed to the side opposite to the light emitting surface and in the lateral direction can be reflected and emitted from the light emitting surface.
Light output can be extracted with high efficiency.
また、光は発光面の中央部多く集中するので、光の拡が
り角が従来よりも著しく小さくなり、発光パターンは中
央部で発光強度の強い山形となるため、光ファイバーと
の結合効率が良い。In addition, since a large amount of light is concentrated in the center of the light-emitting surface, the spread angle of the light is significantly smaller than in the past, and the light-emitting pattern becomes a mountain shape with strong light emission intensity in the center, so the coupling efficiency with the optical fiber is good.
また、電流通路を狭めない構造となっているので、従来
のような熱破損、をきたすことがない。Furthermore, since the structure does not narrow the current path, there is no risk of thermal damage as in the conventional case.
このような面発光素子は発光ダイオード、超輻射ダイオ
ード、レーザとして用いることが出来、光通信用、情報
処理用の光源に適用して好適である。Such surface emitting elements can be used as light emitting diodes, superradiation diodes, and lasers, and are suitable for application to light sources for optical communication and information processing.
第１図はこの発明の面発光素子の構造の一実施例を示す
路線的断面図、
第２図（Ａ）〜（Ｇ）はこの発明の面発光素子の製造工
程の一実施例を説明するための工程図、第３図は従来の
面発光素子の構造を説明するための断面図である。
１−・−ｐ −ｒｎＰ基板、 ｌａ、 ｌｂ・・・基板
面２・・・ｐ−ＩｎＰバッファ層
３− Ｐ −Ｇａ（ｎＡｓＰ発光層
３ａ・・・発光領域、 ４・・・ｎ −１ｎＰコン
タクト層４ａ・・・コンタクト層の表面
５・・・分離溝、 ６・・・透明絶縁層７．９
・・・電極、 ８・・・光取り出し窓ＩＯ・・・発
光面、１１・・・高反射率層。
特許出願人 沖電気工業株式会社・−１・ゝ
代理人 弁理士 大 垣 孝へ〜° ：１〆
）１
０コ
＾
＾Ｑ ロ
一ノ
−ノ＼、Ｉ
−とFig. 1 is a cross-sectional view showing an example of the structure of a surface emitting device of the present invention, and Figs. 2 (A) to (G) illustrate an example of the manufacturing process of the surface emitting device of the present invention. FIG. 3 is a cross-sectional view for explaining the structure of a conventional surface emitting device. 1--p-rnP substrate, la, lb...substrate surface 2...p-InP buffer layer 3-P-Ga(nAsP light-emitting layer 3a...light-emitting region, 4...n-1nP contact Layer 4a... Surface of contact layer 5... Separation groove, 6... Transparent insulating layer 7.9
... Electrode, 8... Light extraction window IO... Light emitting surface, 11... High reflectance layer. Patent applicant: Oki Electric Industry Co., Ltd. -1.ゝRepresentative: Patent attorney Takashi Ogaki: 1〆)1 0゜
^Q Roichino
-ノ＼、I-と
Claims (1)
他方の基板面を発光面とした面発光素子において、該発
光層は中心部が周辺部よりも厚く形成された発光領域を
有し、前記素子の発光面とは反対側の裏面側から前記発
光層を突き抜ける深さで該発光領域の周囲に設けられた
環状の分離溝と、該分離溝の壁面に設けられた透明絶縁
層と、該透明絶縁層上及び該分離溝に囲まれた裏面上に
設けられた高反射率層とを具えることを特徴とする面発
光素子。 ２、半導体基板の一方の基板面の上側に発光層を具え、
他方の基板面を発光面とした面発光素子を製造するに当
り、 前記一方の基板面に円形の凹所を形成する工程と、 該凹所を含む基板面上に発光層を含む複数の素子構成層
を順次に成長させる工程と、 該素子構成層の表面から前記発光層を突き抜ける深さに
まで、該発光層の発光領域の周囲に、環状の分離溝を設
ける工程と、 該分離溝の壁面に透明絶縁層を設ける工程 と、 光取り出し窓を有する一方の電極を前記基板の他方の基
板面上に形成し及び他方の電極を前記分離溝の内側の素
子構成層の表面上に設ける工程と、 前記透明絶縁層上及び前記分離溝により囲まれた素子構
成層の表面上に高反射率層を設ける工程と を含むことを特徴とする面発光素子の製造方法。[Claims] 1. A light-emitting layer is provided on the upper side of one substrate surface of the semiconductor substrate,
In a surface emitting element with the other substrate surface as a light emitting surface, the light emitting layer has a light emitting region formed thicker in the center than in the peripheral part, and the light emitting layer is provided with a light emitting region formed thicker in the center than in the peripheral part, and the light emitting layer is emitted from the back side opposite to the light emitting surface of the element. an annular separation groove provided around the light emitting region with a depth that penetrates the layer; a transparent insulating layer provided on the wall surface of the separation groove; and on the transparent insulating layer and on the back surface surrounded by the separation groove. A surface-emitting device comprising: a high reflectance layer provided on the surface of the surface-emitting device; 2. A light emitting layer is provided on the upper side of one substrate surface of the semiconductor substrate,
In manufacturing a surface emitting device with the other substrate surface as a light emitting surface, forming a circular recess on the one substrate surface, and forming a plurality of devices including a light emitting layer on the substrate surface including the recess. a step of sequentially growing the constituent layers; a step of providing an annular separation groove around the light emitting region of the light emitting layer from the surface of the device constituent layer to a depth penetrating the light emitting layer; a step of providing a transparent insulating layer on a wall surface; and a step of forming one electrode having a light extraction window on the other substrate surface of the substrate and providing the other electrode on the surface of the element constituent layer inside the separation groove. A method for manufacturing a surface emitting device, comprising: providing a high reflectance layer on the transparent insulating layer and on the surface of the device constituent layer surrounded by the separation groove.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59242661A JPS61121373A (en) | 1984-11-17 | 1984-11-17 | Surface light-emitting element and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59242661A JPS61121373A (en) | 1984-11-17 | 1984-11-17 | Surface light-emitting element and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61121373A true JPS61121373A (en) | 1986-06-09 |
Family
ID=17092356
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59242661A Pending JPS61121373A (en) | 1984-11-17 | 1984-11-17 | Surface light-emitting element and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61121373A (en) |
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|---|---|---|---|---|
| WO2002007229A1 (en) * | 2000-07-19 | 2002-01-24 | Qinetiq Limited | Light emitting diode arrangements |
| WO2011135471A2 (en) | 2010-04-29 | 2011-11-03 | Koninklijke Philips Electronics N.V. | Light emitting device with trenches and a top contact |
| JP2012015154A (en) * | 2010-06-29 | 2012-01-19 | Ngk Insulators Ltd | Semiconductor light-emitting device and method for manufacturing the same |
| EP2372791A3 (en) * | 2010-03-10 | 2012-07-18 | LG Innotek Co., Ltd. | Light emitting diode |
| CN103730431A (en) * | 2014-01-07 | 2014-04-16 | 宝钢金属有限公司 | High-power array light-emitting diode (LED) chip surface radiating structure and manufacturing method |
| WO2015094600A1 (en) * | 2013-12-20 | 2015-06-25 | LuxVue Technology Corporation | Light-emitting diode with current injection confinement trench |
| US10224457B2 (en) | 2014-11-06 | 2019-03-05 | Lumileds Llc | Light emitting device with trench beneath a top contact |
| EP2187458B1 (en) * | 2008-11-14 | 2021-07-28 | LG Innotek Co., Ltd. | Semiconductor light emitting device with shock protection |
-
1984
- 1984-11-17 JP JP59242661A patent/JPS61121373A/en active Pending
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002007229A1 (en) * | 2000-07-19 | 2002-01-24 | Qinetiq Limited | Light emitting diode arrangements |
| EP2187458B1 (en) * | 2008-11-14 | 2021-07-28 | LG Innotek Co., Ltd. | Semiconductor light emitting device with shock protection |
| US8653547B2 (en) | 2010-03-10 | 2014-02-18 | Lg Innotek Co., Ltd | Light emitting device and light emitting device package |
| US9899567B2 (en) | 2010-03-10 | 2018-02-20 | Lg Innotek Co., Ltd. | Light emitting device |
| US9455377B2 (en) | 2010-03-10 | 2016-09-27 | Lg Innotek Co., Ltd. | Light emitting device |
| EP2372791A3 (en) * | 2010-03-10 | 2012-07-18 | LG Innotek Co., Ltd. | Light emitting diode |
| US8154042B2 (en) | 2010-04-29 | 2012-04-10 | Koninklijke Philips Electronics N V | Light emitting device with trenches and a top contact |
| US8415656B2 (en) | 2010-04-29 | 2013-04-09 | Koninklijke Philips Electronics N.V. | Light emitting device with trenches and a top contact |
| JP2013526051A (en) * | 2010-04-29 | 2013-06-20 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Light emitting diode with trench and top contact |
| CN102906888A (en) * | 2010-04-29 | 2013-01-30 | 皇家飞利浦电子股份有限公司 | Light emitting device with trenches and a top contact |
| WO2011135471A3 (en) * | 2010-04-29 | 2012-03-22 | Koninklijke Philips Electronics N.V. | Light emitting diode with trenches and a top contact |
| WO2011135471A2 (en) | 2010-04-29 | 2011-11-03 | Koninklijke Philips Electronics N.V. | Light emitting device with trenches and a top contact |
| JP2012015154A (en) * | 2010-06-29 | 2012-01-19 | Ngk Insulators Ltd | Semiconductor light-emitting device and method for manufacturing the same |
| WO2015094600A1 (en) * | 2013-12-20 | 2015-06-25 | LuxVue Technology Corporation | Light-emitting diode with current injection confinement trench |
| US9768345B2 (en) | 2013-12-20 | 2017-09-19 | Apple Inc. | LED with current injection confinement trench |
| CN103730431A (en) * | 2014-01-07 | 2014-04-16 | 宝钢金属有限公司 | High-power array light-emitting diode (LED) chip surface radiating structure and manufacturing method |
| CN103730431B (en) * | 2014-01-07 | 2018-08-17 | 宝钢金属有限公司 | A kind of high-power array LED chip surface radiator structure and production method |
| US10224457B2 (en) | 2014-11-06 | 2019-03-05 | Lumileds Llc | Light emitting device with trench beneath a top contact |
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