JPS61212040A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To remarkably improve the oxidation resistance to high melting point metal as well as the masking capacity over the metal to be ion implanted by a method wherein a bit of Si is mixed with a high melting point metal; diffused and oxidized on the surface thereof to form an SiO2 film. CONSTITUTION:A tungsten film 1 containing 10% of Si is formed on a gate silicon oxide film 2 which is formed on the surface of Si crystal substrate 3 and then the tungsten film 1 is patterned into a gate electrode. Next oxide silicon film 2'' is formed on the surface of tungsten film 1 by means of heating the surface in atmosphere containing 5% of H2O. A source region and a drain region 4 are formed by implanting As ion using the silicon film 2'' and the tungsten film 1 as masks as well as heating the surface in N2 atmosphere. Finally after coating the surface with phosphosilicate glass film 5 by CVD process, contact holes are opened in the source drain regions 4 to form aluminum wirings 6.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to improvement of electrode wiring in a semiconductor device,
Specifically, the present invention relates to a method of manufacturing a semiconductor device using electrode wiring mainly made of a high melting point metal (W, MO, Ta, etc.).

[Background of the invention]

As is well known, electrode wiring using high-melting point metals is commonly used, but high-melting point metals alone have poor masking properties when impurities are ion-implanted, and they react with trace amounts of oxygen and oxidize. There were drawbacks. Therefore, it is widely practiced to cover the wiring surface with a protective film such as a SiOW film. However, it is technically very difficult to cover only the surface including the side surfaces of the wiring with the Sigh film. For example, 5 inches on the entire surface including high melting point metal electrode wiring.
After depositing the two films, RI E (Reactive I
onEtching) to etch 8jOz,
There is a known technique that mainly leaves only the 8i0z film on the sides of the high-melting point metal electrode wiring, but in this case, not only is the manufacturing method complicated, but the sigh film has a uniform thickness over the entire electrode wiring surface including the sides. Since a film cannot be formed, there is a drawback that an 8io2 film with a uniform thickness required for the process cannot be formed in a well-controlled manner. In addition, as related to this patent, for example, Japanese Patent Application Laid-open No. 53-134139.55-34
463.56-71977 and the like.

[Purpose of the invention]

It is an object of the present invention to solve the above-mentioned conventional problems and to provide a stable unilateral wiring using a high melting point metal.

[Summary of the invention]

In order to achieve the above object, the present invention mixes a trace amount of Si (11 pm or more in weight ratio) into a high melting point metal, diffuses it to the surface of the high melting point metal, and oxidizes it.
It is characterized by forming 8i01jJE on the surface. Generally, when Si is oxidized, K and a high melting point metal are also oxidized at the same time. However, according to the studies of the present inventors, by heating in a mixed atmosphere of water vapor and hydrogen, it becomes possible to oxidize Si without oxidizing the high melting point metal. Oxidized 8i (Si
02) is 8i0.0 on the high melting point metal surface. Forms a film.

[Embodiments of the invention]

Example 1: Hereinafter, one example of the present invention will be described with reference to FIG. 1st
The figure shows a method of manufacturing an MO8 field effect semiconductor device using the present invention. First, a thickness of 2 is formed on the surface of the Si crystal substrate 3.
A tungsten film containing 101 Si was formed to a thickness of 300 nm on a Qnm gate silicon oxide film 2 (2' is a field oxide film formed in advance), and this was patterned into a gate a-pole pattern (first Figure (a)). , J.
! The method for depositing X1 is simultaneous sputter deposition of W and 3i, or *Fs (tungsten hexafluoride) S.
:Chemical vapor deposition method (CVD) using Ha (monosilane) gas
) was attempted. Next, as shown in the same figure (b), 5 times N20 was added.
The silicon oxide film 2" with a thickness of about 50 nm was completely formed on the surface of the tungsten film 1 by heating for 30 minutes in an N2 atmosphere. Also, by this heat treatment,
The silicon oxide film 2 around the gate is approximately 20 nm thicker than the oxide film under the gate. Furthermore, as shown in the same figure (C), As ion implantation (energy 80 ke
A north region and a drain region 4f were formed by introducing impurities using V.V.) and heating for 130 minutes at 950C in a %N2 atmosphere. Then, the same figure (d
) as shown in phosphosilicate glass (PSG) ds (50
0 nm) by the CVD method, contact holes were made on the source/drain regions 4 and aluminum interconnections 6 were formed using the usual 7-lithography method and dry etching technique. MO8 produced in this way
The field effect semiconductor device showed good electrical properties. The i resistance of tungsten film 1 is sufficiently low at 0.59/mouth.
The value is several orders of magnitude higher than when pure tungsten is used. In general, a high melting point metal film mixed with Si is
Although the resistance becomes large, in this example, 81 in the film is S
It is thought that the resistance increase was suppressed because the resistance was changed to low. In addition, the oxide film 2" on the surface of the tungsten film 1
The thickness of is the partial pressure of HsO in N2.

It should be noted that various values can be obtained by changing the heating@degree and heating time.

On the other hand, when the Si content was less than ippm, a uniform 8i02 film could not be formed on the W surface. In addition, if f3i is contained in a weight ratio exceeding 25 cm, the composition wsr
In this case, the wiring resistance was too high to be suitable for practical use.

Example 2: FIG. 2 shows another embodiment.

On a thermal oxide film (SiOx) 2 with a thickness of 40 nm formed on the surface of the 3i crystal substrate 3, a tungsten silicide (wsit) film 7, which is a compound of tungsten and 3i, is formed to a thickness of 250 nm.
．． It was deposited by CVDf& to a thickness of about 100 nm (Fig. 2(a)). Then, when heated for 11 hours in an N2 atmosphere containing 8 Hz of Hzo, approximately 1
A 5tyx film 2' of 100n was formed (Fig. 2(b)).
). The tungsten silicide film 7 after this heat treatment is
Analysis by Auger electron spectroscopy revealed that the amount of Si contained in the film was reduced by about 20% in terms of strength compared to before heating.

This result shows that f9i in the tungsten silicide film 7
It is thought that 5io2 was diffused and oxidized on the surface to form 5io2 on the film surface.

Embodiment 3: Still another embodiment is shown in FIG. First, Figure 3(a)
A thickness of 20 nm formed on the surface of the Si crystal substrate 3 as shown in K.
On the gate silicon oxide film 2 (2' is the field oxide film formed in advance), a tungsten film 1 with a thickness of 350 nm containing 5 Ti of Si is formed, and on top of that, a phosphosilicate glass (PSG) film is formed. 5' is deposited to a thickness of about 5 Qnm using the CVD method. This two-layer film of tungsten and PSG was patterned into a gate electrode pattern. Also, using the PSG film 5' and the tungsten film 1 as a mask, P is 4Qke'V, I
Source and drain regions 4 were formed by performing ion implantation under the conditions of X 10'''cm-' and heating in a N2# atmosphere for 110 minutes at 900C.

At this time, the PSG film 5' on the surface of the tungsten film 1 prevents ions from penetrating during ion implantation.

Then, 950C1 in an N2 atmosphere containing 101H2O.
Heat for 30 minutes and apply a thickness of 30 mm on the side of the tungsten gate.
A silicon oxide film 2'' of nm thickness was formed (Fig. 3(b)
)). Then, as shown in the same figure (C), A s f80
Ion implantation was performed under the conditions of keV, 5 x 10"cm-" and heating at 9500° for 20 minutes in a N2 atmosphere to form a new ion implant in the source/drain/region 4 with the exception of the gate edge. Source/drain regions 4' were formed.

In this case, the silicon oxide film 2'' on the side of the gate serves as a mask for ion implantation and plays the role of a so-called spacer.Like this: C1 is a north drain region 4 containing a low concentration of impurities, and a source region 4 containing a high concentration of impurities.・The drain structure where the drain regions 4' overlap except for the gate edge is L.
D D (Lightlyl) ped plain
), and is widely regarded as a high-voltage device structure. Then, as shown in the same figure (d), the PSG film 5 is
After depositing the aluminum by CVD, contact holes were made on the source/drain regions, and aluminum interconnections 6 were formed. The MO8 field effect semiconductor device manufactured in this manner showed good electrical characteristics. Similar prototypes could be made using other high melting point metals, such as MO.

〔Effect of the invention〕

According to the present invention, since a SiOx film having a uniform thickness can be selectively formed on the surface of a high melting point metal, the oxidation resistance of the high melting point metal and the maskability against ion implantation are significantly improved.

In addition, by combining with other processes, it can be easily applied to LDD structures, etc. In particular, if all the Si in the high melting point metal is oxidized, a low resistance value equivalent to that of pure gold or copper can be returned. is also one of its strengths. The present invention consists of an operation of mixing Si and an operation of oxidizing the Si, both of which can be easily realized using current semiconductor manufacturing equipment and are excellent in terms of economy and efficiency.

[Brief explanation of drawings]

FIG. 1, FIG. 2, and FIG. 3 are all process explanatory diagrams showing one embodiment of the present invention. 1... Tungsten film containing Si, 2.2', 2"
...Silicon oxide film, 3...Silicon crystal substrate, 4
...Source/drain region, 5,5'...Phosphorus glass, 6...Aluminum wiring, 7...Tungsten silica flattened jth 3rd section 5'

Claims (1)

[Claims] In a semiconductor device having an electrode wiring mainly made of a high melting point metal (W, Mo, Ta, etc.), Si of 1 ppm or more and 25% or less by weight is mixed into the high melting point metal, and a part or A method for manufacturing a semiconductor device, characterized in that a SiO_2 film with a uniform thickness (1 to 500 nm) is formed on the surface of an electrode wiring by oxidizing all the parts.