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JPS6116517A - Manufacture of photomask - Google Patents

Manufacture of photomask

Info

Publication number
JPS6116517A
JPS6116517A JP59137737A JP13773784A JPS6116517A JP S6116517 A JPS6116517 A JP S6116517A JP 59137737 A JP59137737 A JP 59137737A JP 13773784 A JP13773784 A JP 13773784A JP S6116517 A JPS6116517 A JP S6116517A
Authority
JP
Japan
Prior art keywords
mask
layer
mask layer
thickness
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59137737A
Other languages
Japanese (ja)
Inventor
Noriaki Nakayama
中山 範明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59137737A priority Critical patent/JPS6116517A/en
Publication of JPS6116517A publication Critical patent/JPS6116517A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Inorganic Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Electron Beam Exposure (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)

Abstract

PURPOSE:To enable to display the effect of an electron beam exposure when a mask pattern is microscopically formed by a method wherein a mask layer is formed using a material of good heat conductivity. CONSTITUTION:A resist film 3 is formed on the blank mask whereon a mask layer 2a is provided on a glass substrate 1, and after an electron beam is exposed on an irradiation region 4, the removal region 5 corresponding to the irradiation region 4 on the resist layer 3 is removed by developing. Subsequently, a mask pattern is formed by removing the removal region 6 of the mask layer 2a by performing an etching using the resist layer 3 as a mask. The mask 2a consists of the Al of approximately 0.01mum in thickness and the Cu of approximately 0.1mum in thickness, for example, and the Al is faced to the substrate 1 to increase the adhesiveness with the substrate 1. When an electrode beam is made to irradiate, the temperature rise on the circumference of the irradiation region 4 is lowered than before, and the patterns of the removal regions 5 and 6 are coincided with each other. The mask 2a may be formed with the alloy of Al and AlCu, and the desirable thickness of the mask 2a is 0.1-0.4mum.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、ホトマスクの製造方法に係り、特に、例えば
半導体装置などの製造に使用されるホトマスクのマスク
パターン微細化に対応して、電子ビーム露光を行うホト
マスクの製造方法の改良に藺す。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a photomask, and in particular, in response to the miniaturization of mask patterns of photomasks used for manufacturing semiconductor devices, etc. The aim is to improve the manufacturing method of photomasks that perform exposure.

多方面に使用される半導体装置をはじめ、種々の装置の
製造における微細加工手段の中にホトリソグラフィ技術
があるが、例えば該半導体装置の高集積化などに伴う該
加工の微細化は、該技術に使用されるホトマスクのマス
クパターン微細化を要請する。
Photolithography technology is one of the microfabrication methods used in the manufacture of various devices including semiconductor devices used in a wide range of fields. We request that the mask patterns of photomasks used in

ホトマスクは、一般に、第3図(a)〜(f)に側断面
図で示した工程順により製造される。
Photomasks are generally manufactured by the process sequence shown in side cross-sectional views in FIGS. 3(a) to 3(f).

即ち、ガラスの基板1上にマスクパターンを形成するマ
スク層2を設けたブランクマスク(同図1a)図示)に
レジストを塗布してレジスト層3を形成(同図(b1図
示)し、照射領域4に光または電子ビームを照射する露
光(同図(C1図示矢印)を行った後、現像によりレジ
スト層3における照射領域4に対応する除去領域5を除
去(同図(d)図示)する。
That is, a resist is applied to a blank mask (as shown in FIG. 1a) on which a mask layer 2 for forming a mask pattern is provided on a glass substrate 1 to form a resist layer 3 (as shown in FIG. 1b), and the irradiation area is 4 is exposed to light or an electron beam (as shown by the arrow C1 in the figure), the removed region 5 corresponding to the irradiated region 4 in the resist layer 3 is removed by development (as shown in FIG. 4(d)).

続いてレジスト層3をマスクにしたエツチングによりマ
スク層2の除去領域6を除去(同図(e)図示)してマ
スクパターンを形成し、更にレジスト層3を除去(同図
(f1図示)して製造完了する。
Subsequently, the removed region 6 of the mask layer 2 is removed by etching using the resist layer 3 as a mask (as shown in (e) in the same figure) to form a mask pattern, and the resist layer 3 is further removed (as shown in (f1) in the same figure). Manufacture is completed.

上記説明はレジストがポジ型の場合であるが、ネガ型の
場合はレジスト層3の除去領域と残留領域とが逆になる
のみであるので、以下はポジ型レジストの場合で説明す
る。
The above explanation is for the case where the resist is a positive type, but in the case of a negative type, the removed area and the remaining area of the resist layer 3 are simply reversed, so the following description will be made for the case of a positive type resist.

前記マスクパターン微細化は、照射領域4を微細化させ
るので、前記露光における照射に電子ビームを使用する
ようになるが、この際、照射領域4パターンとマスクパ
ターンを形成する除去領域6パターンとを一致させるこ
とが重要である。
In the mask pattern miniaturization, the irradiation area 4 is made smaller, so an electron beam is used for irradiation in the exposure, but at this time, the irradiation area 4 pattern and the removal area 6 pattern forming the mask pattern are separated. It is important to match.

なお、前記装置の量産に際して、ホトマスクの製造過程
にレチクルの製造を行う場合があるが、該レチクルは、
ホトマスクと同様な方法で製造されるので、本発明には
、レチクルの場合も含まれる。
In addition, when mass producing the above-mentioned device, a reticle may be manufactured during the photomask manufacturing process, but the reticle is
The present invention also includes the case of a reticle, since it is manufactured by a method similar to that of a photomask.

〔従来の技術とその問題漁〕[Conventional technology and its problems]

ホトマスクのマスクパターンを電子ビーム露光により形
成する場合、第3図図示のマスク層2は、材料をクロム
(Cr)にし厚さを0.1μm程度にするのが、従来の
代表的な方法である。
When a mask pattern of a photomask is formed by electron beam exposure, a typical conventional method is to make the mask layer 2 shown in FIG. 3 from chromium (Cr) and to have a thickness of about 0.1 μm. .

第4図はこの場合の一例における照射領域パターンとマ
スク層の除去領域パターンとの関係を示した側断面図f
al平面図中)である。
FIG. 4 is a side sectional view f showing the relationship between the irradiation area pattern and the mask layer removal area pattern in an example of this case.
al top view).

これは、レジスト層3の材料をPMMA (代表的な電
子線用ポジ型レジスト)厚さを約1μmにし、照射領域
4の大きさを約3μm角に、照射条件を、電流密度2.
0A/、ffl、照射量3.5 X 10−5 C/c
J、照射時間17.5μsにした場合であるが、レジス
ト層3の除去領域5パターンおよびこれに伴うマスク層
2の除去領域5パターンが照射領域4パターンより大き
くなり、その差である過大領域7の幅は0.1μm程度
に及んでいる。
The resist layer 3 is made of PMMA (a typical positive resist for electron beams) with a thickness of approximately 1 μm, the irradiation area 4 is approximately 3 μm square, and the irradiation conditions are set to a current density of 2.0 μm.
0A/, ffl, irradiation dose 3.5 x 10-5 C/c
J, when the irradiation time is 17.5 μs, the 5 patterns of removed areas of the resist layer 3 and the 5 patterns of removed areas of the mask layer 2 accompanying this are larger than the 4 patterns of irradiated areas, and the difference between them is the excessive area 7. The width is about 0.1 μm.

過大領域7の幅の上記のような大きさは、電子ビーム露
光における露光領域IIJ御可能精度より大きいもので
、マスクパターンの微細化に当たって、電子ビーム露光
を採用する効果の発揮を阻害している問題点である。
The above-mentioned width of the excessive area 7 is larger than the accuracy with which the exposure area IIJ can be controlled in electron beam exposure, and inhibits the effectiveness of electron beam exposure in miniaturizing mask patterns. This is a problem.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点は、ガラス基板上に設けられ、電子ビーム露
光によりパターン形成されて、マスクパターンを形成す
るマスク層を、アルミニウム(Al)、1iJ(Cu)
、アルミニウム銅合金(AICu含Cuを群とする中の
一つ以上の材料で形成する本発明のホトマスクの製造方
法によって解決される。
The problem is that the mask layer, which is provided on a glass substrate and is patterned by electron beam exposure to form a mask pattern, is made of aluminum (Al), 1iJ (Cu).
This problem is solved by the method of manufacturing a photomask of the present invention, which is formed of one or more materials from the group consisting of aluminum-copper alloys (AICu-containing Cu).

本発明によれば、前記マスク層の厚さを、0.1〜0.
4μmにするのが望ましい。
According to the present invention, the thickness of the mask layer is 0.1 to 0.
It is desirable that the thickness be 4 μm.

〔作用〕[Effect]

前記過大領域が発生するのは、レジスト層における電子
ビーム照射領域部の周囲が、電子ビームのエネルギーに
よる該照射領域部の発熱と熱伝導とにより温度上昇し、
現像に際して該照射領域部と共に除去される化学反応を
起こすことに起因するものと考えられる。
The excessive area occurs because the temperature around the electron beam irradiation area in the resist layer increases due to heat generation and heat conduction of the irradiation area due to the energy of the electron beam.
This is thought to be due to a chemical reaction that occurs during development, where the irradiated area is removed together with the irradiated area.

本発明においては、基板、マスク層、レジスト層の中で
熱伝導の良いマスク層の材料を従来より熱伝播率α(α
−λ/Cρ、λ:熱伝導率、c二比熱、ρ:重密度の大
きい前記材料にして熱伝導の様態を変え、即ち、前記照
射領域部の発熱の放散を速くして前記周囲の温度上昇を
従来より低減させ、該周囲における前記化学反応の発生
を抑偏し問題の過大領域の幅を従来より小さくしている
In the present invention, among the substrate, mask layer, and resist layer, the material of the mask layer that has good thermal conductivity is
-λ/Cρ, λ: thermal conductivity, c2 specific heat, ρ: change the mode of heat conduction by using the material with a large density, that is, speed up the dissipation of heat in the irradiation area, thereby increasing the temperature of the surrounding area. This reduces the rise in temperature compared to the conventional method, suppresses the occurrence of the chemical reaction in the surrounding area, and makes the width of the problematic excessive region smaller than the conventional method.

マスク層材料の上記変更は、該マスク層の硬度を低下さ
せるが、当該ホトマスクを使用する露光に、近年多用さ
れているプロキシミティコンタクト法やプロジェクシコ
ン法を採用すれば、該ホトマスクは、露光対象のウェハ
に接触することがなく、使用上支障がない。
The above change in the mask layer material reduces the hardness of the mask layer, but if the proximity contact method or projecticon method, which has been widely used in recent years, is used for exposure using the photomask, the photomask can be used to It does not come into contact with the wafer, so there is no problem in using it.

マスク層の厚さに関しては、上述した熱伝導の点から0
.1μm以上であることが望ましく、また、マスク層の
エツチングを従来の方法で行う際のサイドエッチの大き
さを制限する点から0.4μm以下であることが望まし
い。
Regarding the thickness of the mask layer, from the point of view of heat conduction mentioned above,
.. The thickness is preferably 1 .mu.m or more, and is preferably 0.4 .mu.m or less in order to limit the size of side etching when the mask layer is etched by a conventional method.

かくして、本発明の方法により、マスクパターンの微細
化に当たって、電子ビーム露光を採用する効果を発揮し
得るホトマスクの製造が可能になる。
Thus, the method of the present invention makes it possible to manufacture a photomask that can exhibit the effect of employing electron beam exposure in miniaturizing a mask pattern.

〔実施例〕〔Example〕

第1図はホトマスクの本発明の製造方法による一実施例
の照射領域パターンとマスク層の除去領域パターンとの
関係を示した側断面図(al平面図(bl、第2図はマ
スク層の材料の違いによる露光時の温度分布状算値例を
示した側断面図(al (blである。
FIG. 1 is a side sectional view (al plan view (BL) showing the relationship between the irradiation area pattern and the removal area pattern of the mask layer in one embodiment of the photomask manufacturing method of the present invention; FIG. A side sectional view (al (bl)) showing an example of calculated temperature distribution during exposure due to differences in .

第1図(a) (blば、それぞれ第4図(al (b
lに対応しており、第1図図示方法の第4図図示従来方
法との相違は、厚さ0.1μm程度のCrであるマスク
N2を、厚さ約0.01 p mのAIと厚さ約0.1
μmのCuとの二層構成にしたマスク層2aに置き換え
た点である。
Figure 1 (a) (bl), Figure 4 (al (b), respectively)
The difference between the method shown in FIG. 1 and the conventional method shown in FIG. Approximately 0.1
The point is that the mask layer 2a is replaced with a two-layer structure with Cu of μm.

マスク層2aの被着は、例えば蒸着など通常の方法でよ
<、Alを基板1側にして基板1との密着性を上げてい
る。
The mask layer 2a is deposited by a conventional method such as vapor deposition, and Al is placed on the substrate 1 side to improve adhesion to the substrate 1.

マスク層2aのエツチングは、マスク層2aの厚さから
して、通常の方法で行ってサイドエッチの大きさが問題
になることはなく、除去領域6パターンは除去領域5パ
ターンに一致する。
Etching of the mask layer 2a is performed by a normal method in view of the thickness of the mask layer 2a, so that the size of side etching does not become a problem, and the pattern of the 6 removed regions matches the pattern of the 5 removed regions.

こうすることにより、電子線ビームを照射した際のレジ
スト層3における照射領域4周囲の温度上昇が従来より
低くなって、除去領域5.6は従来より小さくなり、第
4図図示の場合0.1μmに及んだ過大領域7の幅を同
一照射条件において略0に近づけることが出来た。
By doing this, the temperature rise around the irradiation area 4 in the resist layer 3 when irradiated with the electron beam becomes lower than before, and the removal area 5.6 becomes smaller than before, and in the case shown in FIG. The width of the overextended region 7, which was 1 μm, could be brought close to 0 under the same irradiation conditions.

ちなみに、第1図、第4図図示の場合の照射直後におけ
る両図(a1図示断面の温度分布試算値を第2図(a)
、0))に示すが、この図からも上述の結果を理解する
ことが出来る。なお、同図における横軸の0点は照射領
域4の中心点であり、縦軸の0点はレジスト層3の表面
である。
By the way, in the cases shown in Figures 1 and 4, the temperature distribution trial values of the cross section shown in Figure 2 (a) are shown in both figures immediately after irradiation (a1).
, 0)), the above results can also be understood from this figure. Note that the zero point on the horizontal axis in the figure is the center point of the irradiation area 4, and the zero point on the vertical axis is the surface of the resist layer 3.

上記実施例におけるマスク層2aは、熱伝播率αがCr
の約4倍であるCuを厚さ約0.1μmにした層が主体
になっているが、同じく約3倍であるAl、AlCu合
金で形成してもよく、厚さは厚い程過大領域7の幅が小
さくなることは容易に類推可能である。
The mask layer 2a in the above embodiment has a thermal propagation coefficient α of Cr.
The main layer is made of Cu, which is about 4 times the thickness of Cu, to a thickness of about 0.1 μm, but it may also be formed of Al or AlCu alloy, which is also about 3 times the thickness, and the thicker the layer, the more the oversized region 7 It can be easily inferred that the width of is reduced.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明の構成により、形成される
マスクパターンを電子ビーム露光の照射f112パター
ンに近づけるホトマスクの製造方法が提供出来て、マス
クパターンの微細化に当たって、電子ビーム露光を採用
する効果を発揮し得るホトマスクの製造を可能にさせる
効果がある。
As explained above, according to the structure of the present invention, it is possible to provide a photomask manufacturing method in which the formed mask pattern approaches the irradiation f112 pattern of electron beam exposure, and the effect of adopting electron beam exposure in miniaturizing the mask pattern. This has the effect of making it possible to manufacture a photomask that can exhibit the following properties.

【図面の簡単な説明】[Brief explanation of drawings]

図面において、 第1図はホトマスクの本発明の製造方法による一実施例
の照射領域パターンとマスク層の除去領域パターンとの
関係を示した側断面図+al平面図(bl、 第2図はマスク層の材料の違いによる露光時の温度分布
状算値例を示した側断面図(a) (b)、第3図はホ
トマスク製造の一般的な工程順を示U7た側断面図(a
l〜(f)、 第4図はホトマスクの従来の代表的製造方法による一例
の照射領域パターンとマスク層の除去領域パターンとの
関係を示した側断面図fa)平面図(b)である。 図中において、 1は基板、       2.2aはマスク層、3はレ
ジスト層、    4は照射領域、5.6は除去領域、
  7は過大領域、をそれぞれ示す。
In the drawings, FIG. 1 is a side cross-sectional view + al plan view (BL) showing the relationship between the irradiation area pattern and the mask layer removal area pattern in one embodiment of the photomask manufacturing method of the present invention, and FIG. Figure 3 is a side cross-sectional view (a) showing an example of the temperature distribution during exposure due to differences in materials, and Figure 3 is a side cross-sectional view (a
1-(f), FIG. 4 is a side cross-sectional view (fa) and a plan view (b) showing the relationship between the irradiation area pattern and the mask layer removal area pattern in an example according to a typical conventional method of manufacturing a photomask. In the figure, 1 is a substrate, 2.2a is a mask layer, 3 is a resist layer, 4 is an irradiation area, 5.6 is a removal area,
7 indicates an excessive area, respectively.

Claims (2)

【特許請求の範囲】[Claims] (1)ガラス基板上に設けられ、電子ビーム露光により
パターン形成されて、マスクパターンを形成するマスク
層を、アルミニウム、銅、アルミニウム銅合金の中の一
つ以上の材料で形成することを特徴とするホトマスクの
製造方法。
(1) A mask layer provided on a glass substrate and patterned by electron beam exposure to form a mask pattern is formed of one or more materials among aluminum, copper, and aluminum-copper alloy. A method for manufacturing a photomask.
(2)前記マスク層の厚さを、0.1〜0.4μmにす
ることを特徴とする、特許請求の範囲第1項記載のホト
マスクの製造方法。
(2) The method for manufacturing a photomask according to claim 1, wherein the thickness of the mask layer is set to 0.1 to 0.4 μm.
JP59137737A 1984-07-03 1984-07-03 Manufacture of photomask Pending JPS6116517A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59137737A JPS6116517A (en) 1984-07-03 1984-07-03 Manufacture of photomask

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59137737A JPS6116517A (en) 1984-07-03 1984-07-03 Manufacture of photomask

Publications (1)

Publication Number Publication Date
JPS6116517A true JPS6116517A (en) 1986-01-24

Family

ID=15205648

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59137737A Pending JPS6116517A (en) 1984-07-03 1984-07-03 Manufacture of photomask

Country Status (1)

Country Link
JP (1) JPS6116517A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07295205A (en) * 1994-04-27 1995-11-10 Lg Semicon Co Ltd Manufacture of lithography mask
JP2002251000A (en) * 2001-02-26 2002-09-06 Semiconductor Leading Edge Technologies Inc Method of manufacturing phase shift mask, phase shift mask, phase shift mask blank and method of manufacturing semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07295205A (en) * 1994-04-27 1995-11-10 Lg Semicon Co Ltd Manufacture of lithography mask
JP2002251000A (en) * 2001-02-26 2002-09-06 Semiconductor Leading Edge Technologies Inc Method of manufacturing phase shift mask, phase shift mask, phase shift mask blank and method of manufacturing semiconductor device

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