JPS6066286A - Display panel and manufacture thereof - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a transparent substrate (quartz,
The present invention relates to a display panel for an image display formed by driving a liquid crystal, electrochromic, etc. sealed in a sapphire, high melting point glass, etc.

For example, transmissive display panels such as portable LCD televisions,
As shown in FIG. 1, a liquid crystal 7 is sealed between a transparent active matrix substrate 1 on which several thousand to tens of thousands of substrates are arranged, and a transparent substrate 4 having a transparent common electrode 6 via a spacer 3. - The equivalent circuit per pixel is as shown in Figure 2, and the selected gate signal turns on the MOS transistor 8.
However, the video signal is held in the capacitor 1o, and the molecular arrangement of the liquid crystal 9 changes by voltage application to perform display.

The matrix substrate conventionally used for these is formed, for example, by the following method. In FIG. 6, Po1y-81 (or α-81) of 100 to 150× is grown in a vapor phase on a transparent quartz substrate 11, and a MOS is formed by photo-etching.
) After forming the active region 12 of the transistor, grow gate #13 of about 1000X by thermal oxidation. Next, P・1 y −S i (or α−8i) is approximately 5
After 000X growth and phosphorus diffusion, a gate electrode 14 is formed by photoetching. Subsequently, using the gate electrode 14 as a mask, phosphorus is ion-implanted to form source-drains 15 and 16, and then interlayer insulation f! 5102 was vapor-phase grown as J17, contact holes 18 and 19 were opened, and transparent electrode layers n203 +8nO2 (processed T) were formed.

) was subjected to sputter photoetching of about 1 sooX to form a video signal lFt electrode 202 and a pixel electrode 21. However, in these cases, a reduced pressure furnace is used to grow POly-81 from the viewpoint of productivity and characteristics, but since it is deposited on the front and back sides of the substrate, in order to make a transmission type display panel, The backside Poly-Eli must also be etched at the same time, and a cylindrical OF4 plasma etcher is used for etching. However, the step shape of the etched P o 1y - B i is steep, making it difficult to control the taper, and especially at the intersection of the thin TO film formed by sputtering and the gate electrode line, foil breakage occurs as shown in Figure 4. Many wire breaks occur due to this, and this is a major cause of lower yields. As a method to improve these, we also tried using a high a P 8 G film as the interlayer insulating film and performing reflow processing, but due to the high temperature processing, the characteristics of the transistor changed,
This is not a good idea as it may cause deformation of the board.

However, the present invention eliminates the above-mentioned drawbacks and improves the manufacturing yield and quality of display panels, and will be described in detail below based on Examples. Similarly to FIG. 3, a transparent quartz substrate 11 with a thickness of 600 μm was coated with
The active region 12 was formed by vapor phase growth of 0x PO17-81 and photoetching, and the gate film 13 of 1000^ was grown by steam oxidation at 900°C. Poly again
-81 was grown by about 500X, phosphorus was diffused at 900°C, and then photoetched to form the gate electrode 14.

Etching of 'Po1y-81 in previous E was done using a cylindrical plasma etcher, with CF4+025% and 0-
The test was carried out under gas conditions of 4 tons. Next, the sauce
To form drain 15.16, add phosphorus to 2×1Q”orr.
2 and then vapor phase growth 8102 s 'o o
oX growth, followed by 8 sq.
1o2 anisotropic etching was performed on the entire surface. This allows P
o 1y -S i On both sides of the gate electrode 14, a fifth
As shown in the figure, S10□22 remains, and its angle was 40 to 50 degrees when examined using an electron microscope. Also, this angle is B10
By changing the thickness of 2, it can be varied with good reproducibility.

Subsequently, 8102 was again vapor-phase grown to form the interlayer insulating film 17, and after contact holes were formed, the processed TO was sanded at 1500x, and the signal electrode 20 and pixel electrode 21 were formed by photoetching.In this way, 210 x 152 pixels were formed in 1.6 inches. We manufactured optical display panels for LCD TVs, but as in the past, there were times when the TOO would break at the stepped part, and the aging test also confirmed that the reliability had improved. It can also be applied to improve the level difference in ICs and thin film heads.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram of a display panel, FIG. 2 is a pixel equivalent circuit, FIG. 3 is a schematic diagram of a matrix substrate according to the present invention, and FIG. 4 is a conventional diagram. 1.4.11...Transparent substrate 5...Polarized light m (filter) 7.9...
・Liquid crystal 8...M08 transistor 10...
... Capacitor 13 ... Gate film 14 ... Gate electrode 17 ... Interlayer insulating film 20 ... Signal 't41 pole 21 ... Pixel electrode 22...IS102 Fig. 1

Claims (2)

[Claims] (1) Pixel transparent electrode and thin film MO8) In an image display that drives a liquid crystal sealed in a transparent active matrix substrate consisting of transistors and a transparent counter substrate having a transparent common electrode, the transparent active matrix substrate Electrode and MOEI) transistor game)! A display panel characterized in that a tapered insulating layer is formed only on both sides of a gate electrode in the case of a few lines that intersect with each other. (2) In (1), after forming a semiconductor thin film pattern for forming a thin film transistor, a step of forming an insulating layer with a small thickness of Izutsu, a step of performing anisotropic dry etching on the entire surface of the first insulating layer, and a second step. A display panel 6r) characterized by being subjected to a step of forming an insulating layer! l;uS-J=f
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