JPS6055631A - Preparation of semiconductor device - Google Patents

Abstract

PURPOSE:To simplify a process of patterning, eliminating need of a resist, by selectively implanting atoms into a distributing or insulating layer and by patterning it utilizing the difference of etching rates between the implanted section and non-implanted section. CONSTITUTION:For patterning the thin film 202 for an electrode formed on a semiconductor substrate 201, atoms 203 are first implanted into the thin film 202 in a selective manner. The section 204 implanted with the atoms has a larger etching rate than the section 205 without atomic implantation. When the film is etched, the section without atomic implantation 205 also reduces its thickness by etching, while the section 204 implanted with atoms is etched more since it has a larger etching rate. Thus, the thin film 202 for an electrode can be patterned. The atomic species and the accelerating energy for implanting atoms are selected depending on the thickness and type of the thin film to be patterned so that the implanted atomic species do not enter into the semiconductor device.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a method for manufacturing a semiconductor device that can pattern a film on a semiconductor device without using a resist.

(Prior Art) FIG. 1 shows a cross-sectional view of an electrode wiring patterning process in a conventional semiconductor device manufacturing process. When patterning the electrode thin film 102 (FIG. 1(a)) formed on the semiconductor substrate 101, resist JO, ? Apply to the entire surface of the sample. (FIG. 1(1))) Next, the resist 103 is selectively irradiated with ultraviolet rays to etch the resist. (No.+l'2J (c)) After L is removed, the desired electrode thin film lo2 is renosed) 10,? Turning is performed using etching as a mask (see Fig. 1(d)). Therefore, since a resist is used, if the adhesion V1 between the resist and the electrode thin film is poor, side etching may occur during thin film etching, causing problems in fine wiring processing. Furthermore, since the resist is an organic substance, it requires thorough cleaning before proceeding to subsequent steps such as heat treatment, making the process complicated.

(Objective of the Invention) An object of the present invention is to provide a method for manufacturing a semiconductor device that prevents side etching and simplifies the process.

(Structure of the Invention) The present invention involves selectively implanting atoms into at least one of a wiring layer and an insulating layer provided on a semiconductor substrate using a well-known technique, and patterning using the difference in etching rate depending on whether or not atoms are implanted. This is a method of manufacturing a semiconductor device characterized by the following.

(Example) An example of the present invention will be described in detail below with reference to FIG.

First, an electrode thin film 202 is formed on a semiconductor substrate 202 (FIG. 2(a)). When patterning the electrode thin film 202, first, as shown in FIG. 2(b),
Atom implantation 203 is selectively performed into the electrode thin film 202 .

The etching rate of the portion 204 that has received the atomic implantation is increased compared to the etching rate of the portion 205 that has not received the atomic implantation.

When etching is performed thereafter, the film thickness of the portion 205 not subjected to atomic implantation is also reduced due to etching, but since the etching rate of the portion 204 subjected to atomic implantation is high,
As shown in FIG. 2(c), the electrode thin film 202 can be patterned.

The atomic species for the atomic implantation performed at this time may be either inert gas species such as Ar + Ne or active atoms such as As r P. The implantation of active atoms allows for larger etching rate differences. Further, the acceleration energy is appropriately selected depending on the thickness and type of the target thin film, and is carried out within a range where the implanted atomic species do not enter the semiconductor device. Further, the dose amount is a factor that greatly influences the magnitude of the difference in etching rate. For example, when Ar is added in AA], X 101
When implanted at 6/rtn2401ceV, the etching rate in the damaged area is 2-3 that of AA with no atoms implanted.
It can be more than 2 times.

(Effects of the Invention) As explained above, in this example, atoms are selectively implanted into the thin film to be turned, and the difference in etching rate between the part where the atoms are implanted and the part where the atoms are not implanted is calculated. Do not use Lennost for patterning.
This turning process eliminates errors in dimensional conversion between the mask and the mask due to side etching, which occurs due to problems with thin film adhesion when using resist, making it possible to perform accurate dimensional turning. . Furthermore, since lenost is not used, there is no need for a cleaning process, which simplifies the process.

Furthermore, the present invention can be used for patterning any semiconductor thin film, insulator thin film, or metal thin film.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a patterning process for electrode wiring in a conventional semiconductor device manufacturing process, and FIG. 2 is a cross-sectional view of each process in an embodiment of the present invention. 10... Semiconductor substrate, 102... Thin film for electrode, 1
03...Resist, 201...Semiconductor substrate, 202
...Thin film for electrode, 203...Atom implantation, 204...
- A portion of the electrode thin film that receives atom implantation, 205...a portion of the electrode thin film that does not receive atom implantation. Patent Applicant Oki Electric Industry Co., Ltd. (5) 05 1 Procedural Amendment (Voluntary) 16 JPO Commissioner 1 Indication of the Case 1982 Patent Application No. 163173 2, Name of the Invention Semiconductor device manufacturing method 3, relationship with the amended person case Patent applicant address (〒105) 1-7-12 Toranomon, Minato-ku, Tokyo
No. 4 Agent address (105) 1-7-12 Toranomon, Minato-ku, Tokyo
As shown in Attachment 6, Contents of Amendment (1) The column "Claims" in the specification is amended as shown in Attachment 6. (2) On page 2, line 15 of the same book, the statement ``The purpose of the present invention is to prevent side etching'' is amended to ``The purpose of the present invention is to perform turning without using rennost.'' . (3) In the 20th line of page 2 of the same book, the phrase "in at least one of a wiring layer and an insulating layer" is corrected to "in a wiring layer or an insulating layer." (4) On page 3, line 7 of the same book, the phrase "on the semiconductor substrate 202" is corrected to "on the semiconductor substrate 201." Attachment 2, Claims A method for manufacturing a semiconductor device comprising steps of forming a wiring layer and an insulating layer on a semiconductor substrate, wherein atoms are selectively implanted into the wiring layer or the insulating layer. A method of manufacturing a semiconductor device, characterized in that turning is performed using a difference in etching rate depending on presence or absence of etching.

Claims (1)

[Claims] A method for manufacturing a semiconductor device comprising the steps of forming a wiring layer and an insulating layer on a semiconductor substrate, and turning at least one of the wiring layer and the insulating layer. A method for manufacturing a semiconductor device, characterized by selectively implanting atoms and patterning using a difference in etching rate depending on whether or not atoms are implanted.