JPS6490633A - Synchronization acquisition circuit - Google Patents

Abstract

PURPOSE:To attain quick synchronization acquisition by preparing a register storing an M series code and taking correlation between a reception signal and a code word of the M series code stored so as to eliminate the need for a narrow band filter or the like. CONSTITUTION:In bringing a reset signal G' for reception start and synchronization acquisition to 0 (active), an output of an OR circuit 14 goes to 0, an AND circuit 15 does not pass a clock 18a of a VCO 18 and a shift register 11 is stopped and one code word of the M series code in this case is stored and the result is outputted from FFS 1-7. In receiving the reception signal in this state, the same code word stored in the register 11 at a point of time is arranged to a tapped delay line 10 and the output of the correlation section 12 is increased. When the output 102 reaches a reference voltage VR or above by a synchronization deciding section 13, it is discriminated as the synchronizing state and the synchronizing detection signal 13a goes to 1. Thus, the circuit 14 goes to 1 and the circuit 15 passes through the clock 18 and the register 11 starts the operation. Then the synchronization is taken and the output of the correlation section 12 is sent to a demodulation circuit to start the data reception.