JPS6426967A - Multi-firmware system - Google Patents

Abstract

PURPOSE:To easily secure synchronization among plural firmwares at the initialization by providing an open collector driver to each firmware for output of a low level in a reset state together with a reading circuit with which a CPU can read out the output of said driver. CONSTITUTION:The flip-flop 3 and 4 are cleared with input of a reset signal (a) and the outputs of open collector buffers 5 and 6 are set at low levels. Then CPU1 and 2 are reset to start the initialization processing of each firmware. The CPU1 initializes a common memory 9. When this initialization processing is over, the end signals (b) and (c) are outputted asynchronously with each other. Thus the outputs of both buffers 5 and 6 are set at high levels. The firmware that outputted an end signal checks an end signal (d) serving as a common signal on a system bus via the common signal input buffers 7 and 8. Then the signal (d) is set at a high level to secure the synchronization among those firmwares after all firmwares output both signals (b) and (c).