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JPS6422151A - Qpsk signal demodulator - Google Patents

Qpsk signal demodulator

Info

Publication number
JPS6422151A
JPS6422151A JP62178333A JP17833387A JPS6422151A JP S6422151 A JPS6422151 A JP S6422151A JP 62178333 A JP62178333 A JP 62178333A JP 17833387 A JP17833387 A JP 17833387A JP S6422151 A JPS6422151 A JP S6422151A
Authority
JP
Japan
Prior art keywords
signal
output
qpsk signal
phase
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62178333A
Other languages
Japanese (ja)
Inventor
Eiji Yamauchi
Shuzo Hitotsumachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62178333A priority Critical patent/JPS6422151A/en
Publication of JPS6422151A publication Critical patent/JPS6422151A/en
Pending legal-status Critical Current

Links

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To demodulate the fluctuation of the carrier frequency of a QPSK signal even at the time of the wide fluctuation by obtaining a signal in which the carrier, frequency and phase of the QPSK signal synchronize and demodulating the QPSK signal. CONSTITUTION:The QPSK signal is inputted to synchronizing detectors 2 and 3 and multiplied with the synchronizing detectors 2 and 3 by an output in which the output of a generator 12 and the output of the QPSK signal are phase-shifted by a 90 deg. phase device 5. The multiplied output of the synchronizing detectors 2 and 3 is inputted through low-pass filters 6 and 7 to a reference phase regenerator 8, and the output signal is impressed through a low-pass filter 9 to an adder 13. The output signal of the low-pass filter 9 and a low-pass filter 14 is added by a prescribed rate with the adder 13. The output signal of the adder 13 is supplied to the generator 12 as a control signal, and the generator 12 outputs the signal in which the carrier, frequency and phase of the QPSK signal synchronize.
JP62178333A 1987-07-17 1987-07-17 Qpsk signal demodulator Pending JPS6422151A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62178333A JPS6422151A (en) 1987-07-17 1987-07-17 Qpsk signal demodulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62178333A JPS6422151A (en) 1987-07-17 1987-07-17 Qpsk signal demodulator

Publications (1)

Publication Number Publication Date
JPS6422151A true JPS6422151A (en) 1989-01-25

Family

ID=16046657

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62178333A Pending JPS6422151A (en) 1987-07-17 1987-07-17 Qpsk signal demodulator

Country Status (1)

Country Link
JP (1) JPS6422151A (en)

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