JPS53108740A - Memory circuit - Google Patents
Memory circuitInfo
- Publication number
- JPS53108740A JPS53108740A JP2360077A JP2360077A JPS53108740A JP S53108740 A JPS53108740 A JP S53108740A JP 2360077 A JP2360077 A JP 2360077A JP 2360077 A JP2360077 A JP 2360077A JP S53108740 A JPS53108740 A JP S53108740A
- Authority
- JP
- Japan
- Prior art keywords
- memory circuit
- depletion
- bit line
- type transistor
- output point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2360077A JPS53108740A (en) | 1977-03-04 | 1977-03-04 | Memory circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2360077A JPS53108740A (en) | 1977-03-04 | 1977-03-04 | Memory circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS53108740A true JPS53108740A (en) | 1978-09-21 |
Family
ID=12115083
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2360077A Pending JPS53108740A (en) | 1977-03-04 | 1977-03-04 | Memory circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS53108740A (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0071989A2 (en) * | 1981-08-05 | 1983-02-16 | Nec Corporation | Memory device |
JPH04155690A (ja) * | 1990-10-18 | 1992-05-28 | Nec Ic Microcomput Syst Ltd | 半導体記憶装置 |
-
1977
- 1977-03-04 JP JP2360077A patent/JPS53108740A/ja active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0071989A2 (en) * | 1981-08-05 | 1983-02-16 | Nec Corporation | Memory device |
JPH04155690A (ja) * | 1990-10-18 | 1992-05-28 | Nec Ic Microcomput Syst Ltd | 半導体記憶装置 |
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