JPS5884684U - signal detection circuit - Google Patents
signal detection circuitInfo
- Publication number
- JPS5884684U JPS5884684U JP18063081U JP18063081U JPS5884684U JP S5884684 U JPS5884684 U JP S5884684U JP 18063081 U JP18063081 U JP 18063081U JP 18063081 U JP18063081 U JP 18063081U JP S5884684 U JPS5884684 U JP S5884684U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- counter
- monomulti
- information signal
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は回路図、第２図はタイムチャートである。
１・・・・・・磁気テープ、２・・・・・・再生ヘッド
、３・・・・・・アンプ、４・・・・・・波形整形回路
、５・・・・・・信号判別用カウンタ、６・・・・・・
フリップフロップ、７．１０・・・・・・ＡＮＤゲート
、８・・・・・・セットリセットフリップフロップ、９
．１３．１９・・・・・・モノマルチ、１１・・・・・
・パルス発生回路、１２・・・・・・カウンタ、１４゜
１５・・・・・−ＯＲゲート、１６・・・・・・シフト
レジスタ、１７・・・・・・メモリ回路、１８・・・・
・・比較一致回路。FIG. 1 is a circuit diagram, and FIG. 2 is a time chart. 1...Magnetic tape, 2...Playback head, 3...Amplifier, 4...Waveform shaping circuit, 5...For signal discrimination Counter, 6...
Flip-flop, 7.10...AND gate, 8...Set-reset flip-flop, 9
．． 13.19...Mono multi, 11...
・Pulse generation circuit, 12...Counter, 14゜15...-OR gate, 16...Shift register, 17...Memory circuit, 18...・
... Comparison matching circuit.
Claims (1)
のにおいて、情報信号を判別するカウンタと前記カウン
タで情報信号を判別したら反転するフリップフロップと
、前記フリップフロップが反転している間、クロックパ
ルスを発生するクロックパルス発生回路と前記クロック
パルスを計数して任意に設定された数になると反転する
カウンタと前記カウンタの反転で動作するモノマルチと
、前記モノマルチの信号をクロック信号に利用して情報
信号を転送するシフトレジスタと、検出したい信号をメ
モリするメモリ回路と、前記シフトレジスタと前記メモ
リ回路の信号とが二致したとき駆動パルスを発生する比
較一致回路とを備え、再生時に信号のサーチスピードが
一定のときに、前記情報信号を検出して、駆動パルスを
発生することを特徴とする信号検出回路。In a device that reproduces and detects an information signal recorded on a magnetic tape, there is a counter for determining the information signal, a flip-flop that inverts when the information signal is determined by the counter, and a clock pulse while the flip-flop is inverting. A clock pulse generation circuit that generates a clock pulse, a counter that counts the clock pulses and inverts them when an arbitrarily set number is reached, a monomulti that operates by inverting the counter, and a monomulti that uses the signal of the monomulti as a clock signal. It includes a shift register that transfers information signals, a memory circuit that stores the signal to be detected, and a comparison match circuit that generates a drive pulse when the signals in the shift register and the memory circuit match. A signal detection circuit characterized in that when a search speed is constant, the information signal is detected and a drive pulse is generated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18063081U JPS5884684U (en) | 1981-12-04 | 1981-12-04 | signal detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18063081U JPS5884684U (en) | 1981-12-04 | 1981-12-04 | signal detection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5884684U true JPS5884684U (en) | 1983-06-08 |
Family
ID=29977387
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18063081U Pending JPS5884684U (en) | 1981-12-04 | 1981-12-04 | signal detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5884684U (en) |
-
1981
- 1981-12-04 JP JP18063081U patent/JPS5884684U/en active Pending
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