JPS58155665U - flexible disk device - Google Patents
flexible disk deviceInfo
- Publication number
- JPS58155665U JPS58155665U JP5061782U JP5061782U JPS58155665U JP S58155665 U JPS58155665 U JP S58155665U JP 5061782 U JP5061782 U JP 5061782U JP 5061782 U JP5061782 U JP 5061782U JP S58155665 U JPS58155665 U JP S58155665U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- index
- inputs
- recording medium
- outputs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の一実施例を示す回路図、第2図は第1
図の動作を説明するためのタイミング図である。
1・・・・・・インデックス信号、2・曲・遅延回路、
5・・・・・・記録媒体挿入検出信号、6・曲・ヘッド
ロード制御信号。Fig. 1 is a circuit diagram showing one embodiment of the present invention, and Fig. 2 is a circuit diagram showing an embodiment of the present invention.
FIG. 3 is a timing chart for explaining the operation of the figure. 1...index signal, 2. song/delay circuit,
5... Recording medium insertion detection signal, 6. Song/head load control signal.
Claims (1)
デックス信号と、このインデックス信号を入力し一定時
間後に遅延インデックス信号を出力する遅延回路と、前
記インデックス信号と前記遅延インデックス信号とを入
力し記録媒体挿入検出信号を出力するNANDゲート回
路と、一方の入力端に外部制御装置から与えられるー、
ラドロード制御信号を入力し、他方の入力端に前記記録
媒体挿入検出信号をゲート制御信号として入力して、ヘ
ッドロードの禁止条件を含んだ−\ラッドード制御信号
をヘッドロード回路へ出力する論理ゲート回路とを具備
するこ゛とを特徴とするフレキシブルディスク装置。An index signal obtained by detecting an index hole in a recording medium, a delay circuit that inputs this index signal and outputs a delayed index signal after a certain period of time, and detects recording medium insertion by inputting the index signal and the delayed index signal. A NAND gate circuit outputs a signal, and one input terminal receives a signal from an external control device.
A logic gate circuit that inputs a Rad load control signal, inputs the recording medium insertion detection signal as a gate control signal to the other input terminal, and outputs a −\Rad control signal containing a head load prohibition condition to the head load circuit. A flexible disk device comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5061782U JPS58155665U (en) | 1982-04-09 | 1982-04-09 | flexible disk device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5061782U JPS58155665U (en) | 1982-04-09 | 1982-04-09 | flexible disk device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58155665U true JPS58155665U (en) | 1983-10-18 |
JPS6245333Y2 JPS6245333Y2 (en) | 1987-12-03 |
Family
ID=30061402
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5061782U Granted JPS58155665U (en) | 1982-04-09 | 1982-04-09 | flexible disk device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58155665U (en) |
-
1982
- 1982-04-09 JP JP5061782U patent/JPS58155665U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6245333Y2 (en) | 1987-12-03 |
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