JPS5854659A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPS5854659A JPS5854659A JP15335581A JP15335581A JPS5854659A JP S5854659 A JPS5854659 A JP S5854659A JP 15335581 A JP15335581 A JP 15335581A JP 15335581 A JP15335581 A JP 15335581A JP S5854659 A JPS5854659 A JP S5854659A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- lead frame
- semiconductor device
- lead
- wirings
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】 この発明は樹脂封止型半導体装置Ｋｌｌする。[Detailed description of the invention] The present invention relates to a resin-sealed semiconductor device.
従来、樹脂封止型半導体装置は第１図に示すように構成
されている。すなわち、９−ドフレーム１のダイスステ
ージ２に半導体素子３を固着し、この半導体素子３の端
子からリードフレームｌのリード４にワイヤボンディン
グにより金線Ｓで結線する。その後、樹脂モールド用金
璽６．１をリードフレームｌを介在するように設けるこ
とによ）形成される空１１に樹脂８を注入して樹脂封止
型半導体装置を構成していた。Conventionally, a resin-sealed semiconductor device has been constructed as shown in FIG. That is, the semiconductor element 3 is fixed to the die stage 2 of the nine-fold frame 1, and the terminals of the semiconductor element 3 are connected to the leads 4 of the lead frame 1 using gold wires S by wire bonding. Thereafter, a resin molding gold seal 6.1 was provided with a lead frame 1 interposed therebetween, and resin 8 was injected into the cavity 11, thereby constructing a resin-sealed semiconductor device.
しかしながら、金！ｌｌｔ、 ｖの平面度やリードフレ
ームｌの厚さのばらつきなどにより、金型６．７とリー
ドフレーム１との保合部で、いわゆるフラッシュと云わ
れている薄い樹脂パリ９が樹脂の漏洩により発生してい
た。この樹脂パリ９は半導体装置にとっては不要のもの
であり。However, gold! Due to the flatness of llt, v and variations in the thickness of the lead frame l, a thin resin pad 9, called a flash, may occur at the joint between the mold 6.7 and the lead frame 1 due to resin leakage. It was occurring. This resin material 9 is unnecessary for the semiconductor device.
金属製の外部リードの防蝕を行うために長時間かけてホ
ーニングし九秒、あるいは研磨などして除去してい九。In order to protect the metal external leads from corrosion, they are removed by honing for 9 seconds or polishing for a long time.
この発明は上記事情に鑑みてなされたもので。This invention was made in view of the above circumstances.
その目的とするところは、リードの少なくとも樹脂モー
ルドの外壁形成予定部分近傍に突起状ビードが形成され
たり−ドフレームを用いることにより、樹脂モールド時
にシける樹脂の流れ出しを防止して樹脂パリの発生を減
少させることができる樹脂封止型半導体装置を提供する
ことにある。The purpose of this is to prevent the resin from flowing out during resin molding by forming a protruding bead on the lead at least near the area where the outer wall of the resin mold is planned to be formed, and by using a dowel frame to prevent the resin from flowing out during resin molding, thereby preventing the occurrence of resin flakes. An object of the present invention is to provide a resin-sealed semiconductor device that can reduce the amount of damage.
以下、この発明の一実施例について図面を参照して説明
する。An embodiment of the present invention will be described below with reference to the drawings.
第２図はこの発明に係るリードフレームの構成図゛であ
る。すなわち、外枠２ｒ、ｚ＊をほぼ平行に相対向して
設け、この外枠ｘＢｘｘ間に複数本の連結片２３．２４
を所定の間隔で設ける。この連結片２ｇ、２４間の中央
部に連結片２５で支持されたダイスステージ２６を有し
。FIG. 2 is a block diagram of a lead frame according to the present invention. That is, the outer frames 2r and z* are provided substantially parallel to each other, and a plurality of connecting pieces 23, 24 are connected between the outer frames xBxx.
are provided at predetermined intervals. A die stage 26 supported by a connecting piece 25 is provided in the center between the connecting pieces 2g and 24.
このダイスステージ２６近傍に連結片２３．１４から多
数のリード２７．・・・が集合するように設けられて、
リードフレーム２８が構成されて−る。そして、このリ
ードフレーム２８には、少なくとも樹脂モールドする外
壁形成予定部分近傍のリード２１に突起状ビード２９が
設けられている。この突起状ビード２９は、第３図紬１
に示すように９−ド２２の一表面のみで屯よいが。In the vicinity of this die stage 26, a large number of leads 27. It was set up so that ... could gather,
A lead frame 28 is constructed. In this lead frame 28, a protruding bead 29 is provided at least on the lead 21 near the portion where the outer wall is to be formed by resin molding. This protruding bead 29 is shown in FIG.
As shown in the figure, only one surface of the 9-domain 22 is sufficient.
第３図（ｂ） Ｋ示すように表裏両面にそれぞれ対称的
に設けた方が大きな効果が得られる。Ｃの夷起状ビード
２９の高さは、リード２７０表面からたとえば１０μ駕
乃至５０μ冨糧度が適当であ°る。なお、第２図の点線
３０は、半導体素子を被覆する九めの樹脂モールドする
際の外壁形成予定位置を示している。As shown in FIG. 3(b) K, a greater effect can be obtained by providing them symmetrically on both the front and back surfaces. The appropriate height of the protruding bead 29 of C is, for example, 10 to 50 microns from the surface of the lead 270. Note that the dotted line 30 in FIG. 2 indicates the planned position for forming the outer wall when molding the ninth resin to cover the semiconductor element.
第４図は上述したリードフレーム２８を用いた樹脂封止
型半導体装置の構成図である。すなワチ、リードフレー
ム２８のダイスステージ２６に半導体素子３１を固着し
、この半導体素子３１の各端子と各リード２１．・・・
の接続部とをワイヤポンディングにより金線３２で接続
スる。その後、樹脂モールド用金型３Ｂ、３４をリード
フレーム２８をサンドウィッチするように配置して、樹
脂（たとえばエポキシ樹脂、シリコン樹脂など）３５を
金型３３，３４内に流入する。この場合、金型３ Ｂ
、’３４の平面度やリードフレーム２８の平坦度が従前
通りであっても、リード２７に突起状ビード２９が形成
されているため、その間隙を閉塞するような構造となり
、樹脂の流出がほとんどないように形成できる。このよ
うにして金型３３，３４内に樹脂３５を充満させる。そ
して、この樹脂３５が固化した後、金型３３．３４を取
り除き、外枠２１．２２および連結片２Ｂ、：１１４か
らリード２７を切断して分離することにより、樹脂封止
型半導体装置を構成する。FIG. 4 is a configuration diagram of a resin-sealed semiconductor device using the lead frame 28 described above. In other words, the semiconductor element 31 is fixed to the die stage 26 of the lead frame 28, and each terminal of the semiconductor element 31 and each lead 21. ...
The connecting portion is connected with a gold wire 32 by wire bonding. Thereafter, the resin molding molds 3B and 34 are arranged to sandwich the lead frame 28, and a resin (for example, epoxy resin, silicone resin, etc.) 35 is flowed into the molds 33 and 34. In this case, mold 3B
Even if the flatness of '34 and the flatness of the lead frame 28 are the same as before, since the protruding beads 29 are formed on the leads 27, the structure closes the gap, and almost no resin flows out. It can be formed so that it does not exist. In this way, the molds 33 and 34 are filled with the resin 35. After the resin 35 is solidified, the molds 33, 34 are removed, and the leads 27 are cut and separated from the outer frame 21, 22 and the connecting pieces 2B, :114, thereby constructing a resin-sealed semiconductor device. do.
以上詳述し念ようにこの発明によれば、リードの少なく
とも樹脂モールドの外壁形成予定部分近傍に突起状ビー
ドが形成されｊ’Ｌ９−ド２レームを用いることにより
、嘴脂毛−ルド時における樹脂の流れ出しを防止して樹
脂パリの発生を少なくｆ！！、もって樹脂パリ除去工程
を不要とするか簡易化するかなど、製造工程に顕著な効
果を得ることが可能となる樹脂封止型半導体装置を提供
できる。As described above in detail, according to the present invention, a protruding bead is formed at least in the vicinity of the portion where the outer wall of the resin mold is planned to be formed on the reed, and by using the j'L9-de 2 frame, it is possible to improve the Prevents the resin from flowing out and reduces the occurrence of resin flakes f! ! Therefore, it is possible to provide a resin-sealed semiconductor device that can achieve remarkable effects on the manufacturing process, such as eliminating or simplifying the resin patter removal process.
第１図は従来の樹脂封止型半導体装置を説明する丸めの
構造断面図、第２図ないし第４図はこの発明の一実施例
を説明す゛る走めのもので。
第２図はリードフレームの平面図、第３図（Ａ） （ｂ
）はリードＫｔｌ！８起状ビードを形成し九部柊を拡大
して示す断面図、第４図は第２図のリードフレームを用
いた樹脂封止型半導体装置の構造断面図である。
２６・・・ダイスステージ、２１・・・リート０．２８
・・・リードフレーム、２９・・・突起状ビー）”、３
１・・・半導体素子、３５・・・樹脂。FIG. 1 is a rounded structural sectional view illustrating a conventional resin-sealed semiconductor device, and FIGS. 2 to 4 are schematic views illustrating an embodiment of the present invention. Figure 2 is a plan view of the lead frame, Figure 3 (A) (b
) is the lead Ktl! FIG. 4 is a cross-sectional view showing the structure of a resin-sealed semiconductor device using the lead frame of FIG. 2. FIG. 26...Dice stage, 21...Leat 0.28
...Lead frame, 29...Protruding bee)", 3
1... Semiconductor element, 35... Resin.
Claims (1)
近傍に突起状ビードが設けられた９−ドツレームと、こ
のリード２レームに取着され九半導体素子と、この半導
体素子を被覆するように設けられた樹脂とを具備してな
ることを特徴上する樹脂封止型半導体装置。A 9-dot frame in which a protruding bead is provided at least near the outside of the resin mold 11 of the lead, a 9-dot frame attached to the lead 2 frame, a 9-dot frame, and a resin provided to cover the semiconductor element. A resin-sealed semiconductor device comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15335581A JPS5854659A (en) | 1981-09-28 | 1981-09-28 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15335581A JPS5854659A (en) | 1981-09-28 | 1981-09-28 | Resin-sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5854659A true JPS5854659A (en) | 1983-03-31 |
Family
ID=15560645
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15335581A Pending JPS5854659A (en) | 1981-09-28 | 1981-09-28 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5854659A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01123447A (en) * | 1987-11-07 | 1989-05-16 | Sanken Electric Co Ltd | Manufacture of resin sealed electronic part |
| US4862586A (en) * | 1985-02-28 | 1989-09-05 | Michio Osada | Lead frame for enclosing semiconductor chips with resin |
| US6100598A (en) * | 1997-03-06 | 2000-08-08 | Nippon Steel Semiconductor Corporation | Sealed semiconductor device with positional deviation between upper and lower molds |
| EP1079427A2 (en) | 1999-08-20 | 2001-02-28 | Rohm Co., Ltd. | Encapsulated electronic part and method of fabricating thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50120775A (en) * | 1974-03-08 | 1975-09-22 | ||
| JPS5731843B2 (en) * | 1974-06-13 | 1982-07-07 |
-
1981
- 1981-09-28 JP JP15335581A patent/JPS5854659A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50120775A (en) * | 1974-03-08 | 1975-09-22 | ||
| JPS5731843B2 (en) * | 1974-06-13 | 1982-07-07 |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4862586A (en) * | 1985-02-28 | 1989-09-05 | Michio Osada | Lead frame for enclosing semiconductor chips with resin |
| JPH01123447A (en) * | 1987-11-07 | 1989-05-16 | Sanken Electric Co Ltd | Manufacture of resin sealed electronic part |
| US6100598A (en) * | 1997-03-06 | 2000-08-08 | Nippon Steel Semiconductor Corporation | Sealed semiconductor device with positional deviation between upper and lower molds |
| EP1079427A2 (en) | 1999-08-20 | 2001-02-28 | Rohm Co., Ltd. | Encapsulated electronic part and method of fabricating thereof |
| EP1079427A3 (en) * | 1999-08-20 | 2001-06-27 | Rohm Co., Ltd. | Encapsulated electronic part and method of fabricating thereof |
| US6410980B1 (en) | 1999-08-20 | 2002-06-25 | Rohm Co., Ltd. | Electronic part with groove in lead |
| US6599773B2 (en) | 1999-08-20 | 2003-07-29 | Rohm Co., Ltd. | Electronic part and method of fabricating thereof |
| KR100700256B1 (en) * | 1999-08-20 | 2007-03-26 | 로무 가부시키가이샤 | Electronic part and method of fabricating thereof |
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