JPS5834063B2 - Monitoring method for digital communication equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an encoding/decoding device (hereinafter referred to as "codec") provided in a digital communication device.

).

In particular, it is useful for monitoring the codecs of digital terminal equipment equipped with individual codecs for each analog line, and digital terminal equipment (time-division concentrator multiplexing equipment) that concentrates a large number of analog signal lines in a time-division manner. Regarding suitable monitoring methods.

Conventional digital terminal equipment generally performs encoding and decoding of signals of all channels by using one codec in common in a time-division manner.

Therefore, codec monitoring can be easily carried out by sending a pilot signal to a terminal station installed opposite to this terminal station using that channel when there is no call on a specific channel. can.

However, a codec (hereinafter referred to as a "single channel codec") is provided individually for each analog line.

) has come to be used, and in such digital terminal equipment, according to the conventional codec monitoring method, it is necessary to send a pilot signal to each channel and monitor all single channel codecs. The configuration of the station equipment becomes complicated and expensive.

In addition, in a time-division concentrator multiplexing device configured using a single-channel codec, a large number of analog signal lines are time-divisionally concentrator-multiplexed into highways with a smaller number of channel time slots. Equation % The present invention provides a monitoring method that can monitor all single channel codecs with a simple device configuration in digital terminal equipment and time division concentrator multiplexing equipment using such single channel codecs. With the goal.

In the method of the present invention, channel time slots that are not always used as voice channels on the input/output highway, for example, 2
A channel time slot used for transmitting and receiving frame pulses in the M-system terminal equipment, a channel time slot used for transmitting and receiving control information between devices, or a channel time slot in a non-call state is assigned as a channel time slot for codec monitoring.

Furthermore, the signal encoded by the monitored single channel codec becomes the signal on the monitoring channel time slot on the output highway, and the signal on the monitoring channel time slot on the input highway is decoded by the monitored single channel codec. The present invention is characterized in that a monitoring loop is provided for the single channel codec to monitor the single channel codec by controlling the monitoring channel time slot signal so that it becomes a signal, and by controlling the signal of the monitoring channel time slot to be looped back within the device.

That is, the present invention provides a single channel coach for testing, connects the PCM output terminal of the encoder of the codec to the input highway, and connects the PCM input terminal of the decoder to the output highway, thereby connecting the encoder of the single channel codec to be monitored and the test. A channel pulse is given to the decoder of a single-channel codec for the same channel time slot.

Also, a channel pulse is given to the decoder of the monitored single-channel codec and the encoder of the test single-channel codec in the same channel time slot.

This establishes a bidirectional signal path between the monitored single channel codec and the testing single channel codec.

Furthermore, by controlling the analog switch installed at the analog signal input/output of each single channel codec, the test circuit installed at the analog input/output of the single channel codec for testing above is connected to the single channel codec to be monitored. and is controlled to establish a monitoring loop between each monitored single channel codec and the test circuit.

A detailed explanation will be given below using the drawings of the embodiment.

The figure is a configuration diagram of a time division multiplexing apparatus according to an embodiment of the present invention.

1□ to 1n indicate analog signal lines, and each line is connected to analog switches 5 and 5n, respectively.

The analog switch control circuit 3 is controlled by the signal from the control signal input terminal 2, and based on this, the analog switches 51 to 51 are controlled through the analog switch control lines 41 to 4n.
The corresponding one of 5n is switched.

6I, a(b) to 6n, a(b) are codecs that output coded digit strings in bursts in the channel time slots corresponding to the channel pulses on the output highway according to externally specified channel pulses. 8-bit encoded PCM which has the function of inputting a burst encoded digit string sent to a designated channel time slot on the input highway by applying a channel pulse corresponding to that channel time slot. It is a single channel codec.

Single channel codec control circuits 8a and 8b are circuits that send channel pulses to the encoder and decoder of the single channel codec, respectively.

The time slot memory 9a stores two time slots corresponding to each of the 24 phase channel time slots on the frame of the output highway.
4 memory addresses, and in each memory address is written an address specifying a single channel codec connected to an analog signal line to be multiplexed in a channel time slot on a frame corresponding to that memory address.

Similarly, in the memory address of the time slot memo IJ9b, an address is written that specifies a single channel codec that is to decode a signal sent to the channel time slot on the frame corresponding to the memory address.

Each address is read out sequentially at the period of the channel pulse and decoded by the decoder 10 to provide the corresponding single channel codec with a channel pulse specifying the transmission or reception time slot of the encoded digit string.

Therefore, by rewriting the phase holding memories 9a and 9b, the signal of any analog signal line can be changed to the signal of any channel on the highway, and conversely, the signal of any channel on the highway can be changed to the signal of any analog line. can be converted.

Encoder 61,a for each single channel codec
(i-1 to n) PCM output terminals are output highway 13
Furthermore, the PCM input terminals of the decoders 5i and 5b are connected to the human power highway 14.

The branching/inserting circuit 20 branches and inserts frame pulses, line concentration control information signals, etc. on the input/output highway.

A single channel codec for testing is provided, the PCM output terminal of the codec's encoder 28a is connected to the human power highway 14, and the PCM input terminal of the decoder 28b is connected to the output highway 13.

Channel pulses given to the encoder 28a1 and the decoder 28b are sent out from control circuits 29b and 29a, respectively.

This device is also provided with a codec test circuit 23, which sends a test signal (such as a sine wave) from a test signal transmitter 24, and measures S/NQ, etc., using a known method in a test signal receiver 25. .

The analog switch 30 connects the test signal transmitter 24, test encoder 28a1, analog switch 5, and test signal receiver to the test signal transmitter 24, analog switch 5, test decoder 28b, and test signal receiver. Make the switch.

The hybrids 31□ to 31n perform two-line and four-line conversion.

Next, the monitoring operation of the single channel codec of the device configured as described above will be explained.

The encoders 6i and a of the monitored single channel codec (decoder 5
i, b) and the decoder 28b (encoder 28a) of the test single-channel codec, so as to give a corresponding channel pulse to the monitoring time slot of the output highway 13 (human power highway 14).
Time slot memo') Rewriting 9a and 9b, and testing single channel codec decoder system circuit 29a (encoder control circuit 29b)
).

Further, the test signal transmitter 24 is connected to the encoder 5i, a of the single channel codec to be monitored (the encoder 28a of the single channel codec for testing),
Further, the test signal receiving section 25 is connected to the decoder 28b of the single channel codec for testing (the decoders 5i, b of the single channel codec to be monitored).
Analog switches 5i and 30 are switched to set a test signal loop.

A sine wave is sent to this loop from the test signal transmitting section 24, and the S/NQ is measured at the test signal receiving section 25.

By sequentially performing the above operations on single channel codecs that are not in use, it becomes possible to monitor all single channel codecs.

In FIG. 1, there is also a method of placing the analog switch 51 in the four-line section between the hybrid 31i and the single channel codec 61, and placing the hybrid between the analog switches 51-n and the analog switch 30.

The above description has focused on the monitoring method of a single channel codec in a time division concentrator multiplexer.

In general digital terminal equipment, the time slot memory shown in the figure is not required, and each single channel codec is configured to always receive a channel pulse corresponding to a specific channel time slot on the highway.

Therefore, the test signal loop for the single-channel codec to be monitored is configured to provide a channel pulse to the encoder or decoder of the single-channel codec under test in the same channel time slot as the channel pulse provided to the single-channel codec. This can be done by controlling the test encoder control circuit and the test decoder control circuit, and further by switching an analog switch in the same manner as described above.

Monitoring of single channel codec in general digital terminal equipment with time type zero memo9 function is as follows:
This is the same as in the case of the time division line concentrator multiplexer.

Note that this monitoring method uses a single-channel codec for testing, so monitoring is possible even when the input and output highways are in an asynchronous state.

In the above configuration, the test circuit is connected to the analog side of the codec, but if the test circuit is configured as a digital configuration,
It should be noted that it is also possible to create a test loop as described above and monitor it from the digital side of the codec.

As explained above, according to the present invention, a monitoring loop is set for each monitored single channel codec using the monitoring channel time slot of the input/output highway, so that it does not affect normal calls. It is possible to monitor all single channel codecs without having to

In addition, in the digital terminal equipment or time-division concentrator multiplexing equipment that has the above-mentioned time slot memory, rewriting the time slot memory and controlling the test single channel codec control circuit (not necessary if the monitoring time slot is always fixed) All single-channel codecs can be monitored by switching the analog switch.

Furthermore, in the digital terminal device without the time slot memory, all single channel codecs can be monitored by controlling the test single channel codec control circuit and switching the analog switch.

When the method of the present invention is used in conjunction with a known subscriber line test when a fault occurs in a subscriber section, it is even more effective, such as enabling accurate fault isolation.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a time division multiplexing device showing an embodiment of a single channel codec monitoring method according to the present invention. 1□~1n...Analog signal line, 2...
...Control signal input terminal, 3...Analog switch system circuit, 4, ~4n...Analog switch control line, 51-5n...Analog switch, 6 , ~6n... Single channel codec, (5i, a... Encoder, 5i, b...
...Decoder), 7a, 7b...Control signal input terminal, 8a, 8b...Single channel codec control circuit, 9at9b...Time slot memory, 10... ...Decoder, 11, ~
11n...Single channel codec control line, 13...Output highway, 14...
Input highway, 18... insertion signal input terminal,
19... Branch signal output terminal, 20...
Branch/insertion circuit, 21...highway output terminal,
22...Highway input terminal, 23...
- Codec test circuit, 24...Test signal transmitter, 25...Test signal receiver, 26...
・Test signal output line, 27...Test signal power line,
28a...Test encoder, 28b...
...Test decoder, 29a...Test decoder control circuit, 29b...Test encoder control circuit, 30...Analog switch, 3
1, ~31n... Two-line four-line hybrid.

Claims (1)

[Claims] 1. An encoder that encodes an analog input signal and outputs the encoded digit string in a burst to a designated channel time slot of an output highway, and a burst encoder that is sent to a designated channel time slot of an input highway. In a method for monitoring the encoding/decoding apparatus of a digital communication device, the encoding/decoding apparatus including a decoder for converting a digit string into an analog signal, which is individually provided for a plurality of analog input signal lines. , a test encoding/decoding device in which the encoder output is connected to the input highway and the decoder input is connected to the output highway, a test analog switch connected to the analog input/output of this device, and a test analog switch coupled to the above switch. An analog switch connected to the analog input/output of each encoding/decoding device, and a test circuit coupled to the testing analog switch, the encoder of the monitored encoding/decoding device and the testing encoding/decoding device By applying channel pulses of the same channel time slot to the decoder of the device and applying channel pulses of the same channel time slot to the decoder of the monitored encoding/decoding device and the encoder of the test encoding/decoding device. A bidirectional signal path is set up between the monitoring encoding/decoding device and the testing encoding/decoding device, and the signal path is connected via the input analog switch of the monitored encoding/decoding device and the testing analog switch. A monitoring method for a digital communication device, characterized in that control is performed to set a monitoring loop between the monitored encoding/decoding device and the test circuit.