JPS582495B2 - Single channel codec monitoring method in time-division concentrator multiplexer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention uses a single channel codec installed for each signal to process a large number of analog signals such as audio signals.
The present invention relates to a method for monitoring the single channel codec in a time division concentrator multiplexing device that encodes CM, concentrates the encoded signals, and multiplexes them into a highway signal.

Conventionally, codecs used in multiple conversion devices such as PCM24B were monitored because the codec encoded and decoded all channels in a time-division manner.
I was able to do this by using the channel's idle time.

In this multiplex converter, there is a one-to-one correspondence between each analog line and the channel time slots of the time-division multiplexed code string, and the number is the same.

On the other hand, it has been proposed to provide a codec for each analog line, that is, use a single channel codec, and to time-divisionally concentrate a large number of analog lines onto a highway with a smaller number of channel time slots.

In such a time division concentrator multiplex converter using a single channel codec, each single channel codec must be monitored individually, and the method for monitoring the codec of a multiplex converter that commonly uses the above-mentioned conventional codec is required. cannot be used.

The present invention provides a monitoring system that can easily monitor all single channel codecs in a time division concentrator multiplexing converter using such single channel codecs, and will be described in detail below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention, in which 11 to 1n indicate analog signal lines, 1la to 1na are input terminals thereof,
1lb to lnb are output terminals, and these are connected to relay circuits 5l to 5n, respectively.

The relay control circuit 3 is activated by the signal from the control signal input terminal 2.
are not controlled, and the corresponding ones of the relay circuits 51-5n are also controlled through the plow relay control lines 41-4n.

61 to 6n transmit coded digit strings in bursts to the channel time slots on the transmission frame corresponding to the channel pulses by externally specified channel pulses, and transmit them to the same channel time slots on the reception frames. A control signal from a control signal input terminal 7 is applied to a control circuit 8, which is an 8-bit encoded PCM single channel codec having a function of latching an incoming burst-like encoded digit string. Channel pulses corresponding to time slots for sending and receiving coded digit strings to the codecs 61 to 6n are provided, respectively.

The control contents are held in the phase holding memory 9, decoded by the decoder 10, and channel pulses are given to each codec through the single channel codec control units 11l to 11n.

The code output sides of the codecs 61 to 6n are connected to the output highway 13, and the code input sides are connected to the input highway 14.

The output highway 13 is connected to the add/drop circuit 20 through the inhibit gate 15, and the highway 13 is connected to one input side of the AND gate.

The branch/add circuit 20 has an input terminal 18 for inserting a signal into the transmission frame, a terminal 19 for outputting a branch signal from the reception frame, a highway output terminal 21, and a highway input terminal 22, and the highway input terminal 22 is connected to the input side highway through the OR gate 17. 14, and the output side of the gate 15 is connected to the output terminal 21.

The output side of gate 16 is connected to one input side of OR gate 17.

The gates 15 and 16 are controlled inversely by the output of the gate control circuit 12.

A single channel codec monitoring device 23 is provided,
The supervisory signal transmitter 24 is connected to the relay circuits 5l to 5n through a supervisory signal output line 26, and the supervisory signal receiver 25 is connected to the relay circuits 51 to 5n through a supervisory signal input line 27.
connected to n.

Each of the relay circuits 51 to 5n is replaced with an input terminal ta,
The supervisory signal output line 26 can be connected to the analog input side of the codec 6, and the supervisory signal input line 27 can be connected to the codec analog output side instead of the output terminal 1b.

Here, one frame consists of 24 channels, of which the first to 23rd channels are encoded analog signals, and the second
It is assumed that four channels are used for each transmission of control information for line concentration control.

The operation of each circuit will be explained below.

The phase holding memory 9 of the single channel codec control circuit 8 has 24 memory addresses corresponding to each of the 24 phase channel time slots on the frame, and each memory address contains the channel time on the frame corresponding to the memory address. An address designating a single channel codec connected to the input/output terminal of the analog signal to be multiplexed in the slot is written.

Each address is read out at the period of the channel pulse,
It is decoded by decoder 10 to specify the transmission and reception time slots of the encoded digit string for the corresponding single channel codec.

Therefore, by rewriting the phase holding memory 9, it becomes possible to multiplex signals from any analog signal line onto any channel on the highway frame.

At the gates 15 and 16, the signal of the 24th channel is separated from the frame of the output highway 13 by the pulse corresponding to the time slot of the 24th channel on the frame sent from the gate control circuit 12, and the signal of the 24th channel is separated from the frame of the output highway 13. The signal is sent to the add/drop circuit 20, and the signal of the 24th channel is sent to the gate 17.

The gate 17 receives the 24th signal sent from the add/drop circuit 20.
The 24th channel signal sent from the gate 16 is inserted into the frame from which the channel signal has been removed, and is sent to the input highway 14.

As a result, the second
The signals of the 4 channels are looped back to the time slot of the 24th channel of the input highway 14.

In the add/drop circuit 20, the second
Four channel signals are separated and sent to the branch signal output terminal 19.

On the other hand, the signal sent from the insertion signal input terminal 18 is inserted into the time slot of the 24th channel of the transmission frame in the same circuit 20 and sent to the terminal 21.
Control signals are transmitted and received through 9 for line concentration operation.

The relay control circuit 3 of the monitored single channel codec 6i (i is one of 1 to n) that is confirmed to be in a non-call state is controlled by the signal sent from the control signal input terminal 2, and the single channel codec 6
1 is driven, and the codec 61 is disconnected from the analog signal input/output terminals 1ia and 1ib and connected to the codec monitoring device 23 via the test signal output line 26 and the test signal input line 27. Ru.

At the same time, a signal sent from the control information input terminal 7 causes the address corresponding to the single channel codec 61 to be written into the memory address of the phase holding memory 9 corresponding to the time slot of the 24th channel of the highway.

As a result, the single channel codec control circuit 8 and the gates 15, 16, and 17 operate as described above.
The test signal sent from the test signal output line 26, the relay circuit 51, the coder of the single channel codec 6i, the output side highway 13, the gate 16, 17, the input side highway 14, the decoder of the single channel codec 61, and the relay circuit 51 , and returns to the monitoring signal receiving section 25 via the test signal input line 27.

In this way, the designated single channel codec 61 that is not in use is monitored.

FIG. 2 shows a time chart showing the passage process of a test signal when the single channel codec 63 is monitored.

A is a signal on the relay control line 43 that controls the relay circuit 53, and after this signal rises, a channel pulse that controls the single channel codec 63 is generated at the 24th channel phase as shown in B, and this 24th channel pulse is generated as shown in B. The encoded digit string of the test signal is outputted from the single channel codec 63 as shown in C in the channel phase, and the encoded digit string of the output highway 13 becomes as shown in D.

The output gate control signal of the control circuit 12 is generated in the time slot of the 24th channel as shown in E, and the coded digit string sent from the gate 15 to the add/drop circuit 20 is the coded digit string of the test signal as shown in F. is removed.

The coded digit string sent from the add/drop circuit 20 to the gate 17 has the 24th channel time slot removed, as shown in G, and the coded digit string of the test signal from the gate 16 is inserted into it, and the coded digit string is sent to the input highway 14. The encoded digit string is as shown in H.

In the single channel codec 63, only the encoded digit string of the input test signal is decoded and received by the test signal receiving section as shown in (3).

By performing the above operations one after another on single channel codecs that are not in use, all single channel codecs in the time division concentrator multiplexer are monitored.

The monitoring method of the present invention requires that the frame, phase, and channel phase match between the output highway 13 and the input highway 14, or that the phase difference between them is fixed, and the input highway clock and output It goes without saying that the clock on the side highway must be synchronized.

In the embodiment, a monitoring loop is created by looping back the digit string of the 24th channel, but if the gate control circuit is controlled to loop back the digit string of an arbitrary empty channel time slot, monitoring can be performed using that channel time slot. It is also possible to create loops.

As explained above, according to the monitoring method of the present invention, all single-channel codecs can be monitored simply by rewriting the holding memory and switching the relay circuit, without affecting the signals of the 23 channels in use. can be monitored.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the codec monitoring system according to the present invention, and FIG. 2 is a time chart showing the operation of FIG. 1. 11-1n; Analog signal line, 2; Control signal input terminal, 3; Relay control circuit, 41-4n: Relay control line, 5
l~5n; Relay circuit as a switching circuit, 6l~6n;
Single channel codec, 7; control signal input terminal,
8; Single channel codec control circuit, 9; Phase holding memory, 10; Decoder, 11l to 11n; Single channel codec control line, 12; Gate control circuit, 1
3; Output side highway, 14; Input side highway, 15
．． 16, 17; Gate, 18; Insert signal input terminal, 19
Branch signal output terminal, 20; Branch/add circuit, 21; Highway output terminal, 22; Highway input terminal, 23; Codec monitoring device, 24; Test signal transmitter, 25; Test signal receiver, 26; Test signal output line , 27; test signal input line.

Claims (1)

[Claims] 1 A coder that has the function of encoding an analog input signal by applying a channel pulse from the outside and outputting the encoded digit string in a burst to the channel time slot corresponding to the channel pulse of the output highway; A single unit consisting of a decoder that has the function of inputting a burst coded digit string sent to a designated channel time slot by externally applying a channel pulse corresponding to that channel time slot, and converting it into an analog signal. Channel codecs are individually installed for each of a large number of analog input signal lines, and among these analog input signal lines, only for the single channel codec installed on the analog input signal line where a call is detected. By providing channel pulses for outputting the above coded digit string to the output highway and channel pulses for inputting the coded digit string of the input highway, a large number of analog input signal lines can be selected and the analog In a time division concentrator multiplexing device that multiplexes input signals onto a highway and conversely selects a large number of digit strings on the highway and converts them into analog signals, only the digit string of a specified channel time slot on the output highway is input. A gate circuit that loops back to the same channel time slot of the highway, a codec monitoring device having a test signal transmitting section and a test signal receiving section, and a codec monitoring device provided corresponding to each of the single channel codecs, and a codec input terminal and a decoder output of the codec. A switching circuit that can switch and connect the terminals from the input/output terminals of the corresponding analog lines to the test signal transmitting section and the test signal receiving section, and a switching control signal to the switching circuit connected to the monitored single channel codec. and means for providing the monitored single channel codec with a channel pulse corresponding to the designated channel time slot.