JPS58158521U - Amplifier protection circuit - Google Patents
Amplifier protection circuitInfo
- Publication number
- JPS58158521U JPS58158521U JP5389782U JP5389782U JPS58158521U JP S58158521 U JPS58158521 U JP S58158521U JP 5389782 U JP5389782 U JP 5389782U JP 5389782 U JP5389782 U JP 5389782U JP S58158521 U JPS58158521 U JP S58158521U
- Authority
- JP
- Japan
- Prior art keywords
- transistors
- protection circuit
- protection
- bases
- load end
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図７よ従来例を示す回路図、第２図は本考案の一実
施例を示す回路図、第３図はその動作説明 −に供する
線図である。
図中２．３． １０及び１３はトランジスタ、１１、
１２． １５． １６． １？、 ２４．及び２５は
抵抗、２６は差動増幅器である。FIG. 1 is a circuit diagram showing a conventional example, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a diagram for explaining its operation. 2.3 in the figure. 10 and 13 are transistors, 11,
12. 15. 16. 1? , 24. and 25 are resistors, and 26 is a differential amplifier.
Claims (1)
て負荷端に接続するプッシュプル増幅回路において、上
記各出力トランジスタの各エミッタ電圧を加算して得ら
れる電圧と上記負荷端の電圧との差電圧を増幅し、この
増幅して得られる電圧を第１及び第２のツ♀ナーダイオ
ードを介してそれぞれ第１及び第２の保護用トランジス
タのベースに加え、上記各保護用トランジスタのコレク
タをそれぞれ上記第１及び第２の出力トランジスタのベ
ースに接続し、エミッタを上記負荷端に接続したことを
特徴とする増幅器の保護回路。In a push-pull amplifier circuit in which first and second output transistors are connected to a load end via an emitter resistor, the difference voltage between the voltage obtained by adding the respective emitter voltages of the respective output transistors and the voltage at the load end. The voltage obtained by this amplification is applied to the bases of the first and second protection transistors through the first and second tuner diodes, respectively, and the collectors of the respective protection transistors are connected to the bases of the protection transistors. A protection circuit for an amplifier, characterized in that the circuit is connected to the bases of the first and second output transistors, and the emitter is connected to the load end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5389782U JPS58158521U (en) | 1982-04-14 | 1982-04-14 | Amplifier protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5389782U JPS58158521U (en) | 1982-04-14 | 1982-04-14 | Amplifier protection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58158521U true JPS58158521U (en) | 1983-10-22 |
| JPS6333367Y2 JPS6333367Y2 (en) | 1988-09-06 |
Family
ID=30064538
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5389782U Granted JPS58158521U (en) | 1982-04-14 | 1982-04-14 | Amplifier protection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58158521U (en) |
-
1982
- 1982-04-14 JP JP5389782U patent/JPS58158521U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6333367Y2 (en) | 1988-09-06 |
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