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JPS57166623A - Channel device - Google Patents

Channel device

Info

Publication number
JPS57166623A
JPS57166623A JP56049325A JP4932581A JPS57166623A JP S57166623 A JPS57166623 A JP S57166623A JP 56049325 A JP56049325 A JP 56049325A JP 4932581 A JP4932581 A JP 4932581A JP S57166623 A JPS57166623 A JP S57166623A
Authority
JP
Japan
Prior art keywords
signal
turned
channel
input
occurred
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56049325A
Other languages
Japanese (ja)
Other versions
JPS629946B2 (en
Inventor
Tetsuji Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56049325A priority Critical patent/JPS57166623A/en
Publication of JPS57166623A publication Critical patent/JPS57166623A/en
Publication of JPS629946B2 publication Critical patent/JPS629946B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To remarkably elevate availability of a system for sharing an input/ output controller, by inhibiting a signal between a CPU and an input device, in case when a fixed fault has occurred in a channel device. CONSTITUTION:In case when a fixed fault has occurred in a main control part 4, a channel control impossible signal 13 is turned on. Accordingly, when a reset instruction is issued and a channel detaching signal 9 is turned on, an AND gate 24 inhibits a reset signal 12, but an output 10 of an AND gate 23 is turned on, and FF6 is set to a significant state, and an interface detaching signal 11 is turned on. As a result, an AND gate 25, transmitting circuits 19, 20 and receiving circuits 21, 22 operate so as to inhibit all signals between a CPU1 and an input/output device 3, and a channel device 2 substantially disconnects logical coupling between the CPU1 and the input/output device 3. Accordingly, a system can be operated by detaching the channel device 2 in which a fixed fault has occurred, and switching to a bus connected to the other channel device.
JP56049325A 1981-04-03 1981-04-03 Channel device Granted JPS57166623A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56049325A JPS57166623A (en) 1981-04-03 1981-04-03 Channel device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56049325A JPS57166623A (en) 1981-04-03 1981-04-03 Channel device

Publications (2)

Publication Number Publication Date
JPS57166623A true JPS57166623A (en) 1982-10-14
JPS629946B2 JPS629946B2 (en) 1987-03-03

Family

ID=12827823

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56049325A Granted JPS57166623A (en) 1981-04-03 1981-04-03 Channel device

Country Status (1)

Country Link
JP (1) JPS57166623A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01163859A (en) * 1987-12-21 1989-06-28 Nec Corp Channel fault restoration controller

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5461431A (en) * 1977-10-25 1979-05-17 Fujitsu Ltd System diagnosis processing system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5461431A (en) * 1977-10-25 1979-05-17 Fujitsu Ltd System diagnosis processing system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01163859A (en) * 1987-12-21 1989-06-28 Nec Corp Channel fault restoration controller

Also Published As

Publication number Publication date
JPS629946B2 (en) 1987-03-03

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