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JPS57103358A - Manufacture of amorphous silicon mosfet - Google Patents

Manufacture of amorphous silicon mosfet

Info

Publication number
JPS57103358A
JPS57103358A JP17977480A JP17977480A JPS57103358A JP S57103358 A JPS57103358 A JP S57103358A JP 17977480 A JP17977480 A JP 17977480A JP 17977480 A JP17977480 A JP 17977480A JP S57103358 A JPS57103358 A JP S57103358A
Authority
JP
Japan
Prior art keywords
amorphous
si3n4
type
masking
ohmic contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17977480A
Other languages
Japanese (ja)
Inventor
Shinichiro Ishihara
Takashi Hirao
Koshiro Mori
Masatoshi Kitagawa
Masaharu Ono
Seiichi Nagata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP17977480A priority Critical patent/JPS57103358A/en
Publication of JPS57103358A publication Critical patent/JPS57103358A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To form an FET having good characteristics by the less steps of masking by laminating amorphous film ohmic contact amorphous film becoming an operation region on the substrate, selectively anodic-oxidizing the amorphous film to form a gate insulating film. CONSTITUTION:Amorphous Si (i-type a-Si) 41, N type a-Si 42 and Si3N4 43 using as operation regions are sequentially formed by glow discharge and laminated, for example, on a quartz substrate 40. Then, the Si3N4 43 on the channel region is then removed by photoetching, is then anodic-oxidized, for example, in aqueous HCl solution until it becomes i-type a-Si 41, thereby forming an SiO2 44. Then, the Si3N4 43 is removed, electrode and wiring metal 45 are deposited on the overall surface, a metallic layer 45 is photoetched to complete the FET structure. Thus, an amorphous SiFET having good ohmic contact and accurate dimension can be formed with only the two steps of masking.
JP17977480A 1980-12-18 1980-12-18 Manufacture of amorphous silicon mosfet Pending JPS57103358A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17977480A JPS57103358A (en) 1980-12-18 1980-12-18 Manufacture of amorphous silicon mosfet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17977480A JPS57103358A (en) 1980-12-18 1980-12-18 Manufacture of amorphous silicon mosfet

Publications (1)

Publication Number Publication Date
JPS57103358A true JPS57103358A (en) 1982-06-26

Family

ID=16071646

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17977480A Pending JPS57103358A (en) 1980-12-18 1980-12-18 Manufacture of amorphous silicon mosfet

Country Status (1)

Country Link
JP (1) JPS57103358A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59177967A (en) * 1983-03-28 1984-10-08 Komatsu Ltd Thin-film transistor and manufacture thereof
JPS61164267A (en) * 1985-01-17 1986-07-24 Nec Corp Manufacture of thin film transistor
JPH07273348A (en) * 1994-09-27 1995-10-20 Seiko Epson Corp Complementary thin film transistor circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5493966A (en) * 1978-01-07 1979-07-25 Toshiba Corp Production of 3-5 group compound semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5493966A (en) * 1978-01-07 1979-07-25 Toshiba Corp Production of 3-5 group compound semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59177967A (en) * 1983-03-28 1984-10-08 Komatsu Ltd Thin-film transistor and manufacture thereof
JPS61164267A (en) * 1985-01-17 1986-07-24 Nec Corp Manufacture of thin film transistor
JPH07273348A (en) * 1994-09-27 1995-10-20 Seiko Epson Corp Complementary thin film transistor circuit

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