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JPS5632723A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5632723A
JPS5632723A JP10895379A JP10895379A JPS5632723A JP S5632723 A JPS5632723 A JP S5632723A JP 10895379 A JP10895379 A JP 10895379A JP 10895379 A JP10895379 A JP 10895379A JP S5632723 A JPS5632723 A JP S5632723A
Authority
JP
Japan
Prior art keywords
electrode
sio2
insulating film
hole
eaves
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10895379A
Other languages
English (en)
Inventor
Kiyobumi Oota
Yasuo Nemoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10895379A priority Critical patent/JPS5632723A/ja
Publication of JPS5632723A publication Critical patent/JPS5632723A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
JP10895379A 1979-08-27 1979-08-27 Semiconductor device Pending JPS5632723A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10895379A JPS5632723A (en) 1979-08-27 1979-08-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10895379A JPS5632723A (en) 1979-08-27 1979-08-27 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5632723A true JPS5632723A (en) 1981-04-02

Family

ID=14497829

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10895379A Pending JPS5632723A (en) 1979-08-27 1979-08-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5632723A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5861653A (en) * 1995-05-11 1999-01-19 Nec Corporation Semiconductor device having gaseous isolating layer formed in inter-level insulating layer and process of fabrication thereof
US20140082936A1 (en) * 2010-05-07 2014-03-27 Seiko Epson Corporation Method of manufacturing a wiring substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5861653A (en) * 1995-05-11 1999-01-19 Nec Corporation Semiconductor device having gaseous isolating layer formed in inter-level insulating layer and process of fabrication thereof
US20140082936A1 (en) * 2010-05-07 2014-03-27 Seiko Epson Corporation Method of manufacturing a wiring substrate
US9437489B2 (en) * 2010-05-07 2016-09-06 Seiko Epson Corporation Method of manufacturing a wiring substrate

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