JPS5632723A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5632723A JPS5632723A JP10895379A JP10895379A JPS5632723A JP S5632723 A JPS5632723 A JP S5632723A JP 10895379 A JP10895379 A JP 10895379A JP 10895379 A JP10895379 A JP 10895379A JP S5632723 A JPS5632723 A JP S5632723A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- sio2
- insulating film
- hole
- eaves
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 6
- 229910052681 coesite Inorganic materials 0.000 abstract 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract 3
- 239000000377 silicon dioxide Substances 0.000 abstract 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract 3
- 229910052682 stishovite Inorganic materials 0.000 abstract 3
- 229910052905 tridymite Inorganic materials 0.000 abstract 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract 2
- 230000004888 barrier function Effects 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 230000003071 parasitic effect Effects 0.000 abstract 1
- 238000001259 photo etching Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
PURPOSE:To decrease a parasitic capacitance by forming eaves portion of an insulating film on the concave portion in a semiconductor substrate, filling the hole by an electrode, and forming a cavity under the eaves portion. CONSTITUTION:A GaAs active layer 2 is provided on a semi-insulating GaAs substrate 1, and the layer 2 is covered by SiO2 12. A hole 13 is provided in SiO2 12, and the layer 2 is etched, thereby a concave portion 11 having the eaves of SiO2 is formed. Then, Al is evaporated, photoetching is performed, thereby an electrode 10 is formed. If the width of the electrode 10 is shorter than the width of the gap 11, the effective length L of the electrode 10 is determined by the hole 13 of the insulating film 12, the cross-sectional area becomes large, and the gate resistance is decreased. Furthermore, since the electrode 10 contacts with a channel portion via the insulating film 12 and the gap 11, except the Schottky barrier portion; the parassitic capacitance becomes extremely small. Therefore, the Schottky barrier FET for the ultra high frequency characterized by low noises and a high gain can be obtained.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10895379A JPS5632723A (en) | 1979-08-27 | 1979-08-27 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10895379A JPS5632723A (en) | 1979-08-27 | 1979-08-27 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5632723A true JPS5632723A (en) | 1981-04-02 |
Family
ID=14497829
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10895379A Pending JPS5632723A (en) | 1979-08-27 | 1979-08-27 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5632723A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5861653A (en) * | 1995-05-11 | 1999-01-19 | Nec Corporation | Semiconductor device having gaseous isolating layer formed in inter-level insulating layer and process of fabrication thereof |
| US20140082936A1 (en) * | 2010-05-07 | 2014-03-27 | Seiko Epson Corporation | Method of manufacturing a wiring substrate |
-
1979
- 1979-08-27 JP JP10895379A patent/JPS5632723A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5861653A (en) * | 1995-05-11 | 1999-01-19 | Nec Corporation | Semiconductor device having gaseous isolating layer formed in inter-level insulating layer and process of fabrication thereof |
| US20140082936A1 (en) * | 2010-05-07 | 2014-03-27 | Seiko Epson Corporation | Method of manufacturing a wiring substrate |
| US9437489B2 (en) * | 2010-05-07 | 2016-09-06 | Seiko Epson Corporation | Method of manufacturing a wiring substrate |
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