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JPS56115555A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS56115555A
JPS56115555A JP1813980A JP1813980A JPS56115555A JP S56115555 A JPS56115555 A JP S56115555A JP 1813980 A JP1813980 A JP 1813980A JP 1813980 A JP1813980 A JP 1813980A JP S56115555 A JPS56115555 A JP S56115555A
Authority
JP
Japan
Prior art keywords
type
region
metal
forming
input circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1813980A
Other languages
Japanese (ja)
Other versions
JPS6223466B2 (en
Inventor
Yoshiyuki Nakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1813980A priority Critical patent/JPS56115555A/en
Publication of JPS56115555A publication Critical patent/JPS56115555A/en
Publication of JPS6223466B2 publication Critical patent/JPS6223466B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/617Combinations of vertical BJTs and only diodes

Landscapes

  • Element Separation (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the erroneous operation of the semiconductor integrated circuit device by forming an PNP transistor isolated at P-N junction on a P type substrate, connecting an SBD between B and C, and setting the minority carrier lifetime less than predetermined value in the substrate, thereby eliminating the parasitic effect of an input circuit. CONSTITUTION:An input circuit N<+> type buried layer 2 and an NPN transistor N<+> type buried layer 12 are formed on the P type substrate 1, N type epitaxial layers 3, 13 are grown, and isolated with P type isolating regions 8, 8', 8''. A P type base 16 and an N type emitter 15 are formed to complete the NPN transistor, and metal 9 forming the P type regions 4, 4' and SBD5, and metal 11 forming the N type region 6, and SBD7 are formed to complete the input circuit. The metal 9 is connected to the minimum potential, and the metal 11 is connected to the base 16. Gold is diffused from the back surface to set the minority carrier lifetime less than 10<-6>. Thus, the parasitic effect can be cancelled in the region 3-region 8'-region 13.
JP1813980A 1980-02-16 1980-02-16 Semiconductor integrated circuit device Granted JPS56115555A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1813980A JPS56115555A (en) 1980-02-16 1980-02-16 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1813980A JPS56115555A (en) 1980-02-16 1980-02-16 Semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS56115555A true JPS56115555A (en) 1981-09-10
JPS6223466B2 JPS6223466B2 (en) 1987-05-22

Family

ID=11963262

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1813980A Granted JPS56115555A (en) 1980-02-16 1980-02-16 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS56115555A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02102605U (en) * 1989-02-02 1990-08-15
JPH02224378A (en) * 1989-02-27 1990-09-06 Hamamatsu Photonics Kk Light emitting element

Also Published As

Publication number Publication date
JPS6223466B2 (en) 1987-05-22

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