JPS5585141A - Transistor circuit - Google Patents
Transistor circuitInfo
- Publication number
- JPS5585141A JPS5585141A JP6452479A JP6452479A JPS5585141A JP S5585141 A JPS5585141 A JP S5585141A JP 6452479 A JP6452479 A JP 6452479A JP 6452479 A JP6452479 A JP 6452479A JP S5585141 A JPS5585141 A JP S5585141A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- phi1
- level
- low level
- trigger
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356017—Bistable circuits using additional transistors in the input circuit
Landscapes
- Manipulation Of Pulses (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To amplify the small signal such as TTL level to MOS level and to obtain true and complement both signals, by using isolation gate type field effect transistor. CONSTITUTION:The flip flop symmetrical left and right is constituted with isolation gate type field effect transistors Q11, Q12, Q13, Q14. Further, when the timing signal phi1 is at low level, the output ai and ai' are both at low level, and when phi1 is at high level, either of the output ai or ai' is at high level. Transistors Q15, Q16 are for trigger and the input Ai, Ai' are fed to the respective gate. Q17, Q18 are inversion circuit for Ai' signal formation, and by taking the timing signal P1 as opposite phase to the signal phi1, the high level of Ai signal can produce the Ai' at high speed. R signal resets Ai and ai' to low level at the low level of signal phi1 to make easy for trigger by Ai at leading of the next signal phi1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6452479A JPS5585141A (en) | 1979-05-24 | 1979-05-24 | Transistor circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6452479A JPS5585141A (en) | 1979-05-24 | 1979-05-24 | Transistor circuit |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP49104176A Division JPS5856890B2 (en) | 1974-09-09 | 1974-09-09 | transistor warmer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5585141A true JPS5585141A (en) | 1980-06-26 |
| JPS6353734B2 JPS6353734B2 (en) | 1988-10-25 |
Family
ID=13260683
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6452479A Granted JPS5585141A (en) | 1979-05-24 | 1979-05-24 | Transistor circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5585141A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62245715A (en) * | 1986-04-17 | 1987-10-27 | Nec Corp | Level shift circuit |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4875133A (en) * | 1972-01-03 | 1973-10-09 | ||
| JPS5130447A (en) * | 1974-09-09 | 1976-03-15 | Nippon Electric Co |
-
1979
- 1979-05-24 JP JP6452479A patent/JPS5585141A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4875133A (en) * | 1972-01-03 | 1973-10-09 | ||
| JPS5130447A (en) * | 1974-09-09 | 1976-03-15 | Nippon Electric Co |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62245715A (en) * | 1986-04-17 | 1987-10-27 | Nec Corp | Level shift circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6353734B2 (en) | 1988-10-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| ES402652A1 (en) | Amplifier circuit | |
| CA1009708A (en) | Hysteresis circuits using insulated gate field effect transistors | |
| GB990137A (en) | Improvements in or relating to communications systems | |
| JPS5693431A (en) | Bootstrap output circuit | |
| JPS5585141A (en) | Transistor circuit | |
| GB1257490A (en) | ||
| BE605214A (en) | New derivatives of glucosamine and their preparation. | |
| GB1013396A (en) | Read out circuit | |
| OA00882A (en) | New derivatives of indan-dione-1,3 and methods of preparation thereof. | |
| JPS5484935A (en) | Address selection circuit | |
| JPS5629890A (en) | Differential circuit device | |
| JPS5233553A (en) | Offset compensatin circuit | |
| JPS52144954A (en) | Inverter circuit | |
| JPS5679513A (en) | Amplitude equalizer | |
| GB952528A (en) | Improvements in or relating to delay lines | |
| JPS53119658A (en) | Amplifier circuit of field effect transistor | |
| JPS53121560A (en) | Variable divider circuit | |
| JPS5726925A (en) | Pulse generating circuit | |
| JPS51113444A (en) | Excessive input prevention circuit in balance type difference amplifie r | |
| JPS536555A (en) | Differential amplifier circuit | |
| JPS55134535A (en) | Detecting-amplifying circuit | |
| GB1346861A (en) | Frequency detector | |
| JPS56147235A (en) | Carry signal generating circuit | |
| BE596152R (en) | New pyrimidine derivatives and processes for their preparation. | |
| JPS5268337A (en) | Decoder circuit |