JPS5528587A - Control circuit of memory device - Google Patents
Control circuit of memory deviceInfo
- Publication number
- JPS5528587A JPS5528587A JP10262978A JP10262978A JPS5528587A JP S5528587 A JPS5528587 A JP S5528587A JP 10262978 A JP10262978 A JP 10262978A JP 10262978 A JP10262978 A JP 10262978A JP S5528587 A JPS5528587 A JP S5528587A
- Authority
- JP
- Japan
- Prior art keywords
- memory device
- power source
- memory
- initial setting
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE: To secure the memory contents of the memory device at after immediately the end of the power source make by supplying the power source definition signal of the power source make time into the memory device in the form of such data as to avoid the error.
CONSTITUTION: The information given from processor 1 is stored in writing register 104, writing indication register 103 and writing address register 102 each. These information are then written by sending the memory device starting signal generated from initial setting control circuit 101 to both memory part control circuit 106 and memory circuit 107 within memory device 2. The test bit sent from test bit generation circuit 105 is also supplied to device 2. While at the power source make time, power source definition signal 1010 is received at circuit 101 to be given to registers 104, 103 and 102 respectively for initial setting.In such way, the initial setting is possible for the memory contents, thus omitting the initial setting of the memory device.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10262978A JPS5528587A (en) | 1978-08-22 | 1978-08-22 | Control circuit of memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10262978A JPS5528587A (en) | 1978-08-22 | 1978-08-22 | Control circuit of memory device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5528587A true JPS5528587A (en) | 1980-02-29 |
Family
ID=14332521
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10262978A Pending JPS5528587A (en) | 1978-08-22 | 1978-08-22 | Control circuit of memory device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5528587A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4443871A (en) * | 1982-01-11 | 1984-04-17 | Rca Corporation | Stylus lowering, lifting and cleaning apparatus |
-
1978
- 1978-08-22 JP JP10262978A patent/JPS5528587A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4443871A (en) * | 1982-01-11 | 1984-04-17 | Rca Corporation | Stylus lowering, lifting and cleaning apparatus |
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