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JPS5517219A - Pulse motor driving circuit - Google Patents

Pulse motor driving circuit

Info

Publication number
JPS5517219A
JPS5517219A JP8795978A JP8795978A JPS5517219A JP S5517219 A JPS5517219 A JP S5517219A JP 8795978 A JP8795978 A JP 8795978A JP 8795978 A JP8795978 A JP 8795978A JP S5517219 A JPS5517219 A JP S5517219A
Authority
JP
Japan
Prior art keywords
frequency
output
input
pulse motor
devided
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8795978A
Other languages
Japanese (ja)
Inventor
Yoshiaki Yoshinaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTN Corp
Original Assignee
NTN Toyo Bearing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NTN Toyo Bearing Co Ltd filed Critical NTN Toyo Bearing Co Ltd
Priority to JP8795978A priority Critical patent/JPS5517219A/en
Publication of JPS5517219A publication Critical patent/JPS5517219A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Stepping Motors (AREA)

Abstract

PURPOSE:To perform stable operation by generating continuous variable frequency with the use of crystal oscillator to control frequency fluctuation. CONSTITUTION:Frequency of highly accurate oscillation from a crystal oscillator 6 is devided at a frequency devider 7, and plural kinds of devided frequency are input into a multiplexer 8. A flip-flop 12 performs the input of slow-up-start signal into the set input and of slow-down-stop signal into the reset input respectively; its output goes into an up-down counter 14 through an AND gate 13. The up-down counter 14 switches and selects the adress of the multiplexer 8 by its up or down performed by the AND of the output of a time setting counter 11 and of the output of the flip-flop 12, thereby changing over the frequency that is output into a pulse motor.
JP8795978A 1978-07-18 1978-07-18 Pulse motor driving circuit Pending JPS5517219A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8795978A JPS5517219A (en) 1978-07-18 1978-07-18 Pulse motor driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8795978A JPS5517219A (en) 1978-07-18 1978-07-18 Pulse motor driving circuit

Publications (1)

Publication Number Publication Date
JPS5517219A true JPS5517219A (en) 1980-02-06

Family

ID=13929396

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8795978A Pending JPS5517219A (en) 1978-07-18 1978-07-18 Pulse motor driving circuit

Country Status (1)

Country Link
JP (1) JPS5517219A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60162500A (en) * 1984-02-02 1985-08-24 Canon Inc Driving device for motor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60162500A (en) * 1984-02-02 1985-08-24 Canon Inc Driving device for motor

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