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JPH1131717A - Semiconductor chip and display device equipped with the same - Google Patents

Semiconductor chip and display device equipped with the same

Info

Publication number
JPH1131717A
JPH1131717A JP20099397A JP20099397A JPH1131717A JP H1131717 A JPH1131717 A JP H1131717A JP 20099397 A JP20099397 A JP 20099397A JP 20099397 A JP20099397 A JP 20099397A JP H1131717 A JPH1131717 A JP H1131717A
Authority
JP
Japan
Prior art keywords
semiconductor chip
width direction
display panel
mounting area
bump electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20099397A
Other languages
Japanese (ja)
Other versions
JP3570165B2 (en
Inventor
Katsumi Watanabe
克己 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP20099397A priority Critical patent/JP3570165B2/en
Publication of JPH1131717A publication Critical patent/JPH1131717A/en
Application granted granted Critical
Publication of JP3570165B2 publication Critical patent/JP3570165B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits

Landscapes

  • Liquid Crystal (AREA)
  • Wire Bonding (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce the area of a frame part surrounding a display region when directly loading a semiconductor chip, constituted of an LSI chip for driving a display panel on the substrate of the display panel. SOLUTION: Plural input side terminals 5 are provided at the lower side, and plural output side terminals 6 are provided at the upper side of a width directional central part in a rectangular semiconductor chip mount area 4 on the upper face of a protruding part 2a which protrudes from an upper side transparent substrate 3 of a lower side transparent substrate 2 of a liquid crystal display panel 1. In this case, a rectangular semiconductor chip is constituted, so that plural input side bump electrode can be provided at the lower side, and plural output side bump electrodes can be provided at the upper side of the width directional central part on the lower face. As a result, an input side wiring 8 and an output side wiring 9 can be arranged in the semiconductor chip mount area 4, and protruding length L of the projecting part 2a can be reduced.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、矩形状の半導体
チップ及びそれを基板に直接搭載した表示装置に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a rectangular semiconductor chip and a display device having the semiconductor chip mounted directly on a substrate.

【0002】[0002]

【従来の技術】例えば液晶表示装置には、液晶表示パネ
ルを駆動するためのLSIチップ等からなる半導体チッ
プを液晶表示パネルのガラス等からなる透明基板に直接
搭載したものがある。図7は従来のこのような液晶表示
装置の一例の平面図を示し、図8はその液晶表示パネル
を示したものである。この液晶表示装置は、液晶表示パ
ネル1及び半導体チップ11を備えている。このうち液
晶表示パネル1は、ガラス等からなる2枚の透明基板
2、3間に液晶(図示せず)が封入されたものからなっ
ている。この場合、下側の透明基板2の図中での下辺は
上側の透明基板3の下辺から突出されている。この突出
部2aの上面の所定の箇所は、図8において一点鎖線で
示すように、矩形状の半導体チップ搭載エリア4となっ
ている。すなわち、半導体チップ11を下側の透明基板
2に直接搭載するCOG(chip on glass)実装方式が採
用されている。半導体チップ搭載エリア4内の幅方向下
端部には複数の入力側接続端子5が設けられ、幅方向上
端部及び長手方向両端部には複数の出力側接続端子6が
設けられている。下側の透明基板2の突出部2aの突出
端部上面で、半導体チップ搭載エリア4より基板両サイ
ド側へそれぞれ寄った位置には、複数の外部接続端子7
が設けられている。そして、突出部2aの上面において
半導体チップ搭載エリア4の外側における各所定の箇所
には、入力側接続端子5と外部接続端子7とを接続する
複数の入力側引き回し線8及び出力側接続端子6から延
びる複数の出力側引き回し線9(一部図示せず)が設け
られている。
2. Description of the Related Art For example, there is a liquid crystal display device in which a semiconductor chip such as an LSI chip for driving a liquid crystal display panel is directly mounted on a transparent substrate made of glass or the like of the liquid crystal display panel. FIG. 7 shows a plan view of an example of such a conventional liquid crystal display device, and FIG. 8 shows the liquid crystal display panel. This liquid crystal display device includes a liquid crystal display panel 1 and a semiconductor chip 11. The liquid crystal display panel 1 has a liquid crystal (not shown) sealed between two transparent substrates 2 and 3 made of glass or the like. In this case, the lower side of the lower transparent substrate 2 in the drawing protrudes from the lower side of the upper transparent substrate 3. A predetermined portion on the upper surface of the protruding portion 2a is a rectangular semiconductor chip mounting area 4 as shown by a dashed line in FIG. That is, a COG (chip on glass) mounting method in which the semiconductor chip 11 is directly mounted on the lower transparent substrate 2 is adopted. A plurality of input connection terminals 5 are provided at the lower end in the width direction in the semiconductor chip mounting area 4, and a plurality of output connection terminals 6 are provided at the upper end in the width direction and both ends in the longitudinal direction. On the upper surface of the protruding end of the protruding portion 2 a of the lower transparent substrate 2, a plurality of external connection terminals 7 are located at positions closer to both sides of the substrate than the semiconductor chip mounting area 4.
Is provided. A plurality of input-side lead wires 8 and output-side connection terminals 6 for connecting the input-side connection terminals 5 and the external connection terminals 7 are provided at predetermined positions on the upper surface of the protruding portion 2 a outside the semiconductor chip mounting area 4. A plurality of output-side lead-out lines 9 (partially not shown) are provided.

【0003】半導体チップ11は、一般的にスリムチッ
プと呼ばれるものからなり、図9に示すように、矩形状
の半導体チップ本体12の下面の幅方向下端部に複数の
入力側バンプ電極13が設けられ、幅方向上端部及び長
手方向両端部に複数の出力側バンプ電極14が設けられ
た構造となっている。そして、半導体チップ11の入力
側バンプ電極13及び出力側バンプ電極14が下側の透
明基板2の突出部2aの入力側接続端子5及び出力側接
続端子6に異方性導電接着剤21を介して接合されてい
ることにより、半導体チップ11は突出部2aの半導体
チップ搭載エリア4上に搭載されている。
The semiconductor chip 11 is generally called a slim chip. As shown in FIG. 9, a plurality of input-side bump electrodes 13 are provided at the lower end in the width direction of the lower surface of a rectangular semiconductor chip body 12. A plurality of output-side bump electrodes 14 are provided at the upper end in the width direction and both ends in the longitudinal direction. Then, the input-side bump electrode 13 and the output-side bump electrode 14 of the semiconductor chip 11 are connected to the input-side connection terminal 5 and the output-side connection terminal 6 of the protruding portion 2 a of the lower transparent substrate 2 via the anisotropic conductive adhesive 21. As a result, the semiconductor chip 11 is mounted on the semiconductor chip mounting area 4 of the protrusion 2a.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、従来の
このような液晶表示装置では、半導体チップ本体12の
下面の幅方向下端部に複数の入力側バンプ電極13を設
けているのに対応して、半導体チップ搭載エリア4内の
幅方向下端部に複数の入力側接続端子5を設け、また半
導体チップ本体12の下面の長手方向両端部に複数の出
力側バンプ電極14を設けているのに対応して、半導体
チップ搭載エリア4内の長手方向両端部に複数の出力側
接続端子6を設けているので、複数の入力側引き回し線
8をショートしないように引き回すには、半導体チップ
搭載エリア4の幅方向下端縁と突出部2aの突出端縁と
の間に複数の入力側引き回し線8を配置することとな
り、このため突出部2aの突出長Lが大きくなってしま
う。また、半導体チップ本体12の下面の幅方向上端部
に複数の出力側バンプ電極14を設けているのに対応し
て、半導体チップ搭載エリア4内の幅方向上端部に複数
の出力側接続端子6を設けているので、複数の出力側引
き回し線9の配置スペースを考慮すると、半導体チップ
搭載エリア4の幅方向上端縁と突出部2aの基端縁(上
側の透明基板3の下辺)との間にある程度のスペースを
必要とし、このためこれまた突出部2aの突出長Lが大
きくなってしまう。このように、突出部2aの突出長L
が大きくなるということは、表示領域を囲む周辺非表示
領域部分つまり所謂額縁部分の面積が大きくなることで
あり、液晶表示パネル1全体に対する表示領域の占める
割合が低下し、結果的に液晶表示パネル1が大型化して
しまうという問題があった。この発明の課題は、表示パ
ネルの額縁部分の面積を小さくすることである。
However, in such a conventional liquid crystal display device, a plurality of input-side bump electrodes 13 are provided at the lower end in the width direction of the lower surface of the semiconductor chip body 12, so that A plurality of input-side connection terminals 5 are provided at the lower end in the width direction in the semiconductor chip mounting area 4, and a plurality of output-side bump electrodes 14 are provided at both ends in the longitudinal direction of the lower surface of the semiconductor chip body 12. Since the plurality of output-side connection terminals 6 are provided at both ends in the longitudinal direction in the semiconductor chip mounting area 4, the width of the semiconductor chip mounting area 4 is required to route the plurality of input-side wiring lines 8 without causing a short circuit. A plurality of input-side routing lines 8 are arranged between the lower end edge in the direction and the protruding end edge of the protruding portion 2a, so that the protruding length L of the protruding portion 2a increases. Further, in response to the provision of the plurality of output-side bump electrodes 14 at the upper end in the width direction of the lower surface of the semiconductor chip body 12, the plurality of output-side connection terminals 6 are provided at the upper end in the width direction within the semiconductor chip mounting area 4. In consideration of the arrangement space of the plurality of output-side lead-out lines 9, the distance between the upper edge of the semiconductor chip mounting area 4 in the width direction and the base edge of the protrusion 2 a (the lower side of the upper transparent substrate 3) is considered. Requires a certain amount of space, which also increases the protruding length L of the protruding portion 2a. Thus, the protrusion length L of the protrusion 2a
Means that the area of the peripheral non-display area surrounding the display area, that is, the so-called frame area, increases, and the ratio of the display area to the entire liquid crystal display panel 1 decreases, and as a result, the liquid crystal display panel However, there is a problem that the size of the device 1 is increased. An object of the present invention is to reduce the area of a frame portion of a display panel.

【0005】[0005]

【課題を解決するための手段】請求項1記載の発明に係
る半導体チップは、矩形状の半導体チップ本体の所定の
面の少なくとも幅方向一端部を除く部分に複数のバンプ
電極を設けたものである。請求項4記載の発明に係る表
示装置は、矩形状の半導体チップ本体の所定の面の少な
くとも幅方向一端部を除く部分に複数のバンプ電極が設
けられた半導体チップを表示パネルの基板に直接搭載し
たものである。
According to a first aspect of the present invention, there is provided a semiconductor chip in which a plurality of bump electrodes are provided on a predetermined surface of a rectangular semiconductor chip body except at least one end in a width direction. is there. According to a fourth aspect of the present invention, in the display device, a semiconductor chip provided with a plurality of bump electrodes on a predetermined surface of a rectangular semiconductor chip body except at least one end in a width direction is directly mounted on a substrate of a display panel. It was done.

【0006】請求項1または4記載の発明によれば、矩
形状の半導体チップ本体の所定の面の少なくとも幅方向
一端部及び長手方向両端部(ただし、長手方向両端部の
少なくとも幅方向中央部を除く。)にバンプ電極を設け
ていないので、このバンプ電極を設けていない部分に対
応する表示パネルの半導体チップ搭載エリア内に引き回
し線を配置することができ、この結果表示領域を囲む額
縁部分の面積を小さくし、表示パネルの小型化を促進す
ることができる。
According to the first or fourth aspect of the present invention, at least one end in the width direction and both ends in the longitudinal direction of the predetermined surface of the rectangular semiconductor chip main body (provided that at least the center portion in the width direction of both ends in the longitudinal direction is removed). Since no bump electrode is provided, a wiring line can be arranged in the semiconductor chip mounting area of the display panel corresponding to a portion where the bump electrode is not provided, and as a result, a frame portion surrounding the display area can be formed. The area can be reduced and the size of the display panel can be reduced.

【0007】[0007]

【発明の実施の形態】図1はこの発明の第1実施形態に
おける液晶表示装置の平面図を示し、図2はその液晶表
示パネルの平面図を示し、図3はその半導体チップの平
面図を示したものである。これらの図において、図7〜
図9と同一名称部分には同一の符合を付し、その説明を
適宜省略する。まず、図3に示すように、半導体チップ
11は、矩形状の半導体チップ本体12の下面の幅方向
の少なくとも一端部を除く部分にバンプ電極13、14
が設けられている。ここで、半導体チップ本体12の幅
方向端部とは、幅方向端からバンプ電極1個分の幅だけ
入り込んだ領域をいう。本実施形態では、半導体チップ
本体12の下面の幅方向中央部の下方側に複数の入力側
バンプ電極13が設けられ、上方側に複数の出力側バン
プ電極14が設けられた構造となっている。
FIG. 1 is a plan view of a liquid crystal display device according to a first embodiment of the present invention, FIG. 2 is a plan view of the liquid crystal display panel, and FIG. 3 is a plan view of the semiconductor chip. It is shown. In these figures, FIGS.
The same parts as those in FIG. 9 are denoted by the same reference numerals, and description thereof will be omitted as appropriate. First, as shown in FIG. 3, the semiconductor chip 11 has bump electrodes 13, 14 on the lower surface of the rectangular semiconductor chip body 12 except at least one end in the width direction.
Is provided. Here, the width direction end portion of the semiconductor chip body 12 refers to a region in which the width of one bump electrode enters from the width direction end. The present embodiment has a structure in which a plurality of input-side bump electrodes 13 are provided below the widthwise central portion of the lower surface of the semiconductor chip body 12, and a plurality of output-side bump electrodes 14 are provided above. .

【0008】次に、図2に示すように、液晶表示パネル
1の下側の透明基板2の突出部2aの上面の矩形状の半
導体チップ搭載エリア4内の幅方向中央部の下方側には
複数の入力側接続端子5が設けられ、上方側には複数の
出力側接続端子6が設けられている。半導体チップ搭載
エリア4の長手方向両外側における突出部2aの突出端
部上面には複数の外部接続端子7が設けられている。そ
して、突出部2aの上面において半導体チップ搭載エリ
ア4の内外における各所定の箇所には、入力側接続端子
5と外部接続端子7とを接続する複数の入力側引き回し
線8及び出力側接続端子6から延びる複数の出力側引き
回し線9が設けられている。
[0010] Next, as shown in FIG. 2, the upper part of the protruding portion 2 a of the transparent substrate 2 below the liquid crystal display panel 1 is located below the center in the width direction in the rectangular semiconductor chip mounting area 4. A plurality of input side connection terminals 5 are provided, and a plurality of output side connection terminals 6 are provided on the upper side. A plurality of external connection terminals 7 are provided on the upper surface of the protruding end of the protruding portion 2 a on both outer sides in the longitudinal direction of the semiconductor chip mounting area 4. A plurality of input-side lead wires 8 and an output-side connection terminal 6 for connecting the input-side connection terminal 5 and the external connection terminal 7 are provided at predetermined positions inside and outside the semiconductor chip mounting area 4 on the upper surface of the protrusion 2a. Are provided.

【0009】すなわち、入力側接続端子5から延びる入
力側引き回し線8は、半導体チップ搭載エリア4内のほ
ぼ下半分において引き回された後、半導体チップ搭載エ
リア4の長手方向両端縁から半導体チップ搭載エリア4
外に引き回されて外部接続端子7に接続されている。一
方、出力側接続端子6から延びる出力側引き回し線9
は、半導体チップ搭載エリア4内のほぼ上半分において
引き回された後、半導体チップ搭載エリア4の長手方向
両端縁及び幅方向上端縁から半導体チップ搭載エリア4
外に引き回されている。
That is, the input-side lead-out line 8 extending from the input-side connection terminal 5 is routed in substantially the lower half of the semiconductor-chip mounting area 4 and then, from both ends in the longitudinal direction of the semiconductor-chip mounting area 4, to the semiconductor chip mounting area. Area 4
It is routed outside and connected to the external connection terminal 7. On the other hand, an output-side lead wire 9 extending from the output-side connection terminal 6
Is drawn around substantially the upper half of the semiconductor chip mounting area 4, and then from the semiconductor chip mounting area 4 to both ends in the longitudinal direction and the upper end in the width direction.
It is routed outside.

【0010】そして、図1に示すように、半導体チップ
11の入力側バンプ電極13及び出力側バンプ電極14
が下側の透明基板2の突出部2aの入力側接続端子5及
び出力側接続端子6に異方性導電接着剤21を介して接
合されていることにより、半導体チップ11は突出部2
aの半導体チップ搭載エリア4上に直接搭載つまりCO
G搭載されている。この場合、半導体チップ本体12の
下面の幅方向中央部に複数の入力側バンプ電極13と複
数の出力側バンプ電極14とを2列に設けているので、
異方性導電接着剤21の幅は半導体チップ11の幅より
も小さく、長さは半導体チップ11の長さよりも大きく
なっている。
As shown in FIG. 1, an input bump electrode 13 and an output bump electrode 14 of the semiconductor chip 11 are formed.
Are bonded to the input side connection terminals 5 and the output side connection terminals 6 of the protruding portion 2a of the lower transparent substrate 2 via the anisotropic conductive adhesive 21, so that the semiconductor chip 11
a directly mounted on the semiconductor chip mounting area 4, ie, CO
G is installed. In this case, the plurality of input-side bump electrodes 13 and the plurality of output-side bump electrodes 14 are provided in two rows at the center of the lower surface of the semiconductor chip body 12 in the width direction.
The width of the anisotropic conductive adhesive 21 is smaller than the width of the semiconductor chip 11, and the length is larger than the length of the semiconductor chip 11.

【0011】このように、この液晶表示装置では、半導
体チップ本体12の下面の幅方向中央部の下方側に複数
の入力側バンプ電極13を設けているのに対応して、半
導体チップ搭載エリア4内の幅方向中央部の下方側に複
数の入力側接続端子5を設け、半導体チップ搭載エリア
4内の幅方向下端部及び長手方向両端部(ただし、長手
方向両端部の幅方向中央部を除く。)に接続端子を設け
ていないので、半導体チップ搭載エリア4内のほぼ下半
分に入力側引き回し線8を配置することができる。すな
わち、上述したように、入力側接続端子5から延びる入
力側引き回し線8を、半導体チップ搭載エリア4内のほ
ぼ下半分において引き回した後、半導体チップ搭載エリ
ア4の長手方向両端縁から半導体チップ搭載エリア4外
に引き回して外部接続端子7に接続することができる。
この結果、半導体チップ搭載エリア4の幅方向下端縁と
突出部2aの突出端縁との間に入力側引き回し線8を配
置する必要はなく、この間の間隔を可及的に小さくする
ことができ、したがってその分だけ突出部2aの突出長
Lを小さくすることができ、ひいては額縁部分の面積を
小さくし、液晶表示パネル1の小型化を促進することが
できる。
As described above, in this liquid crystal display device, the semiconductor chip mounting area 4 corresponds to the provision of the plurality of input-side bump electrodes 13 below the center of the lower surface of the semiconductor chip body 12 in the width direction. A plurality of input-side connection terminals 5 are provided below the central portion in the width direction, and the lower end portion in the width direction and both ends in the longitudinal direction in the semiconductor chip mounting area 4 (excluding the central portions in the width direction at both ends in the longitudinal direction). .), No input terminal is provided, so that the input-side lead-out line 8 can be arranged substantially in the lower half of the semiconductor chip mounting area 4. That is, as described above, after the input-side lead wire 8 extending from the input-side connection terminal 5 is routed in substantially the lower half of the semiconductor chip mounting area 4, the semiconductor chip mounting line 4 is extended from both longitudinal edges of the semiconductor chip mounting area 4. It can be routed outside the area 4 and connected to the external connection terminal 7.
As a result, it is not necessary to arrange the input-side lead-out line 8 between the widthwise lower edge of the semiconductor chip mounting area 4 and the protruding edge of the protruding portion 2a, and the interval therebetween can be made as small as possible. Therefore, the protruding length L of the protruding portion 2a can be reduced by that much, and the area of the frame portion can be reduced, and the miniaturization of the liquid crystal display panel 1 can be promoted.

【0012】また、半導体チップ本体12の下面の幅方
向中央部の上方側に複数の出力側バンプ電極14を設け
ているのに対応して、半導体チップ搭載エリア4内の幅
方向中央部の上方側に複数の出力側接続端子6を設け、
半導体チップ搭載エリア4内の幅方向上端部及び長手方
向両端部(ただし、長手方向両端部の幅方向中央部を除
く。)に接続端子を設けていないので、半導体チップ搭
載エリア4内のほぼ上半分に出力側引き回し線9を配置
することができる。すなわち、上述したように、出力側
接続端子6から延びる出力側引き回し線9を、半導体チ
ップ搭載エリア4内のほぼ上半分において引き回した
後、半導体チップ搭載エリア4の長手方向両端縁及び幅
方向上端部から半導体チップ搭載エリア4外に引き回す
ことができる。この結果、複数の出力側引き回し線9の
配置スペースを考慮しても、半導体チップ搭載エリア4
の幅方向上端縁と突出部2aの基端縁(上側の透明基板
3の下辺)との間の間隔を可及的に小さくすることがで
き、したがってその分だけ突出部2aの突出長Lを小さ
くして額縁部分の面積を小さくすることができ、ひいて
はこれまた液晶表示パネル1の小型化を促進することが
できる。
In response to the provision of the plurality of output-side bump electrodes 14 above the widthwise central portion of the lower surface of the semiconductor chip main body 12, the upper portion of the semiconductor chip mounting area 4 above the widthwise central portion is provided. A plurality of output side connection terminals 6 on the side,
Since connection terminals are not provided at the upper end in the width direction and both ends in the longitudinal direction (except for the center portion in the width direction of both ends in the longitudinal direction) in the semiconductor chip mounting area 4, the upper end in the semiconductor chip mounting area 4 is almost completely disposed. An output-side lead wire 9 can be arranged in half. That is, as described above, after the output-side lead-out line 9 extending from the output-side connection terminal 6 is routed in substantially the upper half of the semiconductor chip mounting area 4, both ends in the longitudinal direction and the upper end in the width direction of the semiconductor chip mounting area 4 are set. Can be routed outside the semiconductor chip mounting area 4. As a result, the semiconductor chip mounting area 4 can be set even in consideration of the arrangement space of the plurality of output-side lead wires 9.
The distance between the upper edge of the projection 2a in the width direction and the base edge of the projection 2a (the lower side of the upper transparent substrate 3) can be made as small as possible, so that the projection length L of the projection 2a is reduced accordingly. The size of the frame portion can be reduced by reducing the size of the frame portion, and the size of the liquid crystal display panel 1 can be further reduced.

【0013】加えて、この液晶表示装置では、半導体チ
ップ本体12の下面の幅方向中央部にバンプ電極13、
14を設けているので、外部からのノイズの影響を比較
的受けにくいようにすることができる。また、半導体チ
ップ本体12の下面の幅方向中央部にバンプ電極13、
14を集中させて設けているので、バンプ電極13、1
4を金等の電解メッキによって形成するとき、金メッキ
の堆積にばらつきが生じにくいようにすることができ、
ひいてはバンプ電極13、14の高さにばらつきが生じ
にくいようにすることができる。また、半導体チップ1
1を半導体チップ搭載エリア4上に搭載(ボンディン
グ)するとき、図4に示すように、下側の透明基板2の
突出部2aの上面に異方性導電接着剤21を介して半導
体チップ11を載置し、次いで熱圧着ヘッド22にて熱
圧着することとなるが、半導体チップ本体12の下面の
幅方向中央部のみにバンプ電極13、14を設けている
ので、熱圧着ヘッド22の熱圧着面22aの平行度等が
多少悪くても、良好にボンディングすることができる。
さらに、異方性導電接着剤21の幅を半導体チップ11
の幅より小さくしても、バンプ電極13、14を接続端
子5、6に接続することができるので、異方性導電接着
剤21の使用量を少なくすることができる。
In addition, in this liquid crystal display device, a bump electrode 13 is provided at the center of the lower surface of the semiconductor chip body 12 in the width direction.
The provision of 14 makes it relatively less susceptible to external noise. In addition, a bump electrode 13 is provided at the center of the lower surface of the semiconductor chip body 12 in the width direction.
14, the bump electrodes 13, 1
When 4 is formed by electroplating of gold or the like, it is possible to make the deposition of gold plating less likely to vary,
As a result, it is possible to make it difficult for the height of the bump electrodes 13 and 14 to vary. In addition, the semiconductor chip 1
When the semiconductor chip 11 is mounted (bonded) on the semiconductor chip mounting area 4, the semiconductor chip 11 is mounted on the upper surface of the protruding portion 2 a of the lower transparent substrate 2 via the anisotropic conductive adhesive 21 as shown in FIG. The semiconductor chip main body 12 is placed and then subjected to thermocompression bonding. However, since the bump electrodes 13 and 14 are provided only at the center of the lower surface of the semiconductor chip body 12 in the width direction, the thermocompression bonding of the thermocompression head 22 is performed. Even if the parallelism of the surface 22a is somewhat poor, good bonding can be achieved.
Further, the width of the anisotropic conductive adhesive 21 is
Is smaller than the width, the bump electrodes 13 and 14 can be connected to the connection terminals 5 and 6, so that the amount of the anisotropic conductive adhesive 21 used can be reduced.

【0014】次に、図5はこの発明の第2実施形態にお
ける液晶表示装置の平面図を示したものである。この図
において、図1と同一名称部分には同一の符合を付し、
その説明を適宜省略する。この第2実施形態において上
記第1実施形態と異なる点は、半導体チップ11の入力
側バンプ電極13を半導体チップ本体12の下面の幅方
向下端部に設けるとともに、液晶表示パネル1の入力側
接続端子5を半導体チップ搭載エリア4内の幅方向下端
部に設けた点である。このようにしても、入力側接続端
子5から延びる入力側引き回し線8を、半導体チップ搭
載エリア4内のほぼ下半分において引き回した後、半導
体チップ搭載エリア4の長手方向両端縁から半導体チッ
プ搭載エリア4外に引き回して外部接続端子7に接続す
ることができる。したがって、この場合も、半導体チッ
プ搭載エリア4の幅方向下端縁と突出部2aの突出端縁
との間に入力側引き回し線8を配置する必要がなく、こ
の間の間隔を可及的に小さくすることができ、したがっ
てその分だけ突出部2aの突出長Lを小さくして額縁部
分を小さくすることができ、ひいては液晶表示パネル1
の小型化を促進することができる。
FIG. 5 is a plan view of a liquid crystal display device according to a second embodiment of the present invention. In this figure, the same parts as those in FIG.
The description is omitted as appropriate. The second embodiment differs from the first embodiment in that the input-side bump electrodes 13 of the semiconductor chip 11 are provided at the lower end in the width direction of the lower surface of the semiconductor chip body 12 and the input-side connection terminals of the liquid crystal display panel 1 are provided. 5 is provided at the lower end in the width direction in the semiconductor chip mounting area 4. Also in this case, after the input-side lead-out line 8 extending from the input-side connection terminal 5 is routed in substantially the lower half of the semiconductor chip mounting area 4, the semiconductor chip mounting area 4 is extended from both longitudinal edges of the semiconductor chip mounting area 4. 4 and can be connected to the external connection terminal 7 by being routed outside. Therefore, also in this case, it is not necessary to arrange the input-side lead-out line 8 between the widthwise lower edge of the semiconductor chip mounting area 4 and the protruding edge of the protruding portion 2a, and the interval therebetween is made as small as possible. Therefore, the projection length L of the protruding portion 2a can be reduced by that amount, and the frame portion can be reduced, and the liquid crystal display panel 1
Can be reduced in size.

【0015】なお、半導体チップ11のバンプ電極1
3、14の数が少ない場合には、図6に示す第3実施形
態のように、半導体チップ本体12の下面の幅方向中央
部にバンプ電極13、14を1列に配置するとともに、
半導体チップ搭載エリア4内の幅方向中央部に接続端子
5、6を1列に配置するようにしてもよい。この場合、
例えば半導体チップ本体12の下面の長手方向両側に入
力側バンプ電極13を配置し、中央部に出力側バンプ電
極14を配置するようにしてもよい。
The bump electrode 1 of the semiconductor chip 11
When the number of the electrodes 3 and 14 is small, as in the third embodiment shown in FIG. 6, the bump electrodes 13 and 14 are arranged in a line at the center of the lower surface of the semiconductor chip body 12 in the width direction.
The connection terminals 5 and 6 may be arranged in a line at the center in the width direction in the semiconductor chip mounting area 4. in this case,
For example, the input-side bump electrodes 13 may be arranged on both sides in the longitudinal direction of the lower surface of the semiconductor chip body 12, and the output-side bump electrodes 14 may be arranged at the center.

【0016】[0016]

【発明の効果】以上説明したように、請求項1または4
記載の発明によれば、矩形状の半導体チップ本体の所定
の面の少なくとも幅方向一端部及び長手方向両端部(た
だし、長手方向両端部の少なくとも幅方向中央部を除
く。)にバンプ電極を設けていないので、このバンプ電
極を設けていない部分に対応する表示パネルの半導体チ
ップ搭載エリア内に引き回し線を配置することができ、
この結果表示パネルの額縁部分を小さくして表示パネル
の小型化を促進することができる。また、請求項3また
は6記載の発明によれば、矩形状の半導体チップ本体の
所定の面の幅方向他端部及び長手方向両端部(ただし、
長手方向両端部の幅方向中央部を除く。)にバンプ電極
を設けていないので、このバンプ電極を設けていない部
分に対応する表示パネルの半導体チップ搭載エリア内に
引き回し線を配置することができ、この結果表示パネル
を小型化することができる。
As described above, according to the first or fourth aspect,
According to the invention described above, bump electrodes are provided on at least one end in the width direction and both ends in the longitudinal direction (excluding at least the center in the width direction of both ends in the longitudinal direction) on the predetermined surface of the rectangular semiconductor chip body. Therefore, a routing line can be arranged in the semiconductor chip mounting area of the display panel corresponding to the portion where the bump electrode is not provided,
As a result, the frame portion of the display panel can be made smaller and the size of the display panel can be reduced. According to the third or sixth aspect of the present invention, the other end in the width direction and both ends in the longitudinal direction of the predetermined surface of the rectangular semiconductor chip body (however,
Excluding the center in the width direction at both ends in the longitudinal direction. Since the bump electrodes are not provided in (1), the routing lines can be arranged in the semiconductor chip mounting area of the display panel corresponding to the portion where the bump electrodes are not provided, and as a result, the display panel can be downsized. .

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の第1実施形態における液晶表示装置
の平面図。
FIG. 1 is a plan view of a liquid crystal display device according to a first embodiment of the present invention.

【図2】図1に示す液晶表示パネルの平面図。FIG. 2 is a plan view of the liquid crystal display panel shown in FIG.

【図3】図1に示す半導体チップの平面図。FIG. 3 is a plan view of the semiconductor chip shown in FIG. 1;

【図4】図1に示す液晶表示装置において半導体チップ
を液晶表示パネル上に搭載する場合を説明するために示
す断面図。
4 is a cross-sectional view for explaining a case where a semiconductor chip is mounted on a liquid crystal display panel in the liquid crystal display device shown in FIG.

【図5】この発明の第2実施形態における液晶表示装置
の平面図。
FIG. 5 is a plan view of a liquid crystal display device according to a second embodiment of the present invention.

【図6】この発明の第3実施形態における液晶表示装置
の平面図。
FIG. 6 is a plan view of a liquid crystal display device according to a third embodiment of the present invention.

【図7】従来の液晶表示装置の一例の平面図。FIG. 7 is a plan view of an example of a conventional liquid crystal display device.

【図8】図7に示す液晶表示パネルの平面図。8 is a plan view of the liquid crystal display panel shown in FIG.

【図9】図7に示す半導体チップの平面図。FIG. 9 is a plan view of the semiconductor chip shown in FIG. 7;

【符号の説明】[Explanation of symbols]

1 液晶表示パネル 4 半導体チップ搭載エリア 5 入力側接続端子 6 出力側接続端子 7 外部接続端子 8 入力側引き回し線 9 出力側引き回し線 11 半導体チップ 12 半導体チップ本体 13 入力側バンプ電極 14 出力側バンプ電極 21 異方性導電接着剤 DESCRIPTION OF SYMBOLS 1 Liquid crystal display panel 4 Semiconductor chip mounting area 5 Input side connection terminal 6 Output side connection terminal 7 External connection terminal 8 Input side lead wire 9 Output side lead wire 11 Semiconductor chip 12 Semiconductor chip body 13 Input side bump electrode 14 Output side bump electrode 21 Anisotropic conductive adhesive

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 矩形状の半導体チップ本体の所定の面の
少なくとも幅方向一端部を除く部分に複数のバンプ電極
が設けられていることを特徴とする半導体チップ。
1. A semiconductor chip, wherein a plurality of bump electrodes are provided on at least a portion of a predetermined surface of a rectangular semiconductor chip body except one end in a width direction.
【請求項2】 請求項1記載の発明において、前記複数
のバンプ電極は前記半導体チップ本体の所定の面の幅方
向中央部に1列または2列に配置されていることを特徴
とする半導体チップ。
2. The semiconductor chip according to claim 1, wherein the plurality of bump electrodes are arranged in one or two rows at a central portion in a width direction of a predetermined surface of the semiconductor chip body. .
【請求項3】 請求項1記載の発明において、前記複数
のバンプ電極は前記半導体チップ本体の所定の面の幅方
向の所定の一端部と幅方向中央部とに設けられているこ
とを特徴とする半導体チップ。
3. The semiconductor device according to claim 1, wherein the plurality of bump electrodes are provided at a predetermined one end portion in a width direction of a predetermined surface of the semiconductor chip body and a center portion in the width direction. Semiconductor chip.
【請求項4】 矩形状の半導体チップ本体の所定の面の
少なくとも幅方向一端部を除く部分に複数のバンプ電極
が設けられた半導体チップを表示パネルの基板に直接搭
載してなることを特徴とする表示装置。
4. A semiconductor chip having a plurality of bump electrodes provided at least on a predetermined surface of a rectangular semiconductor chip main body except at least one end in the width direction is directly mounted on a substrate of a display panel. Display device.
【請求項5】 請求項4記載の発明において、前記複数
のバンプ電極は前記半導体チップ本体の所定の面の幅方
向中央部に1列または2列に配置されていることを特徴
とする表示装置。
5. The display device according to claim 4, wherein the plurality of bump electrodes are arranged in one or two rows at a central portion in a width direction of a predetermined surface of the semiconductor chip body. .
【請求項6】 請求項4記載の発明において、前記複数
のバンプ電極は前記半導体チップ本体の所定の面の幅方
向の所定の一端部と幅方向中央部とに設けられているこ
とを特徴とする表示装置。
6. The invention according to claim 4, wherein the plurality of bump electrodes are provided at a predetermined one end portion in a width direction of a predetermined surface of the semiconductor chip body and a center portion in the width direction. Display device.
JP20099397A 1997-07-11 1997-07-11 Display device Expired - Fee Related JP3570165B2 (en)

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Application Number Priority Date Filing Date Title
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JPH1131717A true JPH1131717A (en) 1999-02-02
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Application Number Title Priority Date Filing Date
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Country Link
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