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JPH11298040A - Semiconductor light-emitting element and manufacture thereof - Google Patents

Semiconductor light-emitting element and manufacture thereof

Info

Publication number
JPH11298040A
JPH11298040A JP9883998A JP9883998A JPH11298040A JP H11298040 A JPH11298040 A JP H11298040A JP 9883998 A JP9883998 A JP 9883998A JP 9883998 A JP9883998 A JP 9883998A JP H11298040 A JPH11298040 A JP H11298040A
Authority
JP
Japan
Prior art keywords
electrode
film
conductive film
layer
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9883998A
Other languages
Japanese (ja)
Inventor
Takeshi Kamikawa
剛 神川
Shigetoshi Ito
茂稔 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP9883998A priority Critical patent/JPH11298040A/en
Publication of JPH11298040A publication Critical patent/JPH11298040A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To reduce the sheet resistance, raise the thermal stability and raise the conductivity, even after a high temperature process by forming a higher melting point conductive film on a metal film to contact a nitride semiconductor than this metal and forming a dielectric film on the conductive film to form an ohmic electrode. SOLUTION: An n-electrode 112 is formed on a part of the exposed surface of an n-type GaN layer 103, a resist is coated to pattern it, an Ni or Pd metal film 109 is deposited on the part of a p-type GaN cap layer 108, a high melting point metal Mo conductive film 110 is formed thereon to form a p-electrode, an Au pad layer 111 is formed on a part of the p-electrode, an SiO2 dielectric film 113 is formed by sputtering, and the annealing is made in an inert gas at, e.g. 800 deg.C for 10 min to improve also the ohmic characteristic between a low resistance p-semiconductor of the p-layer of GaAs semiconductor and electrode.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は窒化物系半導体発光
素子に関し、特にその電極構造、および、その製造方法
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nitride semiconductor light emitting device, and more particularly, to an electrode structure thereof and a manufacturing method thereof.

【0002】[0002]

【従来の技術】従来の窒化ガリウム系化合物半導体発光
素子では、サファイア等の絶縁性基板が使用されてい
る。この絶縁性基板を用いた発光素子では、裏面側に電
極を設けた構造にすることが困難であり、半導体層側に
pn両電極を設けた構造がとられている。
2. Description of the Related Art In a conventional gallium nitride-based compound semiconductor light emitting device, an insulating substrate such as sapphire is used. In a light emitting element using this insulating substrate, it is difficult to provide a structure in which electrodes are provided on the back surface side, and a structure in which both pn electrodes are provided on the semiconductor layer side is employed.

【0003】図4は、従来技術に基づく発光ダイオード
(LED)の概略模式図である。201はサファイア基
板、202はn−GaN:Si、203は活性層、20
4はp−GaN:Mg、205はp−GaN上に形成さ
れたNi/Au透光性電極、206はRIBE(Rea
ctive ion beam etching)によ
ってエッチングされ露出したn−GaN上に形成された
n型電極、207はNi/Au透光性電極上に形成され
たボンディング用電極パッドであり、208はSiO2
誘電体膜である。ここで、Ni/Au透光性電極の構成
は、Niがp−GaN:Mgとの間で、オーム性接触を
得るために選択され、AuがNiの酸化を防止するため
に選択されている。しかし、Au電極の上に保護膜を付
けた構造の場合、この保護膜に含まれる酸素による酸化
は防ぐことができない。このような発光素子を台座に固
定するにあたって、半導体層側を下にする方法では、各
電極への通電に工夫が必要であり、生産性が悪くなるた
め、一般的には、半導体層側を上にする方法が用いられ
ている。よって、素子内部で生じた発光を有効に外部に
取り出せるように、p側オーム性電極が、上述の如く、
透光性となっている。
FIG. 4 is a schematic diagram of a light emitting diode (LED) based on the prior art. 201 is a sapphire substrate, 202 is n-GaN: Si, 203 is an active layer, 20
4 is p-GaN: Mg, 205 is a Ni / Au translucent electrode formed on p-GaN, and 206 is RIBE (Rea).
An n-type electrode formed on the exposed n-GaN by etching by active ion beam etching, 207 is a bonding electrode pad formed on the Ni / Au translucent electrode, and 208 is SiO 2
It is a dielectric film. Here, the configuration of the Ni / Au translucent electrode is selected to obtain an ohmic contact between Ni and p-GaN: Mg, and Au is selected to prevent oxidation of Ni. . However, in the case of a structure in which a protective film is provided on an Au electrode, oxidation by oxygen contained in the protective film cannot be prevented. In fixing such a light-emitting element to a base, in a method in which the semiconductor layer side is turned down, it is necessary to devise an energization to each electrode, and productivity is deteriorated. The above method is used. Therefore, as described above, the p-side ohmic electrode is provided so that light generated inside the device can be effectively extracted to the outside.
It is translucent.

【0004】[0004]

【発明が解決しようとする課題】このように、p側オー
ム性電極は、透光性という性質上50〜200Åという
非常に薄い膜厚で形成する必要があった。SiO2誘電
体膜208は、このような非常に薄い電極を、製造行程
等における損傷から保護するために形成されたものであ
る。本発明者の実験的知見によると、SiO2誘電体膜
を設けた従来の半導体素子においては、長期に渡る通電
等においてSiO2に起因して緩やかにNiの酸化が進
み電極部分が高抵抗化するといった問題があった。さら
には、製造工程において、誘電体膜を形成した後に、電
極と半導体との合金化アロイ等の熱処理プロセスを行っ
たときにも、電極部分が高抵抗化した。
As described above, the p-side ohmic electrode needs to be formed in a very thin film having a thickness of 50 to 200 ° because of its light transmitting property. The SiO 2 dielectric film 208 is formed to protect such an extremely thin electrode from damage during a manufacturing process or the like. According to the experimental findings of the present inventor, in a conventional semiconductor device provided with a SiO 2 dielectric film, Ni is gradually oxidized due to SiO 2 due to SiO 2 in a long-term energization or the like, and the electrode portion has a high resistance. There was a problem of doing. Further, in the manufacturing process, when a heat treatment process such as alloying of the electrode and the semiconductor was performed after the formation of the dielectric film, the resistance of the electrode portion was increased.

【0005】また、Si34等の組成に酸素を含まない
窒化膜に於いても膜形成時に含まれてしまう極微量の酸
素によってもこの透光性電極の酸化が引き起こされてし
まう事が分かった。この高抵抗化によって、シート抵抗
が高くなり、駆動電圧を低減することが困難になる。
Further, even in a nitride film containing no oxygen in the composition such as Si 3 N 4 , oxidation of the light-transmitting electrode may be caused by a trace amount of oxygen contained during film formation. Do you get it. Due to the increase in the resistance, the sheet resistance increases, and it becomes difficult to reduce the driving voltage.

【0006】本発明は以上の点に鑑み、透光性オーミッ
ク電極を備え、シート抵抗が小さく更に熱的安定性が高
く、高温プロセス後に於いても、高い導電性の発光素子
を提供することを目的とする。
In view of the above, the present invention provides a light emitting element having a translucent ohmic electrode, low sheet resistance, high thermal stability, and high conductivity even after a high temperature process. Aim.

【0007】[0007]

【課題を解決するための手段】本発明の半導体発光素子
は、窒化物系半導体に接するオーム性電極と、該オーム
性電極の少なくとも一部を覆う酸化物絶縁膜とを備えた
半導体発光素子において、該オーム性電極は、該窒化物
半導体に接触する金属膜と、該金属膜上に形成された、
この金属より高融点の導電膜とからなり、さらに該導電
膜上に誘電体膜が形成されていることを特徴とする。
According to the present invention, there is provided a semiconductor light emitting device comprising: an ohmic electrode in contact with a nitride-based semiconductor; and an oxide insulating film covering at least a part of the ohmic electrode. The ohmic electrode is formed on the metal film in contact with the nitride semiconductor, and
It is characterized by comprising a conductive film having a higher melting point than this metal, and further having a dielectric film formed on the conductive film.

【0008】また、前記金属膜がNiもしくはPdを含
んでなり、前記導電膜がPt、W、WN、V、Mo、T
aのいずれかを含んでなる事を特徴とする。
The metal film contains Ni or Pd, and the conductive film is made of Pt, W, WN, V, Mo, T
a.

【0009】本発明の半導体発光素子の製造方法は、p
型半導体窒化物半導体表面に、NiもしくはPdを含む
金属膜、Pt、W、WN、V、Mo、Taのいずれかを
含んでなる導電膜を順次形成する工程と、その後、該導
電膜上に、酸化物絶縁膜を形成する工程と、さらにその
後、400℃以上1000℃以下で熱処理する工程と
を、含むことを特徴とする。
The method for manufacturing a semiconductor light emitting device according to the present invention
Forming a metal film containing Ni or Pd and a conductive film containing any of Pt, W, WN, V, Mo, and Ta on the surface of the type semiconductor nitride semiconductor, and thereafter, on the conductive film, Forming an oxide insulating film; and thereafter, performing a heat treatment at 400 ° C. or more and 1000 ° C. or less.

【0010】[0010]

【発明の実施の形態】以下、本発明を具体的な実施の形
態に基づいて説明する。 (実施の形態1)図1は、本発明の実施の形態1の半導
体発光素子の構造概略図である。図において、101は
サファイア基板であり、その上面に102はGaNバッ
ファ層、103はn型のGaN層、104はn型Al
0.1Ga0.9N下部クラッド層、105はIn0.2Ga0.8
N活性層、106は薄層p型Al0.05Ga0.95N蒸発防
止層、107はp型Al0.1Ga0.9N上部クラッド層、
108はp型電極GaNキャップ層が順次積層されてい
る。また、109はGaNキャップ層108上の一部に
設けられたNiもしくはPdからなる金属膜、110は
金属膜109上に設けられたMo導電膜、111はMo
導電膜110上の一部に設けられたAu電極パッド、1
12は、n型GaN層の露出した表面の一部設けられた
n電極、113はSiO2誘電体膜である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below based on specific embodiments. Embodiment 1 FIG. 1 is a schematic structural view of a semiconductor light emitting device according to Embodiment 1 of the present invention. In the figure, 101 is a sapphire substrate, 102 is a GaN buffer layer, 103 is an n-type GaN layer, and 104 is an n-type Al
0.1 Ga 0.9 N lower cladding layer, 105 is In 0.2 Ga 0.8
N active layer, 106 is a thin p-type Al 0.05 Ga 0.95 N evaporation preventing layer, 107 is a p-type Al 0.1 Ga 0.9 N upper cladding layer,
Reference numeral 108 denotes a p-type electrode GaN cap layer sequentially laminated. Reference numeral 109 denotes a metal film made of Ni or Pd provided on a part of the GaN cap layer 108; 110, a Mo conductive film provided on the metal film 109;
Au electrode pad provided on a part of conductive film 110, 1
Reference numeral 12 denotes an n-electrode provided on a part of the exposed surface of the n-type GaN layer, and 113 denotes a SiO 2 dielectric film.

【0011】次に、このような半導体発光素子の製造方
法を説明する。先ずMOCVD装置を用いてH2雰囲気
中でサファイア基板101を1050℃で加熱し、基板
の表面処理を行う。その後、基板温度を500℃まで下
げ、GaNバッファ層102を形成する。この時バッフ
ァ層の層厚は250Åとする。その後基板温度を102
0℃まで上げてn型のGaN層103を4μm程度成長
させ、同じ温度でn型Al0.1Ga0.9N下部クラッド層
104を1μm成長させる。次に基板温度を800℃に
下げノンドープ又はSiドープIn0.2Ga0.8N活性層
105を約200Åの膜厚で成長させる。次に基板温度
をノンドープ又はSiドープIn0.2Ga0.8N活性層の
成長温度以上かつp型Al0.1Ga0.9N上部クラッド層
の成長温度以下である約900℃にてp型Al0.05Ga
0.95N蒸発防止層106を成長させる。その後成長温度
を約1020℃まで上げ、p型Al0.1Ga0.9N上部ク
ラッド層107を約1μm成長させる。次にp型GaN
キャップ層108を約1μm成長させる。この時p型A
0.05Ga0.95N蒸発防止層106は、基板温度を10
20℃まで上げる間に良質膜となる。
Next, a method for manufacturing such a semiconductor light emitting device will be described. First, the sapphire substrate 101 is heated at 1050 ° C. in an H 2 atmosphere using an MOCVD apparatus to perform a surface treatment of the substrate. After that, the substrate temperature is lowered to 500 ° C., and the GaN buffer layer 102 is formed. At this time, the thickness of the buffer layer is 250 °. Thereafter, the substrate temperature is set to 102
By raising the temperature to 0 ° C., the n-type GaN layer 103 is grown to about 4 μm, and the n-type Al 0.1 Ga 0.9 N lower cladding layer 104 is grown to 1 μm at the same temperature. Next, the substrate temperature is lowered to 800 ° C., and a non-doped or Si-doped In 0.2 Ga 0.8 N active layer 105 is grown to a thickness of about 200 °. Next, at a substrate temperature of about 900 ° C. which is equal to or higher than the growth temperature of the non-doped or Si-doped In 0.2 Ga 0.8 N active layer and equal to or lower than the growth temperature of the p-type Al 0.1 Ga 0.9 N upper cladding layer, the p-type Al 0.05 Ga
A 0.95 N evaporation prevention layer 106 is grown. Thereafter, the growth temperature is increased to about 1020 ° C., and the p-type Al 0.1 Ga 0.9 N upper cladding layer 107 is grown to about 1 μm. Next, p-type GaN
The cap layer 108 is grown to about 1 μm. At this time, p-type A
l 0.05 Ga 0.95 N evaporation preventing layer 106 has a substrate temperature of 10
A high quality film is formed during the heating up to 20 ° C.

【0012】その後、n型電極を形成するため、レジス
トを塗布してフォトリソグラフィによりパターニングを
行い、成長した半導体層の一部をドライエッチングによ
り除去してn型のGaN層103を露出させ、n型のG
aN層103の露出した表面の一部にn電極112を形
成する。次に、レジストを塗布してフォトリソグラフィ
によりパターニングを行い、p型GaNキャップ層10
8上の一部にNiもしくはPdからなる金属膜109を
30〜100Åの膜厚で蒸着し、更にその上に10〜3
00Åの厚さでMo導電膜110を形成し、p電極とし
た。またp電極を形成したときと同様の手順で、p電極
上の一部にAuパッド電極111を4000Åの厚さで
形成する。最後にスパッタリングによりSiO2誘電体
膜113を2000〜5000Åの厚さで形成する。そ
の後、窒素雰囲気中もしくはAr等の不活性ガス中で8
00℃で10分間アニール処理を行う。このアニール処
理は、窒化ガリウム系半導体のp型層の低抵抗p型半導
体と電極間のオーミック特性の向上を兼ねるものであ
る。ここで金属膜の材料として、p−GaNと良好なオ
ーミック接触が得られるPd、Niを用いた。
Thereafter, in order to form an n-type electrode, a resist is applied and patterning is performed by photolithography, and a part of the grown semiconductor layer is removed by dry etching to expose the n-type GaN layer 103. Type G
An n-electrode 112 is formed on a part of the exposed surface of the aN layer 103. Next, a resist is applied and patterned by photolithography to form a p-type GaN cap layer 10.
8, a metal film 109 made of Ni or Pd is deposited in a thickness of 30 to 100 [deg.]
A Mo conductive film 110 was formed to a thickness of 00 ° to form a p-electrode. In the same procedure as when the p-electrode is formed, an Au pad electrode 111 is formed on a part of the p-electrode with a thickness of 4000 °. Finally, a SiO 2 dielectric film 113 is formed to a thickness of 2000 to 5000 ° by sputtering. Then, in an atmosphere of nitrogen or an inert gas such as Ar
Annealing is performed at 00 ° C. for 10 minutes. This annealing treatment also serves to improve ohmic characteristics between the low-resistance p-type semiconductor of the gallium nitride-based semiconductor p-type layer and the electrode. Here, as the material of the metal film, Pd and Ni capable of obtaining good ohmic contact with p-GaN were used.

【0013】本実施の形態の半導体発光素子において
は、長期に渡って通電しても、従来のものと比較して、
安定した特性が得られた。図2を参照してこのことを説
明する。図2は金属膜上の導電膜をAu、Ni、Pt、
V、Mo、Ta、W(各々の金属の融点はそれぞれ、1
064℃、1455℃、1772℃、1890℃、26
10℃、2996℃、3387℃である。)で形成した
とき、LED素子の劣化率を示したものであり、横軸を
各導電膜の融点でプロットしている。ここで劣化率と
は、各金属で導電膜を形成したLED素子100個に3
0mAの電流を流し、3000時間後、動作電圧の上
昇、点灯しなくなった等の不良化した素子の割合であ
る。また、●は導電膜下の金属膜がNiの場合、■はP
dの場合である。導電膜がAuもしくはNiの場合劣化
率は70%以上と非常に高く、SiO2との緩やかな酸
化によって素子が劣化してしまうことが分かる。それに
対し、導電膜の金属の融点が該導電膜下の金属膜の融点
より高い場合、劣化は30%以下と非常に低くなる。
(ちなみにNiの融点は1455℃、Pdの融点は15
54℃である。)この傾向は、金属膜がNiでもPdで
も同じ事が分かった。更に図に於いて×で示したNi/
Auの電極構造でSiO2誘電体膜がない場合は、劣化
率は約20%と低くなり、Ni/Au電極とSiO2
電体膜の酸化が無いためであると考えられる。図には記
載していないが、WNも劣化率は金属膜がNiの場合に
は、15%、Pdの場合には、Ni/Au透光性電極と
Ni/Mo透光性電極を0〜1000℃で10分間アニ
ールした後のシート抵抗を図3に示してある。0℃の点
はアニール前のシート抵抗を示している。Ni/Au透
光性電極は70/50Å、Ni/Mo透光性電極は各々
70/50Åの厚さで形成されており、トータルの膜厚
も同じにしている。この場合、800℃のアニール後に
おいてNi/Au電極は100Ω程度と高抵抗化してい
るにもかかわらずNi/Mo透光性電極は0.2Ω/c
2程度の低抵抗なシート抵抗を保つことができた。M
oがSiO2によるNiの酸化を有効に防止しているこ
とが分かる。このような2層構造をとることでNi/A
u電極以上に熱的安定性が高い、高信頼性の電極構造を
作成することができた。
In the semiconductor light emitting device of the present embodiment, even if the power is applied for a long period,
Stable characteristics were obtained. This will be described with reference to FIG. FIG. 2 shows that the conductive film on the metal film is made of Au, Ni, Pt,
V, Mo, Ta, W (each metal has a melting point of 1
064 ° C, 1455 ° C, 1772 ° C, 1890 ° C, 26
10 ° C., 2996 ° C., 3387 ° C. ) Shows the deterioration rate of the LED element when formed, and the horizontal axis is plotted with the melting point of each conductive film. Here, the deterioration rate is 3 per 100 LED elements having a conductive film formed of each metal.
This is a ratio of defective elements such as an increase in operating voltage and a stop of lighting after 3000 hours when a current of 0 mA flows. In addition, ● indicates that the metal film under the conductive film is Ni, and Δ indicates P
This is the case for d. When the conductive film is made of Au or Ni, the deterioration rate is as high as 70% or more, and it can be seen that the element is deteriorated by the moderate oxidation with SiO 2 . On the other hand, when the melting point of the metal of the conductive film is higher than the melting point of the metal film under the conductive film, the deterioration is as extremely low as 30% or less.
(By the way, the melting point of Ni is 1455 ° C and the melting point of Pd is 15
54 ° C. This tendency was the same whether the metal film was Ni or Pd. Further, Ni /
When the SiO 2 dielectric film is not provided in the Au electrode structure, the deterioration rate is as low as about 20%, which is considered to be because there is no oxidation of the Ni / Au electrode and the SiO 2 dielectric film. Although not shown in the figure, the deterioration rate of WN is 15% when the metal film is Ni, and 0% when the metal film is Pd. The sheet resistance after annealing at 1000 ° C. for 10 minutes is shown in FIG. The point at 0 ° C. indicates the sheet resistance before annealing. The Ni / Au translucent electrode is formed with a thickness of 70/50 °, the Ni / Mo translucent electrode is formed with a thickness of 70/50 °, and the total film thickness is also the same. In this case, the Ni / Mo translucent electrode has a resistance of 0.2 Ω / c despite the resistance of the Ni / Au electrode having increased to about 100Ω after annealing at 800 ° C.
The sheet resistance was as low as about m 2 . M
It can be seen that o effectively prevents the oxidation of Ni by SiO 2 . By adopting such a two-layer structure, Ni / A
A highly reliable electrode structure having higher thermal stability than the u electrode could be produced.

【0014】また、誘電体膜がSiO2の様な酸化物で
はなく、Si34の様な窒化物であってもSi34を形
成する際に膜中に取り込まれる酸素によって酸化が進行
しNi/Au電極u電極を高抵抗化させる事が分かっ
た。このような場合に於いてもNi/Mo電極は0.2
Ω/cm2程度の低抵抗なシート抵抗を保つことがで
き、MoがSi34膜中に取り込まれた酸素によるNi
の酸化を効果的に防止する事が分かった。更に、Ni/
Mo透光性電極に関して、半導体と金属間のコンタクト
抵抗も従来の2×10-2Ω・cm2と同程度の値が得ら
れており良好なオーミック接触が得られている。図3に
示す通り、アニール温度としては、400℃以上800
℃以下が好ましい。400℃以下ではp−GaN層中の
水素が抜けきらずp層が高抵抗のままになってしまう。
また800℃以上ではNi電極の再蒸発や凝集を引き起
こしてしまい好ましくない。この事情は、Niにかえて
Pd、MoにかえてW、WN、V、Ta、Ptのいずれ
かを用いた場合であっても同様であった。またNi金属
膜の厚さは30Å以下では均一な膜形成ができず、10
0Å以上では透光性が悪くなるので好ましくない。Ni
金属膜上のMo導電膜の厚さは10Å以下では均一な膜
形成が難しく、また90Å以上では透光性が悪くなり好
ましくない。好ましくはNiの厚さは30≦d≦100
Åの間で、Mo導電膜の厚さは10≦d<90Åの間と
なる。また透光性を考えると2層の合計の膜厚が200
Åを越えないことが好ましい。
Further, the dielectric film is not a such oxides SiO 2, it is oxidized by oxygen taken into the film during the formation of the Si 3 N Si 3 N 4 even such nitrides 4 It was found that the resistance was increased and the resistance of the Ni / Au electrode u electrode was increased. Even in such a case, the Ni / Mo electrode is 0.2
A low sheet resistance of about Ω / cm 2 can be maintained, and Ni is generated by oxygen incorporated in the Si 3 N 4 film.
It has been found that the oxidation of aluminum is effectively prevented. In addition, Ni /
With respect to the Mo translucent electrode, the contact resistance between the semiconductor and the metal is about the same as the conventional 2 × 10 −2 Ω · cm 2 , and good ohmic contact is obtained. As shown in FIG. 3, the annealing temperature is 400 ° C. or more and 800
C. or less is preferred. If the temperature is lower than 400 ° C., the hydrogen in the p-GaN layer cannot be completely removed, and the p-layer remains at a high resistance.
If the temperature is higher than 800 ° C., re-evaporation or aggregation of the Ni electrode is caused, which is not preferable. This situation was the same even when any of W, WN, V, Ta, and Pt was used instead of Ni instead of Pd and Mo. If the thickness of the Ni metal film is less than 30 °, a uniform film cannot be formed.
When the angle is 0 ° or more, the light transmittance deteriorates, which is not preferable. Ni
When the thickness of the Mo conductive film on the metal film is less than 10 °, it is difficult to form a uniform film, and when the thickness is more than 90 °, the light transmittance is deteriorated. Preferably, the thickness of Ni is 30 ≦ d ≦ 100
Å, the thickness of the Mo conductive film is between 10 ≦ d <90 °. Considering the light transmission, the total film thickness of the two layers is 200
It is preferable not to exceed Å.

【0015】本実施の形態において、導電膜110とし
てMoを用いたが、これに変えて、W、WN、V、T
a、Ptにしても同様の効果が得られた。また、絶縁膜
として、SiO2に変えて、Al23、TiO3、TiO
2、Si34等の他の酸化物絶縁体を用いても、同様の
効果が得られた。
In this embodiment, Mo is used for the conductive film 110, but instead of W, WN, V, T
Similar effects were obtained for a and Pt. Also, instead of SiO 2 , Al 2 O 3 , TiO 3 , TiO 2
2 , the same effect was obtained by using other oxide insulators such as Si 3 N 4 .

【0016】[0016]

【発明の効果】従来の窒化ガリウム系化合物半導体発光
素子、特にLEDでは、透光性電極としてNiが用いら
れてきた。また透光性電極という性質上50〜200Å
という非常に薄い膜厚で形成される。また、透光性電極
上に電極を保護するためにSiO2 誘電体膜を形成して
いる。このため、電極と半導体との合金化アロイ、更に
は電極形成後のp型化アニールといった高温プロセスを
行ったときNiまたはNi/Au透光性電極が誘電体膜
であるSiO2によって酸化する、また長期に渡る通電
等においても緩やかに酸化が進み高抵抗化するといった
問題が分かった。この高抵抗化によって、シート抵抗が
高くなり、駆動電圧を低減することが困難になる。そこ
で、Ni金属膜上に導電膜であるMo、W、WN、V、
Ta、Ptを10Åから300Åの間で形成する事によ
り高温プロセスに於いてもNiが誘電体膜によって高抵
抗化せず、熱プロセスに対して安定な電極構造を作製す
る事ができた。
In the conventional gallium nitride-based compound semiconductor light emitting device, especially in the LED, Ni has been used as the light-transmitting electrode. Also, due to the nature of the translucent electrode, 50 to 200 mm
It is formed with a very thin film thickness. In addition, a SiO 2 dielectric film is formed on the translucent electrode to protect the electrode. For this reason, the Ni or Ni / Au translucent electrode is oxidized by SiO 2 which is a dielectric film when a high-temperature process such as an alloying alloy of the electrode and the semiconductor and further a p-type annealing after forming the electrode is performed. In addition, it has been found that the oxidation progresses slowly even in a long-time energization or the like, and the resistance increases. Due to the increase in the resistance, the sheet resistance increases, and it becomes difficult to reduce the driving voltage. Therefore, a conductive film of Mo, W, WN, V,
By forming Ta and Pt between 10 ° and 300 °, even in a high-temperature process, Ni did not increase in resistance by a dielectric film, and an electrode structure stable to a thermal process could be manufactured.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施形態に関わる発光ダイオー
ドの概略模式図である。
FIG. 1 is a schematic diagram of a light emitting diode according to a first embodiment of the present invention.

【図2】各導電膜でLED素子を作成したときの、素子
の劣化率である。
FIG. 2 is a graph showing a deterioration rate of an element when an LED element is made of each conductive film.

【図3】Ni/Au透光性電極とNi/Mo透光性電極
のシート抵抗のアニール温度依存性である。
FIG. 3 shows the annealing temperature dependence of the sheet resistance of the Ni / Au translucent electrode and the Ni / Mo translucent electrode.

【図4】従来の発光ダイオードの概略模式図である。FIG. 4 is a schematic diagram of a conventional light emitting diode.

【符号の説明】[Explanation of symbols]

101 サファイア基板 102 GaNバッファ層 103 n型のGaN層 104 n型Al0.1Ga0.9N下部クラッド層 105 In0.2Ga0.8N活性層 106 p型Al0.05Ga0.95N蒸発防止層 107 p型Al0.1Ga0.9N上部クラッド層 108 p型GaNキャップ層 109 Ni金属膜 110 Mo導電膜 111 Au電極パッド 112 n電極 113 SiO2誘電体膜 201 サファイア基板 202 n−GaN:Si 203 活性層 204 p−GaN:Mg 205 Ni透光性電極またはNi/Au透光性電極 206 n型電極 207 ボンディング用電極パッド 208 SiO2の誘電体膜Reference Signs List 101 sapphire substrate 102 GaN buffer layer 103 n-type GaN layer 104 n-type Al 0.1 Ga 0.9 N lower cladding layer 105 In 0.2 Ga 0.8 N active layer 106 p-type Al 0.05 Ga 0.95 N evaporation preventing layer 107 p-type Al 0.1 Ga 0.9 N upper cladding layer 108 p-type GaN cap layer 109 Ni metal film 110 Mo conductive film 111 Au electrode pad 112 n electrode 113 SiO 2 dielectric film 201 sapphire substrate 202 n-GaN: Si 203 active layer 204 p-GaN: Mg 205 Ni translucent electrode or Ni / Au translucent electrode 206 N-type electrode 207 Bonding electrode pad 208 Dielectric film of SiO 2

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 窒化物系半導体に接するオーム性電極
と、該オーム性電極の少なくとも一部を覆う酸化物絶縁
膜とを備えた半導体発光素子において、該オーム性電極
は、該窒化物半導体に接触する金属膜と、該金属膜上に
形成された該金属膜より高融点の導電膜とから構成さ
れ、かつ該導電膜上に誘電体膜が形成されていることを
特徴とする半導体発光素子。
1. A semiconductor light emitting device comprising: an ohmic electrode in contact with a nitride-based semiconductor; and an oxide insulating film covering at least a part of the ohmic electrode, wherein the ohmic electrode is connected to the nitride semiconductor. A semiconductor light emitting device comprising: a contacting metal film; and a conductive film having a higher melting point than the metal film formed on the metal film, wherein a dielectric film is formed on the conductive film. .
【請求項2】 前記金属膜がNiもしくはPdを含んで
なり、前記導電膜がPt、W、WN、V、Mo、Taの
いずれかを含んでなる事を特徴とする請求項1に記載の
半導体発光素子。
2. The method according to claim 1, wherein the metal film includes Ni or Pd, and the conductive film includes one of Pt, W, WN, V, Mo, and Ta. Semiconductor light emitting device.
【請求項3】 p型窒化物半導体表面に、Niもしくは
Pdを含む金属膜、Pt、W、WN、V、Mo、Taの
いずれかを含んでなる導電膜を順次形成する工程と、そ
の後、該導電膜上に、酸素を含む誘電体膜を形成する工
程と、さらにその後、400℃以上800℃以下で熱処
理する工程とを、含むことを特徴とする半導体発光素子
の製造方法。
3. A step of sequentially forming a metal film containing Ni or Pd and a conductive film containing any of Pt, W, WN, V, Mo and Ta on a p-type nitride semiconductor surface, A method for manufacturing a semiconductor light emitting device, comprising: a step of forming a dielectric film containing oxygen on the conductive film; and a step of subsequently performing a heat treatment at 400 ° C. to 800 ° C.
JP9883998A 1998-04-10 1998-04-10 Semiconductor light-emitting element and manufacture thereof Pending JPH11298040A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9883998A JPH11298040A (en) 1998-04-10 1998-04-10 Semiconductor light-emitting element and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9883998A JPH11298040A (en) 1998-04-10 1998-04-10 Semiconductor light-emitting element and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH11298040A true JPH11298040A (en) 1999-10-29

Family

ID=14230442

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9883998A Pending JPH11298040A (en) 1998-04-10 1998-04-10 Semiconductor light-emitting element and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH11298040A (en)

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