JPH11274645A - Semiconductor element and fabrication thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce threshold level and to enhance reliability by employing a specified nitride based semiconductor material in a buried layer or an insulation layer thereby suppressing introduction of dislocation or strain to the side of other semiconductor for forming an active region. SOLUTION: An amorphous AlXGa1- XN (0<x<1) 110 is buried in the side face of an MQW active layer 103. An n side electrode 121 is formed on a contact layer 105 and a p side electrode 122 is formed on the rear side of a substrate 101. In the case of a semiconductor element having function for controlling a light having wavelength of 0.92-1.6 μm, refractive index of AlXGaYInZN (0<x<1, 0<y+z<1, x+y+z=1) and AlXGaYInZN added with H and O or C (0<=(x, y, z)<=1, x+y+z=1) is substantially invariant in that wavelength region. Since introduction of dislocation or strain to the side of other semiconductor for forming an active region is suppressed, a good quality active layer can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as a semiconductor laser or an optical integrated device, and more particularly, to a semiconductor device in which a semiconductor layer used as a buried layer or an insulating layer is improved, and a method of manufacturing the same.

[0002]

2. Description of the Related Art In order to electrically insulate one active region in a semiconductor device, ions are implanted around the active region to insulate the active region, or a mesa structure is formed around the active region to spatially isolate the active region. Separation is performed. As a single active area becomes higher in performance and miniaturized, it becomes difficult to electrically or optically separate elements, and at the same time, it is necessary to increase heat dissipation efficiency. In the method by ion implantation, damage to the crystal is large, and it is difficult to use the device particularly in a high device. For this reason, a mesa structure is formed and embedded with a material that can be electrically and optically narrowed. For this purpose, it is desirable to use a material having a large difference in characteristics between the material of the active region and the material of the buried region of the element and having a high thermal conductivity as the burying material.

[0003] Based on such an object, for example, in Japanese Patent Application Laid-Open No. 9-45885, a semiconductor laser using a layer mainly composed of AlN as a buried layer has been produced. But,
AlN is harder than other semiconductors and has a different coefficient of thermal expansion from other semiconductors. According to the study of the present inventors, when this kind of material is used, dislocations and strains are likely to be introduced to the other semiconductor side forming the active region, and particularly when heated to a high temperature in the manufacturing process, an abnormal layer is formed at the buried interface. It was found that there was a problem that a high quality active layer could not be obtained.

FIG. 9 is a sectional view showing an element structure of a conventional surface-emitting type semiconductor laser. On an n-type GaAs substrate 900, a p-type GaAs buffer layer 901, a p-type Bragg reflector 902, an active layer 903, an n-type Bragg reflector 904,
A cap layer 905 is stacked, and the active layer 903, the reflector 904, and the cap layer 905 are processed into a mesa shape, and the side surface is buried with an AlN layer 906. As an electrode for current injection, an n-side electrode 921 is selectively formed on the cap layer 905, and a p-side electrode 922 is selectively formed on the reflector 902.

The p-type reflector 902 is formed by alternately stacking p-type GaAs and p-type AlAs, and the n-type reflector 904 is formed by alternately stacking n-type GaAs and n-type AlAs. I have. The active layer 903 is made of InGaAs.
An undoped GaAs layer is provided on both sides of the strained quantum well layer, an undoped AlGaAs layer is provided on both sides thereof, and an n-type AlGaAs layer and a p-type AlGaAs layer are provided on both sides thereof.

In the surface emitting laser having such a configuration, AlN having high thermal conductivity is used for the buried layer.
Compared to the case where the side surface of the mesa is air or a semiconductor buried layer, heat dissipation is excellent and the temperature rise of the active layer is suppressed, so it is expected that the maximum oscillation temperature and the maximum optical output will increase. You. This result is expected not only for the above-described surface-emitting type semiconductor laser but also for an edge-emitting type semiconductor laser.

However, since the pn junction on the side surface of the mesa is directly buried with AlN, the leakage current due to surface recombination is large, and the oscillation threshold value rises.
Sufficient light output characteristics cannot be obtained. In addition, there is also a problem that the reliability of the element is low because the leakage current gradually increases with energization. Further, since the semiconductor forming the mesa and the AlN have different thermal expansion coefficients, a large stress is applied in the vicinity of the active layer, which furthers the above problem.

[0008]

As described above, conventionally, in a semiconductor laser using a gallium nitride-based semiconductor material,
Attempts have been made to bury the side surfaces of the mesa with AlN in order to perform electrical and optical constriction. In this case, dislocations and strains are likely to be introduced to the other semiconductor side forming the active region. However, when heated to a high temperature, an abnormal layer is generated at the buried interface, and a high-quality active layer cannot be obtained. Further, there is a problem that sufficient light output characteristics cannot be obtained because a leakage current due to surface recombination is large and an oscillation threshold value is increased.

The present invention has been made in view of the above circumstances, and has as its object to be able to use an AlN-based material as a buried layer or an insulating layer, and to provide a semiconductor device which forms an active region. It is an object of the present invention to provide a semiconductor element capable of obtaining a high-quality active layer by suppressing the introduction of dislocations and strains into the semiconductor element, reducing the threshold value, improving the reliability, and the like, and a method for manufacturing the same.

[0010]

(Structure) In order to solve the above-mentioned problem, the present invention employs the following structure.
That is, the present invention is to provide a semiconductor device using a nitride semiconductor _{material, Al x Ga y In z N} (0 <x <1,0 <y
+ Z <1, x + y + z = 1) is used for the buried layer or the insulating layer.

The present invention also relates to a semiconductor device using a nitride-based semiconductor material, wherein Al _x Ga _y In _z N (0 ≦
(X, y, z) ≦ 1, x + y + z = 1), and a layer obtained by adding H and O or H and C is used as a buried layer or an insulating layer.

Further, the present invention provides a nitride-based semiconductor device comprising a single crystal, a polycrystal, or a semiconductor wherein one of Al and Ga is not zero and the concentration of carbon or oxygen is higher than the saturation concentration of GaN impurities. amorphous Al _x Ga _y I
n _z N (0 ≦ x, y, z ≦ 1, x + y + z = 1)
And O or a layer to which H and C are added is used as a buried layer or an insulating layer.

Here, preferred embodiments of the present invention include the following. (1) The AlGaInN layer is polycrystalline or amorphous. (2) The base should be a semiconductor layer containing no N. (3) The base should be a semiconductor layer containing P and N at the same time, or a semiconductor layer containing As and N at the same time.

(4) The buried layer is formed in a concave portion formed on the side of the active region, and controls the concentration of oxygen or carbon.
Impurity saturation concentration in AlN crystal (about 10 ²⁰ × cm ^-3 )
The composition should be such that the thermal conductivity coefficient does not become too large (the composition of oxygen or carbon is about 50% or less).

[0015] The present invention is the manufacturing method of the semiconductor _{element, Al x Ga y In z N} (0 <x <1,0 <y
+ Z <1, x + y + z = 1) when growing a semiconductor layer comprising at least dimethylhydrazine,
It contains monomethylhydrazine or tertiarybutylhydrazine, and is characterized by using Ga or Al organic metal as a raw material of Ga or Al, respectively. Here, it is desirable to form the buried layer using at least a few fluorine compounds or fluorine oxygen compounds as a selection mask.

According to the present invention, there is also provided a semiconductor device in which a side surface of a multilayer film including an active layer is processed into a mesa shape, and the mesa side surface is buried with a buried layer mainly composed of AlGaN.
A semiconductor layer having the same crystal structure as the semiconductor forming the active layer is provided between the mesa side surface and the AlGaN buried layer.

According to the present invention, there is also provided a semiconductor device in which a side surface of a multilayer film including an active layer is processed into a mesa shape, and the mesa side surface is buried with a buried layer mainly composed of AlGaN.
The AlGaN buried layer is formed of a plurality of layers having different compositions.

[0018] According to (action) the present invention, for example, the vicinity of the active region after the mesa is formed, the mesa side Al _x Ga _y In _z
N (0 <x <1, 0 <y + z <1, x + y + z = 1),
Or _{Al x Ga y In z N (} 0 ≦ (x, y, z) ≦ 1,
x + y + z = 1) to a layer in which H and O or H and C are added,
It is characterized in that it is used for a buried layer. in this case,
The semiconductor forming the active region is GaAs, AlGaAs
s, InP, AlGaInP, GaInAs, GaIn
Group III compound semiconductor such as AsP, GaP, Si, SiG
Group IV semiconductor such as eC, SiGeSn, Ge, CdMgT
e, ZnSe, ZnCdTe, etc., II-VI compound semiconductors, chalcopyrite semiconductors, GaInAsN, GaI
nAsPN, AlGaInN, AlGaInAsPN, etc. can be applied.

Since the buried layer of the present invention has a high electric resistivity, current leakage to the buried layer is small, and the active region can be reduced. Therefore, the drive current of the device can be reduced. Further, since the driving current is small, the amount of generated heat can be reduced. Further, since the buried layer or the insulating layer of the present invention has a high thermal conductivity of 2 W / cmK, a temperature rise in the active layer is small and a high power device can be realized. In addition, since the element has high electrical insulation and high thermal conductivity, elements can be integrated at a high density.

In particular, the active region is made of Ga
As, AlGaAs, InP, AlGaInP, GaI
III-V compound semiconductors such as nAs, GaInAsP, and GaP; IV group semiconductors such as Si, SiGeC, SiGeSn, and Ge; and I such as CdMgTe, ZnSe, and ZnCdTe.
I-VI compound semiconductor, chalcopyrite semiconductor, GaI
In the case of nAsN, GaInAsPN, and AlGaInAsPN, since the energy of the buried layer of the present invention, the active region, and the energy of the absorption edge are different, a large light confinement effect can be obtained, and sufficient optical element separation can be performed.

In addition, AlG as a buried or insulating layer
Since aInN is not a single crystal but a polycrystal or an amorphous, unlike the case of a single crystal, it is difficult to introduce a strain into the active region and induce a dislocation accompanying the distortion. Further, huge dislocations are hardly introduced into the buried layer or the insulating layer.

In addition, H and O or H and C are added to AlGaInN.
Can be formed at a low temperature by adding GaAs, AlGaAs, InP, and AlGaIn of the active layer.
P, GaInAs, GaInAsP, GaP, GaIn
III-V compound semiconductors such as AsN, GaInAsPN,
Group IV semiconductors such as Si, SiGeC, SiGeSn and Ge, and II-VI such as CdMgTe, ZnSe and ZnCdTe
Group compound semiconductor, chalcopyrite semiconductor, AlGaI
Since the reaction between nAsPN and the nitrogen source of the buried layer can be suppressed, formation of a layer having a small band gap at the interface can be suppressed. Therefore, current leakage in the buried layer or the insulating layer can be reduced.

By adding H and O or H and C, amorphous or polycrystalline can be formed more easily than in the case of AlGaInN. The strain introduced to the interface can be reduced.

Further, if oxygen or impurity saturation concentration of the concentration of carbon in the AlN single crystal (approximately 10 ²⁰ cm ^-3) or more, less likely the single crystal, easily polycrystalline or amorphous give Can be Further, a composition whose thermal conductivity is not so different from AlN (oxygen and carbon concentrations are approximately 50%
In the following case, the thermal conductivity of AlGaInN exceeds the thermal conductivity of Si. AlG with H and O or H and C added
aInN maintains the characteristics of an insulator having high thermal conductivity, which is a feature of the present invention.

Also, polycrystalline or amorphous AlGaI
nN, or AlGaInN doped with H and O or H and C
When forming at least nitrogen gas containing dimethylhydrazine, monomethylhydrazine, or tertiarybutylhydrazine as a raw material of Ga or Al and using an organic metal of Ga or Al as the raw material for Ga or Al, the temperature is 350 ° C.
Since the nitrogen source is decomposed at a low temperature, a reaction between the material serving as an active layer of the device and nitrogen can be prevented. For this reason, the evaporation of the constituent elements from the material to be the active layer can be prevented, and the deterioration of the material can be prevented. Further, formation of a nitrided arsenide, a nitrided phosphide, or a nitrided arsenide having a small band gap can be prevented.

The above polycrystalline or amorphous AlGaIn
When forming AlGaInN to which N or H and O or H and C are added, at least nitrogen gas and at least one of dimethylhydrazine, monomethylhydrazine and tertiarybutylhydrazine are contained as a nitrogen source, and Ga, Al Or Ga and A as raw materials of In respectively.
An organic metal of 1 or In may be used. In this case, NH
_{Since 3 is} also supplied, the temperature range for decomposition of the nitrogen raw material is widened and the temperature range suitable for depositing a film is widened. Further, the amount of expensive dimethylhydrazine, monomethylhydrazine, or tertiarybutylhydrazine can be reduced.

[0027] forming a recess around the active regions for insulating the electrical or optical ladle around the active region of the device, the concave portion, the polycrystalline or amorphous Al _x Ga _y In _z N
(0 <x <1,0 <y + z <1, x + y + z = 1), or H and O or Al was added H and C _x Ga _y In _z N
(0 ≦ (x, y, z) ≦ 1, x + y + z = 1) When forming a layer to make it substantially flat, at least the portion of the active region other than the concave portion is made of Mg _x C _ay Sr _z Ba _{1 -x} f. when forming a buried layer in the recess ₂ or _{Al x Ga y in 1-xz} F 3 as a selective mask, sediments because these layers small surface energy does not precipitate nearly the top of these layers.

Further, when the temperature is raised to about 500 ° C. to precipitate, a reaction occurs between the fluorine evaporated from the solid layer and the deposited material due to the evaporation of the fluorine compound, and the fluorine compound having a high vapor pressure is deposited. It also has the effect of suppressing deposition. Further, these fluorine compounds are readily removed with acid or alkali, Al _x polycrystalline or amorphous on the mask _{Ga y In z N (0 <} x <1,0 <
y + z <1, x + y + z = 1), or H and O or H and C
Was added the _{Al x Ga y In z N (} 0 ≦ (x, y, z)
≦ 1, x + y + z = 1) Even if a layer is deposited, it can be easily removed.

[0029]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 is a sectional view showing a schematic configuration of a laser array according to a first embodiment of the present invention. In this embodiment, the number of lasers is 12 in one element, but a part thereof is shown here.

On a p-InP substrate 101, a p-InP buffer / cladding layer 1 having a carrier concentration of 1 × 10 ¹⁸ cm ⁻³ was formed.
02, an active layer 103 composed of GaInAsP and a GaInAsP strained multiple quantum well structure (MQW) having different compositions;
An n-InP cladding layer 104 and an n-InP contact layer 105 are laminated, and these layers 102 to 105 are processed into a mesa shape.

On the side surface of the MQW active layer 103, amorphous A
l _x Ga _1-x N layer (0 <x <1) 110 is buried. Further, an n-side electrode 121 is formed on the contact layer 105, and a p-side electrode 122 is formed on the back surface of the substrate 101.
Are formed. The side surface of the active region 103 is made of amorphous Al
when embedding in _x Ga _1-x N layer 110, TMAI, T
Using Mga, NH ₃ , dimethylhydrazine and MgCaSrBaF as a selective deposition mask, an amorphous AlxGa1 _-xN layer 110 was formed at 350.degree. After this,
The MgCaSrBaF ₂ mask with deposits onto them, was removed using sulfuric acid. Thereafter, further patterning is performed, and the n-side electrode 1 is formed by lift-off using a resist.
21 was formed.

Since the refractive index between the buried layer 110 and the active layer 103 is large, even if the width of the active layer 103 is 0.8 μm or less, the threshold current still decreases in accordance with the width of the active layer.
3 having the same layer structure when the width of
The threshold value is reduced to about half as compared with the InP buried laser having an active layer width of m. Further, since the resistance of the buried layer 110 was high, the leakage current was small, and the maximum light output showed almost the same value despite the narrow active layer width.

The structure of the active layer 103 or the active layer 103
The devices having different oscillation wavelengths were integrated by changing the width of the device. In the conventional device, since the difference in the refractive index between the active layer 103 and the buried layer 110 is small, light spreads around the active layer in a complicated manner, and the effective refractive index strongly depends on the structure of the active layer. In the case of the present embodiment, the light is almost completely confined in the lateral direction, so that the calculation of the effective refractive index can be performed in almost one dimension. For this reason, it is not necessary to consider the fluctuation of the effective refractive index when the width of the active layer is changed, and the controllability of the wavelength when a grating is used is improved, thereby preventing a decrease in yield due to poor control of the width of the active layer. I was able to go. Also, by changing the pitch of the grating and the structure of the active layer, it was possible to easily integrate devices having different wavelengths.

The present invention is not limited to the above embodiment.
When using the present invention to a semiconductor device and having a function of controlling the light 2~1.6μm, Al _x Ga _y
In _z N (0 <x <1, 0 <y + z <1, x + y + z =
1), Al was added H and O or H and C _x Ga _y In _z
Since the refractive index of N (0 ≦ (x, y, z) ≦ 1, x + y + z = 1) hardly changes in this wavelength range, a design margin can be obtained with good controllability, and a device as designed can be realized.
Also, wavelength multiplexing in this wavelength range was easy.

This embodiment is described in Japanese Patent Application Laid-Open No. 9-45895.
Compared with the single crystal AlN, amorphous AlG
The difference is that aN is used, but this provides an effect that cannot be obtained in the above-mentioned known example. That is, when Ga is introduced into AlN, the oxidation of AlN is suppressed, and the distortion and characteristic change of the buried layer can be suppressed. Furthermore, by introducing Ga, low-temperature growth becomes possible,
This is extremely effective when different crystals are embedded.
Further, when the buried layer is formed in an amorphous state instead of a single crystal, the buried layer becomes soft and easily deformed. This leads to suppression of deformation of the mesa including the active layer.

(Second Embodiment) FIG. 2 shows a second embodiment of the present invention.
It is a perspective view which shows the schematic structure of the optical semiconductor element concerning embodiment. This device integrates a large number of active areas, and FIG. 2 shows a part thereof.

In the figure, 201 is an n-type InP substrate, 202 is an n-type InP cladding layer, 203 is a waveguide / modulation absorption layer, 204 is a p-type InP cladding layer, 205 is a p-side electrode metal, and 208 is a grating laser. Region, 210 is a high resistance AlGaN OCH buried layer, 221 is a modulator electrode, 222 is an n-side electrode, 223 is a laser electrode, 22
Reference numeral 5 denotes an electrode contact layer separation region.

In FIG. 2, a laser, a modulator and a waveguide are integrated. Since the laser and the modulator are a forward bias element and a reverse bias element, insulation between the elements is important. In this case, the current confinement layer of the two elements is also used as one element isolation region, so that the AlGaN OCH layer 210 is used as a buried layer.
Is formed. Since this layer has a high resistance, in this embodiment, high element isolation can be realized by separating the electrodes. In addition, for high-speed operation, it is necessary to reduce the capacitance of the modulator. For this purpose, it is desirable to reduce the width of the modulator. Also, considering light waveguide, it is desirable that there is no large difference in width from the laser portion.

Here, the buried layer 210 is made of Al
Not limited to GaNOCH, it may further contain In, or may not have one or two of O, C and H. _{That, Al x Ga y In z N} (0 ≦
Any layer may be used as long as H, O or C is added to (x, y, z) ≦ 1, x + y + z = 1). As in the first _{embodiment, Al x Ga y In z N} (0 <x <1,0 <y +
z <1, x + y + z = 1) can also be used.

In the case of this embodiment, the effect of confining light and current is high, and the width of the operation region can be reduced to about 0.4 μm. For this reason, it was difficult to achieve both a high extinction ratio and high-speed operation in the conventional structure, but in the device of the present embodiment, the extinction ratio was 18 dB or more and the operation speed was 40 GHz.
Was realized.

AlGaInN or AlGaNO of the present invention
The structure in which the CH material is used for the element isolation region or the insulating region is not limited to the present embodiment, and at least a semiconductor device in which a laser, a modulator, and a waveguide are integrated. It can also be used for a type of amplifier, light receiving element or the like or for integration thereof. In the semiconductor device of the present invention, a buried layer having a high resistance is used.
Therefore, in any case, the leakage between the electrodes could be easily reduced. Therefore, the effects of increasing the output of the laser and improving the modulation characteristics in the high-speed region of the modulator are particularly remarkable.

(Third Embodiment) FIG. 3 shows a third embodiment of the present invention.
It is sectional drawing which shows the schematic structure of the optical semiconductor element concerning embodiment. This figure shows a part of a semiconductor device in which a large number of field effect transistors are integrated.

In the figure, reference numeral 301 denotes an SI-GaAs substrate;
2 is an i-type GaAlAs buffer layer, 303 is InGaAs
s channel layer, 304 is an AlGaAs spacer layer, 30
5 is an AlGaAs carrier supply layer, 308 is GaAs /
GaInAs n ⁺ -type contact layer, 310 is amorphous A
1N _s O _1-s (0 <(s, 1-s) <1) Insulating layer, 32
1 is a gate electrode, 322 is a source electrode, 323 is a contact electrode, and 327 is an element isolation region.

In the case of this embodiment, an isolation insulating film between elements,
The amorphous AlO _s C _1-s (0 <s, 1-s <1) of the present invention is used for an insulating film also serving as surface passivation,
As a result, good element separation and high heat conduction were obtained. For this reason, an output of 100 W class can be realized in almost the same area as the conventional device, and an operation speed of 20 GHz class can be realized at the same time.

(Fourth Embodiment) FIG. 4 shows a fourth embodiment of the present invention.
It is sectional drawing which shows the schematic structure of the optical semiconductor element concerning embodiment. This shows an example used for a hetero bipolar transistor.

In the figure, reference numeral 401 denotes an SI-GaAs substrate;
2 is an n ⁺ -type GaAs layer, 403 is an n-type GaAs layer, 40
4 is an n ⁺ -type GaAs layer; 405 is an AlGaAs layer;
6 is an n ⁺ -type GaAs layer, and 407 is an n ⁺ -type GaInAs
Layer, 409 is an H ⁺ implantation region, 410 is an AlNOC buried layer, 421 is an emitter electrode, 422 is a base electrode,
23 indicates a collector electrode.

In this embodiment, the thick AlN _p O _q C
By forming _1-pq (0 <(p, q, _1-pq ) <1), flattening after forming the wiring was achieved. Since there are many device wirings of this structure and the process becomes complicated, the effect of the present invention is enormous. This figure also shows a part of a semiconductor device in which a large number of transistors are integrated, but the effect of the present invention becomes more remarkable as the number of active regions increases and the device structure becomes more complicated. In addition, when an operation at a frequency in the microwave region was attempted using the device of the present embodiment, high-speed operation became possible because the device isolation was better and the size was about 25% smaller than the conventional device.

The buried layer of this embodiment has a thickness of 2 W / cmK
Since the thermal conductivity is high, heat dissipation from the active layer is large, and the total calorific value per area density can be increased. Therefore, the integration density in the case of integration can be increased. Also, when used on the surface of the device as an insulating layer,
Since the thermal resistance is smaller than that of a conventional SiO ₂ -based insulating film, the effect of releasing heat from the surface is large and the degree of integration can be increased. Also, when used for an SOI structure, the conventional problem of thermal resistance can be avoided. For this reason, the SOI is about three times as large on the Si substrate as compared with the case where the SiO ₂ -based insulating film is used.
It was possible to achieve a power density of about 10 times on the substrate. The operating speed was remarkably improved, about 2 times and 4 times, respectively.

[0049] The present invention is not limited to the above embodiment, in a device at least electronic devices and optical devices are _{integrated, Al x Ga y In z N} (0 <x <1,0 <y +
z <1, x + y + z = 1), or _{H, Al x Ga y In z} N (0 ≦ added any one or more of C or O
(X, y, z) ≦ 1, x + y + z = 1) layers may be used for the element isolation region or the insulating region. In this case, the integration density of the electronic device and the optical device can be increased, and the effect of confining light is large, so that the distance between the optical device and the electronic device can be reduced.

In particular, when the present invention is applied to a device having two or more electrodes on the front surface or two or more on the front surface and one or more on the back surface, the electrical resistivity of the buried layer is high, and Current leakage into the layer is small, and the distance between active regions can be reduced. Furthermore, since the buried layer of the present invention has a high thermal conductivity of 2 W / cmK, the heat dissipation from the active layer is large, and the total calorific value per area density can be increased. For this reason, when integrated, the integration density could be increased. Therefore, the present invention is not limited to an integrated device of a laser and a modulator.
Alternatively, in a semiconductor device having two or more electrodes on one side of the device, it is easy to reduce the device size, increase the power at the same size, and integrate active regions having different functions. Therefore, high-speed operation of the element can be easily realized.

The manufacturing method of the present invention is not limited to the manufacturing method of the above embodiment. _{Al x Ga y In z N (} 0 <
x <1,0 <y + z < 1, x + y + z = 1), or Al was added H and O or H and _{C x Ga y In z N (} 0
≦ (x, y, z) ≦ 1, x + y + z = 1) When forming a layer, a nitrogen source contains ammonia gas, and Ga or Al
May be made of Ga or Al organic metal, respectively. In this case, at a growth temperature of 350 to 550 ° C.,
Since NH ₃ hardly decomposed in the gas phase, the raw material gas reached the substrate surface without reacting, and a uniform deposited layer could be formed.
When the temperature of the layer was in the range of 600 to 750 ° C., the reaction in the gas phase was intense and a non-uniform film was formed. When the temperature was 350 ° C. or lower, the film was not deposited.

[0052] _{Further, Al x Ga y In z N} (0 <x <
1,0 <y + z <1, x + y + z = 1), or H, Al was added 1 or more O or C _x Ga _y In _z N
(0 ≦ (x, y, z) ≦ 1, x + y + z = 1) When forming a layer, at least nitrogen raw material contains dimethylhydrazine, monomethylhydrazine, or tertiary butylhydrazine, and Ga or Al raw material Ga
Alternatively, it may be formed using an organic metal of Al. In this case, since the nitrogen source contributes to the crystal growth at a low temperature of about 250 ° C. to 350 ° C., it was possible to prevent the reaction between the material serving as the active layer of the device and nitrogen. For this reason, the evaporation of the constituent elements from the material to be the active layer could be prevented, and the deterioration of the material could be prevented. Furthermore, the formation of a small band gap nitrogenated arsenide, a nitrogenated phosphide, or a nitrogenated arsenide phosphide could be prevented.

[0053] The _{Al x Ga y In z N (} 0 <x <1,
0 <y + z <1, x + y + z = 1), or H, Al was added 1 or more O or _{C x Ga y In z N (} 0
≦ (x, y, z) ≦ 1, x + y + z = 1) When forming a layer, at least one of ammonia gas and at least one of dimethylhydrazine, monomethylhydrazine, or tertiary hydrazine is contained as a nitrogen source,
An organic metal of Ga, Al or In may be used as a raw material of Ga, Al or In, respectively. In this case, since NH ₃ was also supplied, the decomposition temperature range of the nitrogen raw material was widened, and the temperature range suitable for depositing the film was widened to 250 to 600 ° C. Further, the amount of expensive dimethylhydrazine, monomethylhydrazine, or tertiarybutylhydrazine used could be reduced to several times.

[0054] Further, a recess is formed around the active region for insulating electrically or optically around the active region of the device is not limited to the above embodiment, the recess Al _x Ga _y In _z
N (0 <x <1, 0 <y + z <1, x + y + z = 1),
Or Al _x G to which at least one of H, O and C is added
a _y In _z N (0 ≦ (x, y, z) ≦ 1, x + y + z =
When substantially flattened by forming a 1) layer, at least Mg _x Ca _y Sr _z Ba in a portion other than the concave portion of the active region
May be formed a buried layer in the recess as a _1-xyz F ₂ or selective mask the _{Al x Ga y In 1-xy} F 3. Since these layers have low surface energy, little deposits deposit on these layers. This difference was remarkable compared to SiO ₂ .

Further, when the temperature is raised to about 500 ° C. to precipitate, a reaction occurs between the fluorine evaporated from the solid layer and the deposited material due to the evaporation of the fluorine compound, and the fluorine compound having a high vapor pressure is generated. It also has the effect of suppressing deposition. Further, these fluorine compounds can be easily removed with an acid or an alkali, and polycrystalline or amorphous Al _x Ga ₁ -xN (0 <(x, 1-x) <
1), or _{Al x Ga y In z N (} 0 <x <1,0 <
y + z <1, x + y + z = 1), or H, O Moshiku Al _x was added one or more _{C Ga y In z N (0} ≦
Even if (x, y, z) ≦ 1, x + y + z = 1) layers are deposited, they can be easily removed.

Although some examples of devices have been given here, the present invention is not limited to these materials and device structures, but can be applied to various electronic and optical devices. For example, the present invention can be applied to integration of an optical device and an electronic device. As the optical device, in addition to the laser, the modulator, and the waveguide, a light receiving element, an amplifier, a switch, a detector, or a device in which these are combined. Is also applicable. Electronic devices include lateral devices such as MOS and FET, CMOS sensors, bipolar transistors, and the like.
The present invention can be applied to various devices such as those having a CCD, IGBT, GTO, thyristor, and SOI structure.

Further, the present invention relates to GaAs, AlGaAs,
InP, AlGaInP, GaInAs, GaInAs
III-V compound semiconductors such as P, GaP, Si, SiGe
Group IV semiconductors such as C, SiGeSn and Ge, CdMgT
e, ZnSe, ZnCdTe, etc., when used in a semiconductor device having an active region of a II-VI group compound semiconductor, chalcopyrite semiconductor, or AlGaInAsPN, a buried layer,
Since the difference between the resistivity and the refractive index from the insulating layer is increased, good electrical and optical confinement can be obtained. For this reason, various electric and optical devices can be integrated. Above all, the dissipation of light from the waveguide can be reduced, which is effective for a power device in which a laser and a modulator are integrated into an optical device and a current flows in a lateral direction in which heat is effectively dissipated by an insulating film.

(Fifth Embodiment) FIG. 5 shows a fifth embodiment of the present invention.
FIG. 2 is a cross-sectional view illustrating a schematic configuration of a semiconductor laser according to the first embodiment.

In the figure, 500 is an n-type InP substrate, 501 is an n-type InP buffer layer (cladding layer), 502 is an InGaAsP multi-strain quantum well active layer having an emission wavelength of 1.3 μm, 503 is a p-type InP cladding layer, 504 is a p-type In
A GaAs contact layer; 505, a semi-insulating InP buried layer; 506, an amorphous high-resistance InGaN buried layer;
21 is a p-type electrode and 522 is an n-type electrode.

FIG. 6 is a cross-sectional view showing a manufacturing process of the laser of the embodiment shown in FIG. 5. The manufacturing method will be described below with reference to FIG. First, as shown in FIG.
A Si-doped n-type InP is formed on the substrate 500 by MOCVD.
Buffer / cladding layer (carrier concentration 1 × 10 ¹⁸ c
m ^-3 , thickness 0.5 μm) 501, emission wavelength 1.3 μm
Non-doped InGaAsP multiple strain quantum well active layer 5
02, Zn-doped p-type InP cladding layer (carrier concentration 1 × 10 ¹⁸ cm ⁻³ , thickness 1.5 μm) 503, Zn-doped p-type InGaAs contact layer (carrier concentration 1 × 1
0 ¹⁸ cm ⁻³ , thickness 0.8 μm) 504 are sequentially grown.

Next, as shown in FIG.
After the SiO ₂ film 511 deposited by the method D is processed into a stripe shape, etching is performed by the ECR-RIBE method using the SiO ₂ film 511 as a mask to form a mesa stripe having a height of about 3 μm and a width of the active layer 102 of about 1.2 μm. create.

Next, as shown in FIG.
Using an OCVD method, a Fe-doped high-resistance InP buried layer 505 having a thickness of 0.2 μm and an amorphous high-resistance AlGaN buried layer 506 having a thickness of 2.8 μm are laminated.

Next, after removing the SiO ₂ film 511,
By selectively forming a p-side electrode 521 on the p-type InGaAs contact layer 504 and etching the back surface of the substrate 500 with hydrochloric acid to a thickness of 100 μm, an n-side electrode 522 is formed as shown in FIG. The structure shown is obtained. Thereafter, the semiconductor laser is completed by cleaving the substrate so that the cavity length becomes 300 μm.

In the edge-emitting semiconductor laser fabricated in this manner, the semiconductor high-resistance InP layer 505 in which the side surface of the active layer 502 is the same as the substrate 500 (has substantially the same crystal structure as the active layer) is used. , And oscillate at a low threshold value with a very small leak current. Also,
Since the entire mesa is buried in the high-resistance AlGaN layer 506 having high thermal conductivity, the mesa has excellent heat dissipation, the temperature rise of the active layer 502 is suppressed, and high-temperature and high-light output operation is possible.
Further, the pn junction on the side surface of the active layer 502 is directly connected to AlGaN.
Since it is not in contact with the layer 506, the reliability is also very high. In addition, since the parasitic capacitance of the buried layer on the side of the mesa is extremely small, ultra-high-speed operation is possible.

In this embodiment, a semiconductor layer having a wide gap such as a non-doped InGaP layer or an InAlAs layer having a thickness of about 0.1 μm is provided between a semi-insulating InP layer of a thin semiconductor layer burying the mesa side surface and the mesa side surface. May be inserted.

(Sixth Embodiment) FIG. 7 shows a sixth embodiment of the present invention.
1 is a cross-sectional view illustrating a schematic configuration of a semiconductor laser according to an embodiment of the present invention, illustrating a surface-emitting type semiconductor laser.

In the figure, reference numeral 600 denotes a semi-insulating GaAs substrate;
01 is a p-type GaAs buffer layer, 602 is a p-type Bragg reflector, 603 is an active layer, 604 is an n-type Bragg reflector, 605 is a cap layer, 606 is a semi-insulating GaAs buried layer, 607 is an AlGaN buried layer, 621 Is p
A side electrode 622 indicates an n-side electrode.

The p-side and n-side Bragg reflectors 601, 6
04 denotes p-type GaAs, p-type AlAs, and n-type GaAs
And n-type AlAs are alternately laminated. Further, the active layer 603 is made of non-doped GaAs on both sides.
The structure is composed of an InGaAs strained quantum well layer sandwiched between layers, with both sides sandwiched between non-doped AlGaAs layers, and further outside sandwiched between a p-type AlGaAs layer and an n-type AlGaAs layer.

The mesa is formed in a cylindrical shape, and has a diameter of about 1.5 μm. In the surface emitting laser having such a structure, since the side surfaces of the mesa are embedded with AlGaN having high thermal conductivity, the heat dissipation is excellent, and the maximum oscillation temperature is increased and the maximum light output is increased. In addition, since the crystal structure of the pn junction on the side of the mesa is buried in the same semiconductor layer, there is no leakage current due to surface recombination, low threshold operation is possible, and the reliability is excellent.

(Seventh Embodiment) FIG. 8 shows a seventh embodiment of the present invention.
FIG. 2 is a cross-sectional view illustrating a schematic configuration of a semiconductor laser according to the first embodiment.

In the figure, 700 is an n-type InP substrate, 701 is an n-type InP buffer / cladding layer, and 702 is InGaAs.
sP strained MQW active layer, 703 is a p-type InP cladding layer, 704 is a p-type InGaAs contact layer, 705 is a semi-insulating InP buried layer, 706 is a GaN buried layer, 707 is an AlN buried layer, 721 is a p-side electrode, 7
Reference numeral 22 denotes an n-side electrode.

The present embodiment is characterized in that the AlGaN buried layer has a two-layer structure of GaN and AlN. With such a two-layer structure, stress applied to the mesa including the active layer due to a difference in thermal expansion coefficient can be reduced, and the reliability of the element can be improved.

In the fifth to seventh embodiments, edge-emitting and surface-emitting semiconductor lasers have been described. However, the present invention can be applied to other semiconductor light-emitting devices in general.
That is, a light emitting diode of a surface emitting type or an edge emitting type,
The present invention can also be applied to an integrated light source in which an optical modulator and a semiconductor laser are integrated.

[0074]

As described above, according to the present invention, as a buried layer or an insulating layer, AlGaInN or H, O
Or AlGaIn to which at least one of C is added
By using N, a high-quality active layer can be obtained by suppressing the introduction of dislocations and strains on the other semiconductor side forming the active region, and the threshold value can be reduced and the reliability can be improved. Can be measured. Further, it becomes possible to form a region having high light and electric insulation, and it is possible to further improve thermal conductivity. For this reason, a high-output element with higher efficiency than the conventional one can be formed at a high density, and the degree of freedom in element design increases compared to the conventional one, so that a three-dimensional element can be obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a schematic configuration of a semiconductor laser array according to a first embodiment.

FIG. 2 is a perspective view showing a schematic configuration of a semiconductor device according to a second embodiment.

FIG. 3 is a sectional view showing a schematic configuration of a semiconductor device according to a third embodiment.

FIG. 4 is a sectional view showing a schematic configuration of a semiconductor device according to a fourth embodiment;

FIG. 5 is a sectional view showing a schematic configuration of a semiconductor laser according to a fifth embodiment.

FIG. 6 is a sectional view showing a manufacturing process of the laser according to the embodiment shown in FIG. 5;

FIG. 7 is a sectional view showing a schematic configuration of a semiconductor laser according to a sixth embodiment.

FIG. 8 is a sectional view showing a schematic configuration of a semiconductor laser according to a seventh embodiment.

FIG. 9 is a cross-sectional view showing the element structure of a conventional surface-emitting type semiconductor laser.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 101 ... p-type InP substrate 102 ... p-type InP buffer / cladding layer 103 ... strained multiple quantum well (MQW) active layer 104 ... n-type InP cladding layer 105 ... n-type InP contact layer 110 ... amorphous AlGaN buried layer 121 ... n-side electrode 122 p-side electrode 201 n-type InP substrate 202 n-type InP cladding layer 203 waveguide / modulation absorption layer 204 p-type InP cladding layer 205 p-side electrode metal 208 grating laser region 210 High resistance AlGaNOCH buried layer 221 modulator electrode 222 n-side electrode 223 laser electrode 225 electrode 301 SI-GaAs substrate 302 i-type GaAlAs buffer layer 303 InGaAs channel layer 304 AlGaAs spacer layer 305 AlGaAs carrier Supply layer 30 ... GaAs / GaInAs of the n ⁺ -type contact layer 310 ... amorphous AlNO insulating layer 321 ... gate electrode 322 ... source electrode 323 ... contact electrodes 327 ... isolation region

Continued on the front page (51) Int.Cl. ⁶ Identification code FI H01L 29/778 H01L 29/80 H 21/338 29/812 33/00

Claims (5)

[Claims] 1. A _{Al x Ga y In z N (} 0 <x <1,0 <
(y + z <1, x + y + z = 1) is used for a buried layer or an insulating layer. Wherein _{Al x Ga y In z N (} 0 ≦ (x, y,
z) ≦ 1, x + y + z = 1), wherein a layer to which H and O or H and C are added is used as a buried layer or an insulating layer. Wherein _{Al x Ga y In z N (} 0 <x <1,0 <
When growing a semiconductor layer consisting of y + z <1, x + y + z = 1), at least dimethylhydrazine, monomethylhydrazine, or tertiarybutylhydrazine is contained as a raw material of nitrogen, and an organic metal of Ga or Al is used as a raw material of Ga or Al, respectively. A method for manufacturing a semiconductor device, comprising using: 4. A semiconductor device in which a side surface of a multilayer film including an active layer is processed into a mesa shape, and the mesa side surface is buried with a buried layer containing AlGaN as a main component. A semiconductor element, wherein a semiconductor layer having the same crystal structure as a semiconductor forming an active layer is provided therebetween. 5. A semiconductor device in which side surfaces of a multilayer film including an active layer are processed into a mesa shape, and the mesa side surfaces are buried with a buried layer containing AlGaN as a main component, wherein the AlGaN buried layer has a composition. A semiconductor element formed of a plurality of different layers.