JPH11126977A - Manufacture of wiring substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent occurrence of dielectric breakdown and leakage current due to drop of electrical dielectric strength, by flattening one surface of an insulating substrate, laminating a conductor layer of specified pattern on the surface, laminating a high-dielectrics layer on a specified electrode of the conduc tor layer, and laminating an electrode layer on the dielectrics layer. SOLUTION: Related to a multi-layer ceramics wiring board 10, after a spin-on glass layer is formed on the surface of a ceramics substrate 11A of a top layer so as to flatten recesses and protrusions, the glass layer is polishing together with the recesses and the protrusions, so that the surface is flattened. After the surface of the ceramics substrate 11A of top layer is flattened, using a thin-film formation process, a barrier metal layer 20, a high-dielectrics layer of high-dielectrics material, and an upper part electrode layer 22 are sequentially laminated on a specified electrode of a conductor layer 12A formed on the surface, thus a capacitor 19 is formed. Thus, a high-capacity capacitor 19 of stable electric characteristics is provided inside the multi-layer ceramics wiring board 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[Table of Contents] The present invention will be described in the following order.

BACKGROUND OF THE INVENTION Prior Art (FIG. 6) Problems to be Solved by the Invention Means for Solving the Problems Embodiments of the Invention (1) Configuration of Multilayer Ceramic Wiring Board According to the Present Embodiment (FIG. 6) 1 and 2) (2) Manufacturing procedure of multilayer ceramic wiring board according to the present embodiment (FIGS. 3A to 5C) (3) Operation and effect of embodiment of the present invention (4) Others Embodiment Effects of the Invention

[0003]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a wiring board, and is preferably applied to, for example, a multilayer ceramic wiring board.

[0004]

2. Description of the Related Art Conventionally, as a multilayer ceramic wiring board, FIG.
Some are configured as follows. In the multilayer ceramic wiring board 1 having such a configuration, the glass ceramic substrate 2A
Conductor layer (wiring pattern) of desired pattern on one side of 2F
3A to 3I are formed, and a plurality of the glass ceramic substrates 2A to 2F are stacked and baked together with dielectric sheets 4A and 4B made of a dielectric material as necessary.

In this case, resistors 5A and 5B are formed on predetermined conductor layers 3B to 3H by printing a resistance material so as to electrically connect predetermined electrodes, and dielectric sheets 4A and 4B are formed. The electrodes 3BX and 3CX, 3FX and 3GX are opposed to the conductor layers 3B and 3C, 3F and 3G, respectively, with the dielectric sheets 4A and 4B interposed therebetween.
Is provided, these electrodes 3BX and 3C
Capacitors 6A and 6B composed of X, 3FX and 3GX and dielectric sheets 4A and 4B are formed.

As a result, in the multilayer ceramic wiring board 1 of this type, the number of resistors and capacitors mounted on the surface can be reduced by incorporating the resistors 5A and 5B and the capacitors 6A and 6B as described above. The surface can be used effectively.

[0007]

The capacity of a capacitor is inversely proportional to the distance between the electrodes and directly proportional to the dielectric constant of a dielectric disposed between the electrodes.

However, in such a multilayer ceramic wiring board 1, the dielectric sheets 4A and 4B are difficult to handle due to problems in handling, expansion coefficient and contraction rate.
In this case, a material having a thickness of about 12.5 to 100 [μm] and a relative permittivity of about 5 to 6 using alumina as a material is used, so that a high-capacity capacitor cannot be formed inside.

In practice, when dielectric sheets 4A and 4B are made of an alumina thin plate having a thickness of 50 μm and a dielectric constant of 7,
The obtained capacitance value is about 1.24 [pF / m ² ] per unit area, and the practical area per high dielectric capacitor that can be used in a small product is about 0.1 to 3 [mm] square by common sense. For this reason, the capacitance per one of these high dielectric capacitors is about 0.01 to 10 [pF].

In a telephone, for example, the capacitance of each capacitor used in a baseband circuit block (BB block) and a high-frequency circuit block (RF block) is about 1.0 to 1000000 [pF]. It is very difficult to apply such a high dielectric capacitor having a capacitance value of about 0.01 to 10 [pF].

For this reason, if the thickness of the dielectric sheets 4A and 4B can be reduced or the dielectric constant of the dielectric sheets 4A and 4B can be increased, a high dielectric material having a capacitance of about 0.01 to 10 [pF] can be obtained. It is thought that it can be applied to capacitors, but in practice, the conventional manufacturing process limits the thickness reduction, and high-permittivity materials do not always have the optimal thermal expansion coefficient, so free material selection is possible. As a result, it has been very difficult to reduce the thickness of the dielectric sheets 4A and 4B or to improve the dielectric constant.

Accordingly, for example, in a multilayer ceramic wiring board, if a high-capacity capacitor having stable electric characteristics can be formed therein, the number of capacitors mounted on the surface can be reduced or eliminated. For this reason, the mounting area required for mounting the capacitor can be omitted, and the entire multilayer ceramic wiring board can be reduced in size.

The present invention has been made in view of the above points, and it is an object of the present invention to propose a method of manufacturing a wiring board capable of forming a high-capacity capacitor having stable electric characteristics.

[0014]

In order to solve this problem, the present invention provides a first method for flattening one surface of an insulating substrate.
A second step of laminating and forming a conductor layer of a predetermined pattern on one surface of the insulating substrate; and a third step of laminating and forming a high dielectric layer made of a high dielectric material on a predetermined electrode of the conductor layer. And a fourth step of laminating and forming an electrode layer made of an electrode material on the high dielectric layer.

As a result, it is possible to form a high-capacity capacitor formed by sequentially laminating an electrode of a conductor layer, a high dielectric layer, and an electrode layer on one surface of the flattened insulating substrate,
Since electric field concentration does not occur in the high dielectric layer in the capacitor, it is possible to avoid the dielectric breakdown of the high dielectric layer due to a decrease in the electrical withstand voltage and to prevent the occurrence of a leak current. .

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings.

(1) Configuration of Multilayer Ceramic Wiring Board According to the Present Embodiment In FIG. 1, reference numeral 10 denotes a multilayer ceramic wiring board according to the present embodiment as a whole.
Conductor layers 12A-1 having a desired pattern on one side of A-11D
2F and the glass ceramic substrate 11
A to 11D are formed by stacking and sintering a plurality of sheets A to 11D with a dielectric sheet 13 made of a dielectric as necessary.

The uppermost glass ceramic substrate 11A
An insulator layer 14 made of a polyimide resin material or an epoxy resin material is formed on the surface of the substrate, and a conductor layer 17 having a desired pattern made of a desired electrode material such as gold is formed on the insulator layer 14 as an external electrode. Is formed.

In this case, each of the glass ceramic substrates 11A-
Conducting paths 15A for conducting connection between adjacent conductor layers 12A to 12F are respectively provided at predetermined positions of the insulating layer 14 and the insulating layer 14D.
To 15G, and some of the conductor layers 12A,
2B, resistors 16A to 16C are provided by printing a resistive material between predetermined electrodes.

The lowermost glass ceramic substrate 11D
A conductor layer 18 made of a desired electrode material such as gold is laminated and formed as an external electrode on the conductor layer 12F provided above via a barrier metal layer (not shown).

Further, the uppermost glass ceramic substrate 11
A capacitor 19 is provided on the conductor layer 12A provided on A by using a thin film forming process, and is electrically connected to a conductor layer 17 formed on the insulator layer 14 via a conduction path 15H.

In practice, in this capacitor 19, as shown in FIG. 2, the uppermost glass ceramic substrate 11A
A barrier metal layer 20 for preventing diffusion of copper and oxygen is formed on the conductor layer 12A provided thereon, and a high dielectric layer 21 made of a high dielectric material is laminated on the barrier metal layer 20. An upper electrode layer 22 made of an electrode material such as gold is formed on the high dielectric layer 21 by lamination.

In this case, the high dielectric layer 21 is made of tantalum oxide (relative permittivity 20 to 25), barium titanium oxide (BaTiO ₃ , relative permittivity 2000) or strontium titanium oxide (SrTiO ₃ , relative permittivity 150 to 200). ), Printing, spin coating, sputter or CVD
(Chemical Vapor Deposition) or the like, and is formed by supplying the barrier metal layer 20 with a film thickness of, for example, about 100 to 5000 [Å].

As a result, the multilayer ceramic wiring board 10
In the above, a high-capacity capacitor having a desired capacitance can be provided inside by selecting a high-dielectric material forming the high-dielectric layer 21 and a film thickness of the high-dielectric layer 21. It has been made like that.

In addition to the above structure, in the case of the multilayer ceramic wiring board 10, resists 25 and 26 are applied to the insulator layer 14 and the lowermost glass ceramic substrate 11D, respectively.

(2) Manufacturing Procedure of Multilayer Ceramic Wiring Board According to the Present Embodiment Here, such a multilayer ceramic wiring board 10 is shown in FIG.
It can be manufactured by the following procedures shown in FIGS.

That is, first, ceramic material powders such as alumina, borosilicate oxide, and silicon oxide (the average particle diameter of the powder is about 5 μm) are mixed, and kneaded by adding a solvent such as water or alcohol. The kneaded body thus obtained is extended to form a thin plate (for example, having a thickness of 12 to 200 [μm] and a length and width of 5 to 200 [cm]).

Next, this thin plate is tens to hundreds of degrees (50 to 400 degrees).
By heating to about [° C.] to evaporate most of the solvent, glass ceramic substrates 11A to 11D having a certain strength as shown in FIG. 3A are formed.

Here, the surface 11AX of the glass ceramic substrate 11A (11B to 11D) obtained in this way.
(11BX to 11DX), as shown in FIG. 4A, a plurality of irregularities 11AT having a size of about several [μm].
(11BT-11DT) are formed over the whole.

Therefore, as shown in FIG. 4B, first, the surface 11AX of the glass ceramic substrate 11A to be the uppermost layer is formed.
Then, an organic solution such as alkoxide silane / alcohol is applied using a spinner so as to cover the irregularities 11AT on the surface 11AX, and then several tens to three hundred degrees (50 to 400 degrees).
[° C.]) to evaporate most of the solvent such as alcohol.

Subsequently, as shown in FIG. 4C, the surface 11AX of the glass ceramic substrate 11A is heated to several hundred degrees to solidify a glass layer having a thickness of about several μm. Thereby, a glassy insulating film having a certain degree of strength (hereinafter referred to as a spin-on-glass (Spin on Glass) layer) 3
1 is obtained.

The spin-on glass layer 31 has undulations corresponding to the irregularities 11AT on the surface 11AX of the glass ceramic substrate 11A. In order to remove the undulations, for example, as shown in FIG. The surface of the spin-on glass layer 31 is polished using the polishing means 32. At this time, the irregularities 11AT are polished together with the spin-on glass layer 31 so that the thickness of the glass ceramic substrate 11A becomes a desired value (for example, line AA ').

Next, as shown in FIG. 3B, one or both surfaces of the glass ceramic substrate 11A and the other glass ceramic substrates 11B to 11D contain a conductive material made of a single or compound of gold, copper, platinum or tungsten. The conductor layers 12A to 12F having a desired pattern are formed using the solution.

In this case, each of the conductor layers 12A to 12F has a line width of 10 to 1000 μm using a technique such as printing or spin coating.
m], a wiring pattern having a thickness of about 0.1 to 50 [μm], and then heating to several tens to several hundred degrees (about 50 to 400 [° C.]) to evaporate most of the solvent. Can be.

By such a procedure, the desired number of glass ceramic substrates 11A to 11D on which the conductor layers 12A to 12F having a desired pattern are formed can be formed.

Subsequently, as shown in FIG. 3C, each of the ceramic substrates 11A to 11A manufactured as described above is formed.
D, a hole is formed at a predetermined position with a punch or the like, and then the hole is filled with a conductive material to form a predetermined conductor layer 12A-1.
Conduction paths 15A to 15G for conducting connection between 2F are formed.

Thereafter, each of the ceramic substrates 11
After superimposing the ceramic substrates 11A to 11D while positioning them, the ceramic substrates 11A to 11D are heated to a few hundred degrees (400 to 1300 [° C.]) while holding the ceramic substrates so as not to be displaced, and the solvent is evaporated. The multilayer ceramic wiring board 30 as shown in FIG. 3 (D) is formed by hardening, lowering the resistance of the conductive material, and stabilizing the resistance of the resistor thin film. Note that the heat treatment is performed in a reducing atmosphere containing hydrogen or an inert atmosphere such as nitrogen.

Thereafter, in order to improve the surface characteristics of the uppermost conductive layer 12A of the multilayer ceramic wiring board 30, a metal layer made of gold, palladium, platinum or the like is formed on the conductive layer 12A as necessary. I do.

Subsequently, as shown in FIG. 5A, tungsten, ruthenium, ruthenium oxide, or the like is coated on the uppermost conductive layer 12A of the multilayer ceramic wiring board 30 by using a technique such as printing, sputtering, or CVD. Wear
This is subjected to a high-temperature oxidation treatment (a heat treatment in an oxygen-containing atmosphere at 300 to 850 ° C. for about 0.1 to 180 minutes) to form a barrier metal layer 20 with a thickness of about 0.005 to 10 μm.

Next, tantalum oxide or barium titanium is formed on the barrier metal layer 20 laminated on a predetermined electrode in the uppermost conductor layer 12A of the multilayer ceramic wiring board 30 by a technique such as printing, spin coating, sputtering or CVD. A high dielectric layer 21 made of a high dielectric material such as oxide is formed. At this time, the thickness, the dielectric constant, the tan σ, the withstand voltage and the like of the high dielectric layer 21 are selected to be optimal values according to the requirements.

Subsequently, the multilayer ceramic wiring board 30 on which the high dielectric layer 21 is formed is heat-treated for about 0.1 to 180 minutes in a predetermined atmosphere such as an oxygen atmosphere at 300 to 800 ° C. After the electrical characteristics of the dielectric layer 21 are improved, the upper electrode layer 22 is formed on the high dielectric layer 21 using a desired electrode material such as gold. Thereby, the capacitor 19 can be obtained.

At this time, if necessary, the resistor 16A is formed by supplying a ruthenium oxide or the like between predetermined electrodes of the conductor layer 12A provided on the uppermost layer of the multilayer ceramic wiring board 30.

Thereafter, in order to improve the electric characteristics of the high dielectric layer 21 of the capacitor 19, the temperature is set at 200 to 500 ° C.
Heat treatment is performed for about 0.1 to 180 minutes, and thereafter, if necessary, trimming of the capacity of the capacitor 19 and the resistance value of the resistor 16A is performed.

Subsequently, as shown in FIG. 5 (B), the surface of the multilayer ceramic wiring board 30 (the glass ceramic substrate 1).
An insulating layer 14 made of an insulating resin material such as polyimide or epoxy resin is formed on the surface 11AX) of the capacitor 1A by a technique such as printing, spin coating, or laminating so that the upper electrode layer 22 of the capacitor 19 is not exposed. Thereafter, through holes are formed at predetermined positions of the insulator layer 14 by using a conventional method.

At this time, for example, when photosensitive polyimide or epoxy resin is used as the material of the insulator layer 14, the corresponding position is irradiated with ultraviolet rays or the like, developed, and then heated by a heat treatment of several hundred degrees. Is cured to form a through hole.

Thereafter, the insulating layer 14 is thus formed.
The conductor layer 17 having a desired pattern is formed on the surface of the multilayer ceramic wiring board 30 (that is, the surface of the insulator layer 14) on which the conductor layers 17 are laminated by using a method such as printing or plating. The conductive path 15H is formed by filling with a conductive material. Thereafter, resists 25 and 26 are applied to the uppermost layer and the lowermost layer of the multilayer ceramic wiring board 30 so that the conductor layers 17 and 18 are exposed, respectively. Thus, a multilayer ceramic wiring board 10 as shown in FIG. 5C can be obtained.

(3) Operation and Effect of the Embodiment of the Present Embodiment In the above configuration, in the multilayer ceramic wiring board 10 according to this embodiment, the predetermined electrodes of the conductor layer 12A laminated on the uppermost ceramic substrate 11A A barrier metal layer 20 and a high dielectric layer 21 made of a high dielectric material
And the upper electrode layer 22 are sequentially laminated to form the capacitor 19.

Therefore, in the multilayer ceramic wiring board 10, since the high dielectric layer 21 of the capacitor 19 does not form one layer of the multilayer ceramic wiring board, the material of the high dielectric layer 21 has a coefficient of thermal expansion and A material having a desired and high dielectric constant can be used without considering the shrinkage factor, and the high-dielectric layer 21 having a small thickness is formed as much as the high-dielectric layer 21 is formed using the thin-film forming process. Therefore, a capacitor 19 having a high capacity and a desired capacity can be formed.

In this multilayer ceramic wiring board 10,
The unevenness 1 on the surface 11AX of the uppermost ceramic substrate 11A.
After forming the spin-on glass layer 31 so as to cover the 1AT, the surface 11AX can be planarized by polishing the spin-on glass layer 31 together with the irregularities 11AT.

When the capacitor 19 is formed using the conductor layer 12A formed on the flat surface 11AX as a lower electrode, electric field concentration may occur in the high-dielectric layer 21 having a small thickness in the capacitor 19. Therefore, it is possible to prevent the dielectric breakdown of the high dielectric layer 21 due to a decrease in the electrical withstand voltage and to prevent the occurrence of a leak current, and thus to stabilize the electrical characteristics of the capacitor 19. .

According to the above configuration, after the surface 11AX of the uppermost ceramic substrate 11A is flattened,
On a predetermined electrode of the conductor layer 12A formed on the 1AX, a barrier metal layer 20, a high dielectric layer 21 made of a high dielectric material, and an upper electrode layer 22 are sequentially laminated by a thin film forming process. By forming the capacitor 19 in this manner, a high-capacity capacitor 19 having stable electric characteristics can be provided inside the multilayer ceramic wiring board 10.

(4) Other Embodiments In the above embodiment, tungsten, ruthenium, ruthenium oxide RuOx (X = 0.05 to 2.0) or the like is applied as the material of the barrier metal layer 20 of the capacitor 19. However, the present invention is not limited to this, and the point is that if the material is capable of preventing the diffusion of copper and oxygen, the material of the barrier metal layer 20 may be Ir-Hf-Ox, PdRhO, PdRuO, Ti / Ir-Hf-Ox / I
r, Ti / Ir-Hf-Ox / Pt, Ti / Ir-Hf-Ox / Ti / Pt, Ti / Ir-Hf-Ox
Various materials such as / Ti / Ir can be applied. The barrier metal layer 20 may have a multilayer thin film structure by combining thin films made of these materials.

In the above embodiment, the case where tantalum oxide, BaTiO _3, SrTiO ₃ (STO), or the like is applied as the material of the high dielectric layer 21 of the capacitor 19 has been described. The material of the high dielectric layer 21 is not limited to this, and other materials such as BaSrTiO ₃ (BST, relative permittivity 500 to 860), PdLaZrTiO ₃ (PLZT, relative permittivity 750)
4000), can be applied a variety of high dielectric material such as PdTiO ₃ (relative permittivity 100-200). Further, as a material of the high dielectric layer 21 of the capacitor 19, a perovskite structure dielectric material similar to the high dielectric material, such as PdZrTiO ₃ (PZT, relative dielectric constant of 350 to 1000), may be used. At this time, an optimum material and composition can be selected for tan σ as necessary, and a plurality of compositions, thicknesses and areas can be created and selected.

Further, in the above embodiment, the case where the capacitor 19 according to the present invention is formed on the surface of the multilayer ceramic wiring board 30 has been described, but the present invention is not limited to this, and the multilayer ceramic wiring board is not limited to this. 30 may be formed inside.

Further, in the above-described embodiment, the case where the present invention is applied to the multilayer ceramic wiring board 10 has been described. However, the present invention is not limited to this, and may be applied to various other multilayer wiring boards. be able to.

Further, in the above embodiment, the case where the present invention is applied to the multilayer ceramic wiring board 10 has been described. However, the present invention is not limited to this, and is applicable to various single-layer wiring boards. can do.

Further, in the above-described embodiment, the case where the insulating layer 14 made of a resin material is formed on the surface of the glass ceramic substrate 11A as the outermost layer of the multilayer ceramic wiring board 30 has been described. The invention is not limited to this, and various other materials can be applied as the material of the insulator layer 14. In this case, when the capacitor 19 according to the present embodiment is formed inside the multilayer ceramic wiring board 30, the upper glass ceramic substrates 11A to 11D
Becomes an insulator layer.

Further, in the above-described embodiment, the case where the spin-on glass layer 31 made of glass is formed on the surface 30A of the multilayer ceramic wiring board 30 has been described. Various other insulating materials can be used as the material of the layer 31.

Further, in the above-described embodiment, the case where the high dielectric layer 21 of the capacitor 19 is formed after forming the barrier metal layer 20 on the conductor layer 12A on the surface of the multilayer ceramic wiring board 30 is described. However, the present invention is not limited to this, and the barrier metal layer 20 may be omitted when the conductive layer 12A is formed using a conductive material that is hardly oxidized.

[0060]

As described above, according to the present invention, in a method of manufacturing a wiring board, a first step of flattening one surface of an insulating substrate, and laminating a conductor layer of a predetermined pattern on one surface of the insulating substrate. A second step, and a third step of laminating and forming a high dielectric layer made of a high dielectric material on a predetermined electrode of the conductor layer;
By providing the fourth step of laminating and forming an electrode layer made of an electrode material on the high dielectric layer, the conductive layer electrode and the high dielectric layer are formed on one surface of the flattened insulating substrate. And an electrode layer are sequentially laminated to form a high-capacity capacitor. As a result, electric field concentration does not occur in the high dielectric layer in this capacitor,
Wiring that can prevent the high dielectric layer from being broken down due to a decrease in the electrical withstand voltage and generating a leak current, and thus forming a high-capacitance capacitor with stable electrical characteristics. A plate manufacturing method can be realized.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a configuration of a multilayer ceramic wiring board according to the present embodiment.

FIG. 2 is a sectional view showing a configuration of a capacitor according to the present embodiment.

FIG. 3 is a cross-sectional view for explaining a manufacturing procedure of the multilayer ceramic wiring board according to the embodiment;

FIG. 4 is a cross-sectional view for describing a planarization process according to the embodiment;

FIG. 5 is a cross-sectional view for explaining a manufacturing procedure of the multilayer ceramic wiring board according to the present embodiment;

FIG. 6 is a cross-sectional view showing one configuration example of a conventional multilayer ceramic wiring board.

[Explanation of symbols]

10, (30) ... multilayer ceramic wiring board, 11A-1
1D: glass ceramic substrate, 12A to 12F, 1
7, 18 ... conductor layer, 14 ... insulator layer, 15A to 15
H: conduction path, 16A to 16C: resistor, 19: capacitor, 20: barrier metal layer, 21: high dielectric layer, 22: upper electrode layer, 31: spin-on glass layer, 32 ... ... polishing means.

Claims (3)

[Claims] A first step of flattening one surface of the insulating substrate; a second step of laminating and forming a conductor pattern having a predetermined pattern on the one surface of the insulation substrate; A wiring, comprising: a third step of laminating and forming a high dielectric layer made of a dielectric material; and a fourth step of laminating and forming an electrode layer made of an electrode material on the high dielectric layer. Plate manufacturing method. 2. The method according to claim 1, wherein in the first step, an insulating layer made of an insulating material is formed on the one surface of the insulating substrate, and then the insulating layer is polished. Manufacturing method of wiring board. 3. In the second step, a barrier metal layer made of a predetermined material for preventing oxidation is laminated on the conductor layer. In the third step, the high dielectric layer is 2. The method for manufacturing a wiring board according to claim 1, wherein the conductive layer is formed on the predetermined electrode via a layer.