JPH0687493B2 - Thin film capacitors - Google Patents
Thin film capacitorsInfo
- Publication number
- JPH0687493B2 JPH0687493B2 JP2057059A JP5705990A JPH0687493B2 JP H0687493 B2 JPH0687493 B2 JP H0687493B2 JP 2057059 A JP2057059 A JP 2057059A JP 5705990 A JP5705990 A JP 5705990A JP H0687493 B2 JPH0687493 B2 JP H0687493B2
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- JP
- Japan
- Prior art keywords
- film
- thin film
- dielectric
- lower electrode
- rhenium
- Prior art date
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Description
【発明の詳細な説明】 (産業上の利用分野) 本発明は、小型電子回路に用いる薄膜コンデンサに関す
る。Description: TECHNICAL FIELD The present invention relates to a thin film capacitor used in a small electronic circuit.
(従来の技術) 集積回路技術の発達によって電子回路がますます小型化
しており、各種電子回路に必須の回路素子であるコンデ
ンサの小型化も一段と重要になっている。誘電体薄膜を
用いた薄膜コンデンサが、トランジスタ等の能動素子と
同一の基板上に形成されて利用されているが、能動素子
の小型化が急速に進む中で薄膜コンデンサの小型化は遅
れており、より一層の高集積化を阻む大きな要因となっ
てきている。これは、従来用いられている誘電体薄膜材
料がSiO2、Si3N4等のような誘電率がたかだか10以下の
材料に限られているためであり、薄膜コンデンサを小型
化する手段として誘電率の大きな誘電体薄膜を開発する
ことが必要となっている。化学式ABO3で表されるペロブ
スカイト型酸化物であるBaTiO3、SrTiO3、PbZrO3および
イルメナイト型酸化物LiNbO3あるいはBi4Ti3O12等の強
誘電体に属する酸化物は、上記の単一組成並びに相互の
固溶体組成で、単結晶あるいはセラミックにおいて100
以上10000にも及ぶ誘電率を有することが知られてお
り、セラミック・コンデンサに広く用いられている。こ
れら材料の薄膜化は上述の薄膜コンデンサの小型化に極
めて有効であり、かなり以前から研究が行われている。
それらの中で比較的良好な特性が得られている例として
は、プロシーディング・オブ・アイ・イー・イー・イー
(Proceedings of the IEEE)第59巻10号1440−1447頁
に所載の論文があり、スパッタリングによる成膜および
熱処理を行ったBaTiO3薄膜で16(室温で作成)から1900
(1200℃で熱処理)の誘電率が得られている。(Prior Art) With the development of integrated circuit technology, electronic circuits are becoming smaller and smaller, and miniaturization of capacitors, which are circuit elements essential for various electronic circuits, is becoming more important. Thin film capacitors using dielectric thin films are used by being formed on the same substrate as active elements such as transistors, but miniaturization of thin film capacitors has been delayed due to rapid miniaturization of active elements. , Has become a major factor preventing further high integration. This is because the conventionally used dielectric thin film materials are limited to materials with a dielectric constant of at most 10 such as SiO 2 , Si 3 N 4, etc. It is necessary to develop a dielectric thin film with a high rate. BaTiO 3 , which is a perovskite type oxide represented by the chemical formula ABO 3 , SrTiO 3 , PbZrO 3 and ilmenite type oxides such as LiNbO 3 or Bi 4 Ti 3 O 12 are ferroelectric oxides belonging to the above single Composition and mutual solid solution composition, 100 in single crystal or ceramic
It is known to have a dielectric constant as high as 10,000, and is widely used in ceramic capacitors. Thinning of these materials is extremely effective for miniaturization of the above-mentioned thin film capacitor, and research has been conducted for quite some time.
Among these, examples in which relatively good characteristics have been obtained are the papers published in Proceedings of the IEEE Vol. 59, No. 10, pp. 1404-1447. There is a sputtered and heat-treated BaTiO 3 thin film from 16 (created at room temperature) to 1900
A dielectric constant of (heat treated at 1200 ° C) is obtained.
(発明が解決しようとする課題) 上記のような従来作成されているBaTiO3等の誘電体薄膜
は、高い誘電率を得るためには薄膜作成時に高温を必要
とし、いずれも白金、パラジウム等の高融点貴金属材料
からなる下部電極の上に作成されたものである。一般に
電極材料として用いられるアルミニウムやニクロム、銅
などでは、高温での電極の蒸発や誘電体膜との相互反応
により誘電率の著しい低下を招く。しかし、上記のよう
な高融点貴金属電極でも、300℃以上での誘電体成膜に
おいて、再結晶による電極表面荒れを生じる。このよう
な電極上に形成された誘電体膜は膜厚が一様でなく、電
圧を印加したときに膜厚が薄い部分に電界が強くかかる
ために絶縁特性に問題がある。(Problems to be Solved by the Invention) Dielectric thin films such as BaTiO 3 that have been conventionally produced as described above require high temperature at the time of thin film formation in order to obtain a high dielectric constant. It is formed on the lower electrode made of a high melting point precious metal material. Aluminum, nichrome, copper, etc., which are generally used as electrode materials, cause a significant decrease in the dielectric constant due to evaporation of the electrodes at high temperatures and mutual reaction with the dielectric film. However, even with the high melting point noble metal electrode as described above, the surface of the electrode is roughened by recrystallization in the dielectric film formation at 300 ° C. or higher. The dielectric film formed on such an electrode has a non-uniform film thickness, and when a voltage is applied, the electric field is strongly applied to a portion having a small film thickness, so that there is a problem in insulation characteristics.
現在の高集積回路に広く用いられている電極材料は多結
晶シリコンあるいはシリコン基板自体の一部に不純物を
高濃度にドーピングした低抵抗シリコン層である。以下
これらを総してシリコン電極と呼ぶ。シリコン電極は微
細加工技術が確立されており、すでに広く用いられてい
るため、シリコン電極上に良好な高誘電率薄膜が作製で
きれば、集積回路用コンデンサへの利用が可能となる。
しかしながら、従来技術では例えばIBM・ジャーナル・
オブ・リサーチ・アンド・ディベロップメント(IBM Jo
urnal of Research and Development)1969年11月号686
−695頁に所載のSrTiO3膜に関する論文において687−68
8頁の記載に、シリコン上に高誘電率材料の薄膜を形成
する場合には約100Åの二酸化シリコン(SiO2)に等価
な層が界面に形成されてしまうと報告されている。この
界面層は誘電率が低い層であるため、結果としてシリコ
ン上に形成した高誘電率薄膜の実効的な誘電率は大きく
低下してしまい、高誘電率材料を用いる利点がほとんど
損なわれていた。同様の報告の他の例としてはジャーナ
ル・オブ・バキューム・サイエンス・アンド・テクノロ
ジー(Jouenal of Vacuum Science and Technology)第
16巻2号315−318頁に所載のBaTiO3に関する論文におい
て、316頁の記載に見ることができる。The electrode material widely used in the present highly integrated circuits is polycrystalline silicon or a low resistance silicon layer in which a part of the silicon substrate itself is highly doped with impurities. Hereinafter, these are collectively called a silicon electrode. Since a fine processing technology has been established for silicon electrodes and is already widely used, if a good high-dielectric-constant thin film can be formed on silicon electrodes, it can be used for capacitors for integrated circuits.
However, in the prior art, for example, IBM
Of Research and Development (IBM Jo
urnal of Research and Development) November 1969 686
In the paper on SrTiO 3 film on page −695, 687−68
It is reported in the description on page 8 that when forming a thin film of a high dielectric constant material on silicon, a layer equivalent to about 100 Å of silicon dioxide (SiO 2 ) is formed at the interface. Since this interface layer has a low dielectric constant, the effective dielectric constant of the high-dielectric-constant thin film formed on silicon was greatly reduced as a result, and the advantage of using a high-dielectric constant material was almost lost. . Another example of a similar report is the Journal of Vacuum Science and Technology.
It can be found in the description on page 316 in the article on BaTiO 3 published in Vol. 16, No. 2, pp. 315-318.
本発明はBaTiO3、SrTiO3に代表される高誘電率材料の薄
膜を用いて、高い容量密度と優れた絶縁特性を有し、シ
リコン集積回路に適用可能な薄膜コンデンサを実現する
ことを目的としている。An object of the present invention is to realize a thin film capacitor having high capacitance density and excellent insulating properties, which can be applied to a silicon integrated circuit, by using a thin film of a high dielectric constant material typified by BaTiO 3 and SrTiO 3. There is.
(課題を解決するための手段) 本発明は基板上に形成され、下部電極、誘電体、上部電
極が順次積層形成された構造の薄膜コンデンサにおい
て、誘電体を直接成膜する下部電極がレニウム、レニウ
ムシリサイド、オスミウム、酸化オスミウム、オスミウ
ムシリサイド、酸化ロヂウム、ロヂウムシリサイド、酸
化イリヂウム、イリヂウムシリサイドのいずれかからな
るか、もしくはレニウム、オスミウム、ロヂウム、イリ
ヂウム、及びこれらのシリサイドあるいは酸化物のうち
の2以上よりなることを特徴とする薄膜コンデンサであ
る。(Means for Solving the Problems) The present invention is a thin film capacitor having a structure in which a lower electrode, a dielectric, and an upper electrode are sequentially stacked on a substrate, and the lower electrode for directly depositing the dielectric is rhenium, Rhenium silicide, osmium, osmium oxide, osmium silicide, rhodium oxide, rhodium silicide, iridium oxide, iridium silicide, or rhenium, osmium, rhodium, iridium, and their silicides or oxides It is a thin film capacitor characterized by comprising two or more of them.
(実施例1) 以下、本発明の実施例について図面を参照して説明す
る。Example 1 Hereinafter, an example of the present invention will be described with reference to the drawings.
第1図は実施例1の薄膜コンデンサの構造図で、シリコ
ン基板1の表面に絶縁層として酸化シリコン膜2が形成
され、酸化シリコン層上に下部電極3が形成され、下部
電極上に誘電体のBaTiO3膜4が形成され、その上に上部
電極のAl膜5が形成されている。FIG. 1 is a structural diagram of a thin film capacitor of Example 1, in which a silicon oxide film 2 is formed as an insulating layer on a surface of a silicon substrate 1, a lower electrode 3 is formed on the silicon oxide layer, and a dielectric is formed on the lower electrode. BaTiO 3 film 4 is formed, and the Al film 5 of the upper electrode is formed thereon.
まず、水蒸気熱酸化法により単結晶シリコンの表面に酸
化シリコン層を1μm形成した。雰囲気は酸素ガスと水
素ガスの流量比をそれぞれ1:1に制御し、温度は1100℃
で熱酸化を行った。下部電極は直流マグネトロンスパッ
タ法で0.5μmの膜厚のものを作製した。ReまたはReSi2
組成のターゲットを用い、Arガス雰囲気またはArとO2の
混合ガス雰囲気、4×10-3Torr、基板温度100℃で行っ
た。BaTiO3膜は化学量論組成の粉末ターゲットを用い、
高周波マグネトロンスパッタ法で0.5μmの膜厚のもの
を作製した。Ar−O2混合ガス中、1×10-2Torr、基板温
度600℃でスパッタ成膜した。上部電極には0.5μmのAl
を直流スパッタ法により成膜した。本コンデンサの有効
面積は3×5mm2である。つぎに下部電極に、高融点貴
金属であるPd膜を用いた場合と本方法の膜を用いた場合
のBaTiO3膜の特性の違いについて述べる。第2図(a)
は本方法の下部電極膜を用いた場合のBaTiO3膜の、第2
図(b)は膜厚0.5μmのPd膜を用いた場合のBaTiO3膜
の絶縁破壊強度のヒストグラムである。絶縁破壊強度は
1×10-4A/cm2の電流が流れたときの電界強度と定義し
た。絶縁破壊強度は本方法の方が3倍以上大きく、か
つ、その分布にばらつきがなく、優れた絶縁特性を示し
ている。First, a silicon oxide layer having a thickness of 1 μm was formed on the surface of single crystal silicon by a steam thermal oxidation method. The atmosphere controls the flow ratio of oxygen gas and hydrogen gas to 1: 1 respectively, and the temperature is 1100 ° C.
Thermal oxidation was performed at. The lower electrode was manufactured by DC magnetron sputtering to have a film thickness of 0.5 μm. Re or ReSi 2
Using a target having the composition, an Ar gas atmosphere or a mixed gas atmosphere of Ar and O 2 was used at 4 × 10 −3 Torr and a substrate temperature of 100 ° C. For the BaTiO 3 film, a stoichiometric powder target was used.
A film having a thickness of 0.5 μm was produced by the high frequency magnetron sputtering method. Sputter deposition was performed at 1 × 10 -2 Torr and a substrate temperature of 600 ° C. in an Ar—O 2 mixed gas. 0.5 μm Al for the upper electrode
Was formed by a DC sputtering method. The effective area of this capacitor is 3 × 5 mm 2 . Next, the difference in the characteristics of the BaTiO 3 film when the Pd film which is a high melting point noble metal is used for the lower electrode and when the film of this method is used will be described. Fig. 2 (a)
Is the second of the BaTiO 3 film when the lower electrode film of this method is used.
FIG. 6B is a histogram of the dielectric breakdown strength of the BaTiO 3 film when a Pd film having a film thickness of 0.5 μm is used. The dielectric breakdown strength is defined as the electric field strength when a current of 1 × 10 −4 A / cm 2 flows. The dielectric breakdown strength of the present method is three times or more larger, and the distribution thereof does not vary, showing excellent insulation characteristics.
BaTiO3膜の一部をエッチングで除去し、下部電極の表面
粗さを触針式表面段差計で測定したところ、レニウムな
どの膜とPd膜の平均粗さRaは、それぞれ、50Å、380Å
であり、レニウムなどの膜の方が表面平坦性に優れてい
ることがわかった。なお、BaTiO3を成膜する前の下部電
極の表面粗さはそれぞれ30Å程度である。従って、両者
の絶縁特性の違いはBaTiO3成膜の高温プロセスでの下部
電極の表面粗れに起因していると考えられる。この場
合、下部電極としてレニウム、酸化レニウム、レニウム
シリサイド、またはこれらの積層構造においても効果は
同じであった。When a part of the BaTiO 3 film was removed by etching and the surface roughness of the lower electrode was measured with a stylus surface profilometer, the average roughness Ra of the film such as rhenium and the Pd film was 50Å and 380Å, respectively.
It was found that the film made of rhenium or the like had better surface flatness. The surface roughness of the lower electrode before forming the BaTiO 3 film is about 30Å. Therefore, it is considered that the difference in the insulating properties between the two is due to the surface roughness of the lower electrode in the high temperature process of BaTiO 3 film formation. In this case, the same effect was obtained with rhenium, rhenium oxide, rhenium silicide, or a laminated structure of these as the lower electrode.
また、本実施例のレニウム、酸化レニウム、レニウムシ
リサイドの代わりにオスミウム、ロヂウム、イリヂウ
ム、及びそれらのシリサイドあるいは酸化物を用いた場
合でも、その上に形成されたBaTiO3膜の絶縁破壊強度が
従来のPd膜を用いた場合よりも3倍以上大きく、優れた
絶縁性が得られた。第1表に下部電極材料とその上に形
成されたBaTiO3膜の絶縁破壊強度をまとめた。Further, in the case of using osmium, rhodium, iridium, and their silicides or oxides instead of rhenium, rhenium oxide, and rhenium silicide of this embodiment, the dielectric breakdown strength of the BaTiO 3 film formed thereon is The Pd film was more than 3 times larger than that using the Pd film, and excellent insulating properties were obtained. Table 1 summarizes the dielectric breakdown strength of the lower electrode material and the BaTiO 3 film formed thereon.
(実施例2) 第3図は実施例2の薄膜コンデンサの構造図で、単結晶
シリコン基板6の表面に絶縁層として酸化シリコン層7
が形成され、酸化シリコン層上に下部電極として多結晶
シリコン膜8とその上にレニウムなどの膜9が形成さ
れ、これら下部電極上に誘電体のBaTiO3膜10が形成さ
れ、その上に上部電極のAl膜11が形成されている。 (Embodiment 2) FIG. 3 is a structural diagram of a thin film capacitor of Embodiment 2, in which a silicon oxide layer 7 as an insulating layer is formed on the surface of a single crystal silicon substrate 6.
Is formed, a polycrystalline silicon film 8 is formed as a lower electrode on the silicon oxide layer, and a film 9 made of rhenium or the like is formed thereon, a dielectric BaTiO 3 film 10 is formed on these lower electrodes, and an upper film is formed thereon. The Al film 11 of the electrode is formed.
多結晶シリコン膜はプラスマCVD法により、300℃で膜厚
0.3μmのものを作製した。この多結晶シリコン膜にヒ
素イオンを70KVの加速電圧で2×1016cm-2の量をイオン
注入し、更に900℃で20分間熱処理することにより約100
Ω/□のシート抵抗とした。その他の膜の成膜は実施例
1と同様に行った。Polycrystalline silicon film is formed at 300 ℃ by plasma CVD method
A film having a thickness of 0.3 μm was produced. Arsenic ions were implanted into this polycrystalline silicon film at an acceleration voltage of 70 KV in an amount of 2 × 10 16 cm -2 , and then heat-treated at 900 ° C. for 20 minutes to obtain about 100
The sheet resistance was Ω / □. Other films were formed in the same manner as in Example 1.
この場合、多結晶シリコン膜は絶縁層の酸化シリコンと
下部電極との密着性を良くするために用いているが、レ
ニウムなどの膜を多結晶シリコン膜の上に形成しても、
実施例1と同様に優れた絶縁特性を有する薄膜コンデン
サが得られた。なお、レニウムまたは酸化レニウムの場
合には多結晶シリコンの代わりに、レニウムシリサイド
などのメタルシリサイドとレニウムもしくは多結晶シリ
コンなどを含む多層膜でもよい。In this case, the polycrystalline silicon film is used to improve the adhesion between the silicon oxide of the insulating layer and the lower electrode, but even if a film of rhenium or the like is formed on the polycrystalline silicon film,
As in Example 1, a thin film capacitor having excellent insulating properties was obtained. In the case of rhenium or rhenium oxide, a multilayer film containing metal silicide such as rhenium silicide and rhenium or polycrystalline silicon may be used instead of polycrystalline silicon.
(実施例3) 第4図は実施例3の薄膜コンデンサの構造図である。単
結晶シリコン12の表面の一部にリンを高濃度にドーピン
グして低抵抗層13が形成され、その上に層間絶縁膜とし
て酸化シリコン膜14が形成されている。酸化シリコン膜
の一部は、低抵抗層を通じて下部電極を引き出すための
コンタクトホールが2箇所形成されており、一方のコン
タクトホールは下部電極膜15で埋められ、もう一方のコ
ンタクトホールはAl膜16で埋められている。従って、Al
膜16は下部電極の端子となる。下部電極膜はコンタクト
ホールを埋めると共にその一部が酸化シリコン膜上へ形
成されていてもよい。下部電極膜上にはBaTiO3膜17が形
成され、その上には上部電極としてA18が形成されて
いる。Example 3 FIG. 4 is a structural diagram of a thin film capacitor of Example 3. A low resistance layer 13 is formed by doping phosphorus at a high concentration on a part of the surface of the single crystal silicon 12, and a silicon oxide film 14 is formed thereon as an interlayer insulating film. In a part of the silicon oxide film, two contact holes for leading out the lower electrode through the low resistance layer are formed, one contact hole is filled with the lower electrode film 15, and the other contact hole is the Al film 16 It is filled with. Therefore, Al
The film 16 serves as a terminal of the lower electrode. The lower electrode film may fill the contact hole and a part thereof may be formed on the silicon oxide film. A BaTiO 3 film 17 is formed on the lower electrode film, and A 18 is formed thereon as an upper electrode.
本実施例では下部電極を単結晶シリコンの低抵抗層を通
じて引き出すために、下部電極膜を単結晶シリコンの上
に作製しているが、その薄膜コンデンサの絶縁特性は実
施例1と同様に優れていることを確認した。In this embodiment, the lower electrode film is formed on the single crystal silicon in order to draw the lower electrode through the low resistance layer of the single crystal silicon. However, the insulation characteristics of the thin film capacitor are similar to those of the first embodiment. I confirmed that.
次に下部電極に多結晶シリコン膜を用いた場合と本発明
の膜を用いた場合のBaTiO3膜の誘電率の違いについて述
べる。多結晶シリコン膜は現在のシリコンLSIの電極膜
として一般に用いられている材料である。第5図はBaTi
O3膜の誘電率と膜厚の関係を調べたもので、本発明の膜
を用いた場合(a)と多結晶シリコン膜(b)を用いた
場合の結果である。本発明の膜を用いた場合、BaTiO3膜
の誘電率はその膜厚に依存せず、約240で一定であるの
に対して、多結晶シリコン膜を用いた場合のBaTiO3膜の
誘電率は膜厚に依存し、、膜厚が薄くなるにつれて誘電
率が小さくなっている。これは従来技術で述べたよう
に、低誘電率の酸化シリコン膜がBaTiO3と多結晶シリコ
ンとの界面に形成され、BaTiO3膜の見かけの誘電率が低
下したものと考えられる。Next, the difference in the dielectric constant of the BaTiO 3 film when the polycrystalline silicon film is used for the lower electrode and when the film of the present invention is used will be described. Polycrystalline silicon film is a material that is generally used as an electrode film of current silicon LSI. Figure 5 shows BaTi
The relationship between the dielectric constant and the film thickness of the O 3 film was investigated, and the results are obtained when the film of the present invention is used (a) and when the polycrystalline silicon film (b) is used. When the film of the present invention is used, the dielectric constant of the BaTiO 3 film does not depend on the film thickness and is constant at about 240, whereas the dielectric constant of the BaTiO 3 film when the polycrystalline silicon film is used. Depends on the film thickness, and the dielectric constant decreases as the film thickness decreases. This is considered to be because, as described in the prior art, a low dielectric constant silicon oxide film was formed at the interface between BaTiO 3 and polycrystalline silicon, and the apparent dielectric constant of the BaTiO 3 film was lowered.
また、実施例2と同様に、下部電極はレニウムなどの膜
とその下に多結晶シリコンがある二層構造でもよい。こ
の場合の多結晶シリコン膜はレニウムなどの膜と単結晶
シリコン、及び、酸化シリコンとの密着性をよくする効
果がある。更に、多結晶シリコン膜でコンタクトホール
を埋める平坦化技術は確立しており、下部電極の一部と
して用いる利点は大きい。Further, as in the second embodiment, the lower electrode may have a two-layer structure in which a film of rhenium or the like and polycrystalline silicon thereunder are provided. In this case, the polycrystalline silicon film has an effect of improving the adhesion between the film of rhenium or the like and the single crystal silicon or the silicon oxide. Furthermore, a planarization technique for filling the contact hole with a polycrystalline silicon film has been established, and it has a great advantage to be used as a part of the lower electrode.
本実施例に示すように下部電極にレニウム、オスミウ
ム、ロヂウム、イリヂウム、及びそれらのシリサイドあ
るいは酸化物の1以上からなる膜を用いることにより、
誘電体膜の膜厚に依存せず一定の高い誘電率を有する薄
膜コンデンサをシリコン電極上に作製することができ
る。By using a film made of rhenium, osmium, rhodium, iridium, and one or more of their silicides or oxides for the lower electrode as shown in this embodiment,
A thin film capacitor having a constant high dielectric constant can be manufactured on a silicon electrode without depending on the film thickness of the dielectric film.
(発明の効果) 本発明は以上説明したように、薄膜コンデンサの下部電
極に高温ブロセスで表面荒れを起こさないイリジウム、
オスミウム、ロヂウム、イリヂウム、及びそれらのシリ
サイドあるいは酸化物などの膜を用いることにより、絶
縁特性に優れた高誘電率の薄膜コンデンサを提供するこ
とができる。また、従来のシリコン電極のように誘電体
との界面に低誘電率の酸化シリコン層を形成することが
ないので、誘電体膜の膜厚に依存せず一定の高い誘電率
を有する薄膜コンデンサをシリコン上に作製することが
できる。(Effects of the Invention) As described above, the present invention provides iridium which does not cause surface roughness on a lower electrode of a thin film capacitor due to high temperature process,
By using a film of osmium, rhodium, iridium, and their silicides or oxides, it is possible to provide a high dielectric constant thin film capacitor having excellent insulating characteristics. Moreover, unlike the conventional silicon electrode, since a silicon oxide layer having a low dielectric constant is not formed at the interface with the dielectric, a thin film capacitor having a constant high dielectric constant does not depend on the thickness of the dielectric film. It can be fabricated on silicon.
第1図は本発明における実施例を示す薄膜コンデンサの
断側面図、第2図(a)、(b)は絶縁破壊強度のヒス
トグラム図、第3図、第4図は実施例を示す薄膜コンデ
ンサの断側面図、第5図はBaTiO3膜の誘電率と膜厚の関
係を示す図。 1、6、12は単結晶シリコン基板、2、7、14は酸化シ
リコン、3、9、15は下部電極、4、10、17はBaTiO3、
5、11、16、18はAl、8は多結晶シリコン、13は単結晶
シリコンの低抵抗層。FIG. 1 is a sectional side view of a thin film capacitor showing an embodiment of the present invention, FIGS. 2 (a) and 2 (b) are histogram diagrams of dielectric breakdown strength, and FIGS. 3 and 4 are thin film capacitors showing the embodiment. Fig. 5 is a sectional side view of Fig. 5, and Fig. 5 is a diagram showing the relationship between the dielectric constant and the film thickness of the BaTiO 3 film. 1, 6, 12 are single crystal silicon substrates, 2, 7, 14 are silicon oxides, 3 , 9, 15 are lower electrodes, 4, 10, 17 are BaTiO 3 ,
5, 11, 16, and 18 are Al, 8 is polycrystal silicon, and 13 is a low resistance layer of single crystal silicon.
Claims (4)
部電極が順次積層形成された構造の薄膜コンデンサにお
いて、誘電体を直接成膜する下部電極がレニウムあるい
はレニウムシリサイドのいずれかからなるか、もしくは
レニウム、酸化レニウム、及びレニウムシリサイドから
選ばれた2以上の材料の積層体からなることを特徴とす
る薄膜コンデンサ。1. In a thin film capacitor having a structure in which a lower electrode, a dielectric and an upper electrode are sequentially formed on a substrate, the lower electrode for directly depositing the dielectric is made of rhenium or rhenium silicide. Alternatively, a thin film capacitor comprising a laminated body of two or more materials selected from rhenium, rhenium oxide, and rhenium silicide.
部電極が順次積層形成された構造の薄膜コンデンサにお
いて、誘電体を直接成膜する下部電極がオスミウム、酸
化オスミウム、及びオスミウムシリサイドから選ばれた
1以上の材料からなることを特徴とする薄膜コンデン
サ。2. In a thin film capacitor having a structure in which a lower electrode, a dielectric and an upper electrode are sequentially laminated on a substrate, the lower electrode for directly depositing the dielectric is made of osmium, osmium oxide and osmium silicide. A thin film capacitor comprising one or more selected materials.
部電極が順次積層形成された構造の薄膜コンデンサにお
いて、誘電体を直接成膜する下部電極が酸化ロジウムあ
るいはロヂウムシリサイドのいずれかからなるか、もし
くはロヂウム、酸化ロヂウム、及びロヂウムシリサイド
から選ばれた2以上の材料の積層体からなることを特徴
とする薄膜コンデンサ。3. In a thin film capacitor having a structure in which a lower electrode, a dielectric and an upper electrode are sequentially formed on a substrate, the lower electrode for directly depositing the dielectric is either rhodium oxide or rhodium silicide. A thin film capacitor, which is made of or consisting of a laminate of two or more materials selected from rhodium, rhodium oxide, and rhodium silicide.
部電極が順次積層形成された構造の薄膜コンデンサにお
いて、誘電体を直接成膜する下部電極が酸化イリヂウム
あるいはイリヂウムシリサイドのいずれかからなるか、
もしくはイリヂウム、酸化イリヂウム、及びイリヂウム
シリサイドから選ばれた2以上の材料の積層体からなる
ことを特徴とする薄膜コンデンサ。4. In a thin film capacitor having a structure in which a lower electrode, a dielectric and an upper electrode are sequentially formed on a substrate, the lower electrode on which the dielectric is directly formed is either iridium oxide or iridium silicide. Consists of or
Alternatively, a thin film capacitor comprising a laminated body of two or more materials selected from iridium, iridium oxide, and iridium silicide.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2057059A JPH0687493B2 (en) | 1990-03-07 | 1990-03-07 | Thin film capacitors |
EP90309477A EP0415750B1 (en) | 1989-08-30 | 1990-08-30 | Thin-film capacitors and process for manufacturing the same |
DE69014027T DE69014027T2 (en) | 1989-08-30 | 1990-08-30 | Thin film capacitors and their manufacturing processes. |
US07/575,368 US5122923A (en) | 1989-08-30 | 1990-08-30 | Thin-film capacitors and process for manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2057059A JPH0687493B2 (en) | 1990-03-07 | 1990-03-07 | Thin film capacitors |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH03257858A JPH03257858A (en) | 1991-11-18 |
JPH0687493B2 true JPH0687493B2 (en) | 1994-11-02 |
Family
ID=13044873
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2057059A Expired - Fee Related JPH0687493B2 (en) | 1989-08-30 | 1990-03-07 | Thin film capacitors |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0687493B2 (en) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3954339B2 (en) * | 1994-01-13 | 2007-08-08 | ローム株式会社 | Dielectric capacitor |
JP3954635B2 (en) * | 1994-01-13 | 2007-08-08 | ローム株式会社 | Method for manufacturing dielectric capacitor |
JP3954390B2 (en) * | 1994-01-13 | 2007-08-08 | ローム株式会社 | Dielectric capacitor |
JP3981142B2 (en) * | 1994-01-13 | 2007-09-26 | ローム株式会社 | Ferroelectric capacitor and manufacturing method thereof |
US5883781A (en) * | 1995-04-19 | 1999-03-16 | Nec Corporation | Highly-integrated thin film capacitor with high dielectric constant layer |
JP3526651B2 (en) * | 1995-04-28 | 2004-05-17 | ローム株式会社 | Semiconductor device and wiring method |
JP3380373B2 (en) | 1995-06-30 | 2003-02-24 | 三菱電機株式会社 | Semiconductor memory device and method of manufacturing the same |
US5973342A (en) * | 1996-04-25 | 1999-10-26 | Rohm Co., Ltd. | Semiconductor device having an iridium electrode |
JP3396131B2 (en) * | 1996-06-28 | 2003-04-14 | 三菱電機株式会社 | Semiconductor device and manufacturing method thereof |
JPH10261772A (en) | 1997-01-14 | 1998-09-29 | Mitsubishi Electric Corp | Semiconductor storage device and its manufacture |
US6421223B2 (en) * | 1999-03-01 | 2002-07-16 | Micron Technology, Inc. | Thin film structure that may be used with an adhesion layer |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4180596A (en) * | 1977-06-30 | 1979-12-25 | International Business Machines Corporation | Method for providing a metal silicide layer on a substrate |
JPS6042872A (en) * | 1983-08-19 | 1985-03-07 | Matsushita Electric Ind Co Ltd | Gaas fet |
JPS6094716A (en) * | 1983-10-28 | 1985-05-27 | 日本電信電話株式会社 | Thin film condenser |
JPS62222616A (en) * | 1986-03-25 | 1987-09-30 | 宇部興産株式会社 | Heat-resistant electrode thin film |
-
1990
- 1990-03-07 JP JP2057059A patent/JPH0687493B2/en not_active Expired - Fee Related
Also Published As
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JPH03257858A (en) | 1991-11-18 |
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