JPH1063642A - Discrete cosine transform circuit, its coefficient generating method and storage medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a circuit scale and to improve propagation delay time. SOLUTION: In the case of obtaining a coefficient for input data by multiplying a cosine function having a discrete value corresponding to the functions of variables (i), (k) by the input data, a counting circuit 7 counts the variable (i) and outputs a prescribed value (i+16). A memory 8 counts the variable (k) and temporarily stores the count value. At the time of counting the variables (i), (k), an adder 9 adds a value 2 (i+16) based on a current prescribed value to the function f(i, k-1) of the past value of the variable (k) temporarily stored and read out from the memory 8.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a discrete cosine transform circuit, a coefficient generating method thereof, and a storage medium, and more particularly, to a discrete cosine transform circuit used for compression coding and decoding of video and audio, and a method of generating the coefficient. It concerns a storage medium.

[0002]

2. Description of the Related Art Conventionally, discrete cosine transform is often used for compression coding and decoding of images and sounds. ISO / IEC11172 (MPEG1) is often used as an international standard for compression coding of video and audio using discrete cosine transform. As an example of this, ISO / IEC1
The discrete cosine transform of the compressed audio data used in the 1172-3 (MPEG1 / audio) decoder will be described.

[0003] Compressed audio data Ain of a prescribed format shown in FIG. 4 is separated into sample data Sa and magnification data Sf by a frame unpacking unit, and data obtained by requantizing the sample data Sa according to the standard and a scale factor (magnification). Data) Sf and the result of inverse normalization are subjected to a matrix operation to perform a discrete cosine transform. That is, a DCT coefficient is generated. Then, decoded data is obtained by multiplying the data obtained by the discrete cosine transform by a predetermined window function.

[0004] Here, assuming that the inverse standardized data is Sk and the matrix operation output is Vi,

[0005]

(Equation 1)

[0006]

Here, the coefficient Nik is determined by variables i and k (i, k
Is an integer i ≧ 0, k ≧ 0), and this function f
The value of (i, k) = (16 + i) (2k + 1) is (2)
According to the values of variables i and k given by the equation, a minimum of 16 (i
= K = 0) to a maximum of 4977 (i = 63, k = 31).

The cosine function is a periodic function having a period of 2π in the time domain, and a time function symmetrical with respect to the current time. Due to the periodicity and symmetry, the coefficient Nik of the discrete cosine function represented by the equation (2) is 3 for 0 ≦ [f (i, k) π / 64] ≦ π / 2 if the sign is ignored.
Three types may be obtained. Therefore, actually, the processing of the flowchart of FIG.
A method of folding into three types and obtaining the value of the cosine function using the following Table 1 for 33 values is often used.

[0009]

[Table 1]

In FIG. 5, first, in step S51, a function f (i, k) = (16 + i) (2k + 1) is calculated. This processing will be described with reference to the flowchart of FIG. In step S52, the remainder of 128 is obtained from the calculation result in step S51. In a succeeding step S53, it is checked whether or not the result of the remainder is larger than 64. If it is not larger than 64, the imaginary part does not exist on the minus side in the complex plane, and the process proceeds directly to step S55. On the other hand, if the remainder is larger than 64, the imaginary part exists on the minus side in the complex plane, so that by subtracting 64 from the result of step S52, this is folded to the plus side of the imaginary part.

In step S55, it is checked whether the result obtained by removing the remainder in step S52 or the result obtained by subtracting 64 in step S54 is 32. If this is 32, just 33 types of f (i, i, from 0 to 32π / 64
Since k) has been obtained, the processing is terminated. On the other hand, if this is not 32, the process proceeds to step S56,
52, or the result of removing the remainder in step S54
It is checked whether the result of subtracting 64 is larger than 32.

If the value is not larger than 32, the real number part does not exist on the minus side in the complex plane, and the process is terminated as it is. On the other hand, if these results are larger than 32, the real part exists on the minus side in the complex plane, so that step S5
2 or the result of subtracting 64 in step S54 is 64 in step S57.
By folding this to the positive side of the real part,
This processing ends. Thus, by subtracting the index numbers (0 to 32) shown in Table 1, 33 types of values of the cosine function are obtained.

FIG. 6 shows a function f (i, k) = (16 + i)
It is a flowchart which shows the calculation procedure of (2k + 1).

First, step S61 is followed by step S6.
In step 2, variables i and k are initialized to zero. Then, in step S63, the function f (i, k) = (16+
i) After calculating the value of (2k + 1), the variable k is counted up by one in step S64. The function f (i,
Each time k is determined and k is counted up by one, the value of variable k is checked in step S65, and if k <32, steps S63 and S64 are repeated.

On the other hand, if k <32, step S66
And after incrementing the variable i by one, step S
In step 67, the value of the variable i is checked. If i <64, steps S62 to S66 are repeated. On the other hand, if i <64, the value of the function f (i, k) = (16 + i) (2k + 1) is changed from a minimum of 16 (i = k = 0) to a maximum of 4977 (i = 6).
(3, k = 31), and the process ends.

FIG. 7 shows the function f in step S64.
FIG. 9 is a circuit diagram of an example of a conventional coefficient generation circuit for calculating (i, k) = (16 + i) (2k + 1).

1 and 2 are counting circuits, 3 is an arithmetic circuit, 4
Is a multiplier. The counting circuit 1 counts up the variable i and outputs (16 + i). The counting circuit 2 calculates the variable k
Is counted up and output as it is. Arithmetic circuit 3
Performs the operation of doubling the value of the variable k from the counting circuit 2 and adding 1 thereto, and outputs (2k + 1). Then, the multiplier 4 calculates (2k + 1) (16 + i).

[0018]

However, in the above-described conventional method for generating a coefficient of a discrete cosine function, a function f (i, k) = (16 + i) (2k + 1) is calculated using a multiplier.
Was calculated. When the multiplier is used as described above, the circuit scale becomes large and complicated, so that there is a problem that the propagation delay time is increased, and it is difficult to reduce the size and cost.

An object of the present invention is to provide a discrete cosine transform circuit capable of reducing the circuit scale and the propagation delay time, a method for generating the coefficient thereof, and a storage medium.

[0020]

In order to achieve the above object, the apparatus according to the first aspect of the present invention comprises the variables i and k.
(I, k are integers i ≧ 0, k ≧ 0) by multiplying the input data by a cosine function that takes a discrete value according to the function,
In a discrete cosine transform circuit that obtains coefficients of the input data and performs discrete cosine transform, counting means for counting a variable i and outputting a predetermined value, storage means for counting and temporarily storing a variable k, and variables i and k Counting means for adding a value based on the current predetermined value obtained by the counting means and the function of the past value of the variable k read from the storage means. The configuration was adopted.

Further, in the apparatus according to the present invention, the adding means is an adder for binary data, and the predetermined value is input one digit higher from the LSB side to reduce the predetermined value by two. The configuration is such that the doubled value and the function of the past value of the variable k are added.

In the apparatus according to the third aspect of the present invention, the function is f (i, k) = (16 + i) (2k +
1), and the cosine function is cos [f (i, k) π
/ 64].

According to another aspect of the present invention, the above object is achieved.
In the method of the present invention, the variables i and k (i, k are i ≧
In the coefficient generation method of the discrete cosine transform that obtains the coefficient of the input data, the variable i is counted by multiplying the input data by a cosine function that takes a discrete value according to a function of 0, k ≧ 0). A counting step of outputting a predetermined value by
A storage step of counting and temporarily storing the variable k; and, as the variables i and k are counted, a value based on the current predetermined value obtained in the counting step and the variable k read from the storage means. And an adding step of adding the function of the past value to the function.

Further, in the method according to the present invention, in the adding step, the predetermined value is input one digit higher from the LSB side of a binary adder, so that the predetermined value is twice as large as the predetermined value. The value and the function of the past value of the variable k are configured to be added.

In the method according to the present invention, the function is f (i, k) = (16 + i) (2k +
1), and the cosine function is cos [f (i, k) π
/ 64].

According to another aspect of the present invention, there is provided a semiconductor device comprising:
In the storage medium of the present invention, the input data is multiplied by a cosine function that takes a discrete value according to a function of variables i and k (i, k is an integer satisfying i ≧ 0, k ≧ 0). In a storage medium storing a program of a coefficient generation method of discrete cosine transform for obtaining coefficients of the input data, a counting step of counting a variable i and outputting a predetermined value, and a storage step of counting a variable k and temporarily storing the same. Adding the value based on the current predetermined value obtained in the counting step and the function of the past value of the variable k read from the storage means as the variables i and k are counted. And a program for a method of generating coefficients of discrete cosine transform including steps.

[0027]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(First Embodiment) FIG. 1 is a block diagram showing a configuration of a speech decoder to which a first embodiment of a discrete cosine transform circuit according to the present invention is applied. This speech decoder has I
SO / IEC 11172-3 (MPEG1 / audio
It is assumed that the configuration conforms to o) and that it is implemented as an LSI.

In FIG. 1, 10 is a frame unpacking unit, 15 is a requantization unit, 16 is a multiplier, 18 is a matrix operation (Matrixing) unit, 20, 22, and 26 are buffers, and 24 is a windowing process (Windowing). Department. The frame unpacking unit 10 uses the bit allocation information 11 to extract the sample data Sa and the magnification data S from the compressed audio data Ain composed of a time-series bit string.
and is separated and taken out. The decoded sample data Sa indicated by 12 is re-quantized by the re-quantization unit 15 using the bit allocation information 11, and becomes re-quantized data Sr.

The multiplier 16 multiplies the decoded scale factor (magnification data) Sf indicated by 14 and the requantized data Sr in accordance with the standard and outputs the denormalized audio data Sk. The matrix operation unit 18 performs a predetermined operation based on the audio data Sk, and outputs a matrix operation output Vi.
The progress of the operation by the matrix operation unit 18 is
Is stored temporarily. The matrix operation unit 18 includes a discrete cosine transform circuit, a coefficient generation circuit, a sequencer, and a ROM according to the present invention, and performs discrete cosine transform (Diss) under the control of the sequencer.
Generate a coefficient of “Crete Cosine Transform” and perform a discrete cosine transform on the audio data Sk.

The buffer 22 temporarily stores the operation result by the matrix operation section 18. This calculation result is output to the window processing unit 24.
Weighted by The weighted calculation result is output via the buffer 26.

FIG. 2 is a block diagram for explaining the outline of the function of the matrix operation section 18. As shown in FIG.

In FIG. 2, reference numeral 30 denotes an Sk buffer;
Is a Vi buffer. i generator 32 and k generator 34
Generates the variables i and k in the order of the prior art described above according to the sequence of the sequencer. The coefficient generation circuit 36
Based on the generated variables i and k, a DCT coefficient which is a feature of the present invention is generated. The coefficient folding unit 38 generates a +/- selection signal according to the sequence of the sequencer, supplies the signal to the adder / subtractor 44, and performs the processing described with reference to FIG.

The ROM 40 stores Table 1 for 33 types of index numbers.
Output k. By the multiplier 42 and the adder / subtractor 44,
The calculation shown in equation (1) is performed. The processing according to the flowcharts shown in FIGS. 5 and 6 is almost the same as the conventional one,
A feature of the present invention is that the processing in step S63 in FIG. 6 is different from the conventional processing.

The step S63 of the present invention will be described. The processing in this step is (16 + i) (2k +
This focuses on the order of the variables i and k in FIG. 6 when calculating 1). That is, MPEG1 / audio
In the discrete cosine transform defined by the decoding process of o (ISO / IEC11172-3), i and k change in the following order. That is, the coefficient of the discrete cosine transform is (i, k) =
(0,0), (0,1), (0,2) ..., (0,3)
1), (1,0), (1,1), (1,2) ..., (1,
30), (1, 31) ..., (62, 0), (62, 1)
..., (62, 30), (62, 31) ..., (63,
0), (63, 1) ..., (63, 30), (63, 3)
It is calculated in the order of 1).

F (i, k) = (i + 16) (2k
+1)

[0037]

F (i, k) = (i + 16) (2k + 1) = (i + 16) {2 (k-1) + 1 + 2} = (i + 16) (2 (k-1) +1} +2 (i + 16) = f ( (i, k-1) +2 (i + 16) (3), that is, regularity of coefficient generation.

Therefore, when k increases one by one, the discrete cosine transform is performed by using at least an adder circuit and a memory without using a multiplier by using the regularity expressed by the equation (3). Can be generated.

FIG. 3 shows the function f in step S63.
FIG. 9 is a circuit diagram of a coefficient generation circuit that does not use a multiplier for calculating (i, k) = (16 + i) (2k + 1).

In FIG. 3, the initial value of i is set in the counting circuit 7, the variable i is counted up, and the current predetermined value (16 + i) is output. The adder 9 is a digital adder for adding a binary number, and outputs the initial value of i as it is, which corresponds to the state when k = 0. The memory 8 has a small capacity enough to store the addition result of the variable k and the adder 9. The memory 8 temporarily stores the variable k initialized and counted up to 0, and also stores the variable k. The past addition result is temporarily stored.

Next, as the variables i and k are counted up, the adder 9 outputs the output value (16) from the counting circuit 7.
+ I) and the function f (i, k-1) of the past value (k-1) of the variable k read from the memory 8 are added to obtain a new value (f (i, k- 1) +2 (16 + i))
Is output.

In this way, a new value is added and output each time the variable increases by one, and the result shown in equation (3) is obtained. In order to double (16 + i), 0 is input to the LSB of the adder 9 and the binary value of the predetermined value (16 + i) is input one digit higher from the LSB side to obtain 2 (16 + i).
Is output, so that a multiplier having a large circuit scale is not required.

As described above, according to the present embodiment, it is possible to generate discrete cosine transform coefficients without using a multiplier that requires a large-scale and complicated circuit configuration. Therefore, it is easy to reduce the size of the circuit without increasing the propagation delay time. Although the circuit shown in FIG. 3 also depends on the LSI manufacturing process, the circuit scale (area) can be reduced by 30% as compared with the conventional circuit shown in FIG. Also, the propagation delay time can be 1.4 times faster.

(Other Embodiments) In the above-described first embodiment, an example has been described in which the matrix operation unit 18 is configured as hardware and the present invention is realized by control of a sequencer.
Instead, a control / calculation unit such as a CPU, RAM and ROM
And the like. In this case, for example, a program for realizing the algorithm of the formula (3) is stored in the ROM, and the control and control based on this program are performed.
By performing the calculation, the same function as that of the first embodiment can be performed, and the same effect as that of the first embodiment can be obtained.

[0045]

As described above, according to the circuit, the method and the storage medium of the present invention, the input data is obtained by multiplying the input data by the cosine function having a discrete value corresponding to the function of the variables i and k. When obtaining the coefficient of the data, the variable i is counted and a predetermined value is output, the variable k is counted and temporarily stored, and as the variables i and k are counted, the variable i and k are determined based on the current predetermined value. Variable k that is temporarily stored and read out
And the function of the past value are added, so that an effect is obtained that the circuit scale and the propagation delay time can be reduced without using a multiplier.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a speech decoder to which a first embodiment of a discrete cosine transform circuit according to the present invention is applied.

FIG. 2 is a block diagram for explaining an outline of a function of a matrix operation unit 18;

FIG. 3 shows a function f (i, k) = (16+) according to the present invention.
i) A circuit diagram of a coefficient generation circuit that does not use a multiplier for calculating (2k + 1).

FIG. 4 shows MPEG1 / audio (ISO / IEC11)
172-3) Compressed audio data Ai specified in the decoder
It is explanatory drawing which shows the format of n.

FIG. 5 is a flowchart illustrating a folding processing procedure.

FIG. 6 shows a function f (i, k) = (16 + i) (2k + 1)
6 is a flowchart showing a calculation procedure of the above.

FIG. 7: Function f (i, k) = (16 + i) (2k + 1)
FIG. 6 is a circuit diagram of an example of a conventional coefficient generation circuit for calculating the coefficient.

[Explanation of symbols]

 1, 2 counting circuit 3 arithmetic circuit 4, 16, 42 multiplier 7 counting circuit 8 memory 9 adder 10 frame unpacking unit 15 requantization unit 18 matrix operation (Matrixing) unit 20, 22, 26, 30, 46 buffer 24 Windowing unit 32 i generation unit 34 k generation unit 36 coefficient generation circuit 38 coefficient folding unit 40 ROM 44 adder / subtracter

Claims (7)

[Claims] 1. A coefficient of the input data by multiplying the input data by a cosine function having a discrete value corresponding to a function of variables i and k (i, k is an integer satisfying i ≧ 0, k ≧ 0). And a discrete cosine transform circuit for performing a discrete cosine transform to obtain a predetermined value by counting a variable i; a storage means for counting a variable k and temporarily storing the variable i; And adding means for adding a value based on the current predetermined value obtained by the counting means and the function of the past value of the variable k read from the storage means. Discrete cosine transform circuit. 2. The adder means is an adder for binary data, and inputs the predetermined value one digit higher from the LSB side to obtain a value twice as large as the predetermined value and a past value of the variable k. 2. The discrete cosine transform circuit according to claim 1, wherein the function and the function are added. 3. The function is f (i, k) = (16 + i)
(2k + 1), and the cosine function is cos [f
3. The discrete cosine transform circuit according to claim 1, wherein the discrete cosine transform circuit is represented by (i, k) π / 64]. 4. A coefficient of the input data by multiplying the input data by a cosine function having a discrete value corresponding to a function of variables i and k (i, k is an integer i ≧ 0, k ≧ 0). , A counting step of counting a variable i and outputting a predetermined value, a counting step of counting a variable k and temporarily storing the same, and a step of counting the variables i and k And an adding step of adding a value based on the current predetermined value obtained in the counting step and the function of the past value of the variable k read from the storage means. Coefficient generation method. 5. The function of a value twice as large as the predetermined value and a past value of the variable k in the adding step by inputting the predetermined value one digit higher from the LSB side of a binary adder. The coefficient generation method of the discrete cosine transform according to claim 4, wherein 6. The function is f (i, k) = (16 + i)
(2k + 1), and the cosine function is cos [f
The coefficient generation method of the discrete cosine transform according to claim 4 or 5, wherein (i, k) π / 64]. 7. A coefficient of the input data by multiplying the input data by a cosine function which takes a discrete value according to a function of variables i and k (i, k is an integer satisfying i ≧ 0, k ≧ 0). A counting step of counting a variable i and outputting a predetermined value; a storage step of counting a variable k and temporarily storing the variable; and variables i and k. Counting, the adding step of adding the value based on the current predetermined value obtained in the counting step and the function of the past value of the variable k read from the storage means. A storage medium storing a program for a coefficient generation method for cosine transformation.