JPH10282469A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To stabilize a compensating circuit for specially compensating the displaying irregularity dependent on the display pattern of a simple matrix type liquid crystal display device. SOLUTION: In a liquid crystal display device having a voltage compensating circuit 135 for applying the corresponding voltage on a non-selecting voltage for a scanning electrode by detecting a current flowing or voltage fluctuation through a non-selecting voltage line 140 for scanning electrode or the voltage fluctuation, the voltage compensating circuit 135 is composed of a resistor R5, provided between the non-selecting voltage for a scanning electrode and a scanning electrode driving circuit; an operational amplifier circuit (R11-14, 151), in which both terminals of the resistor R5 are connected to an inverted amplifying terminal and a non-inverted amplifying terminal, respectively, and the inverted amplification factor is different from the non-amplification factor; and an integration circuit (R15, C1, 152, 153) for integrating the output of the operational amplifier circuit and resetting it for every dividing period.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device driven at a high frequency, and more particularly to a simple matrix type liquid crystal display device using a multiple scanning line selection drive system for simultaneously selecting two or more scanning lines. The present invention relates to a high-quality liquid crystal display device with little display unevenness, and further relates to a liquid crystal display device having high-speed response, high contrast, and wide viewing angle.

[0002]

2. Description of the Related Art As a driving method of a liquid crystal display device having a simple matrix type liquid crystal panel, a voltage averaging method described in "Liquid Crystal Device Handbook" (P.395 to P.399) is widely used.

In this method, a selective scanning voltage is sequentially applied to scanning electrodes corresponding to rows of a liquid crystal panel one by one for one time-division period, and when all the scanning electrodes are scanned in one frame period, the same operation is performed again. repeat. A display voltage corresponding to the value of the display data is applied to the display electrodes corresponding to the columns of the liquid crystal panel around the non-selection scanning voltage level. further,
An alternating operation of inverting the polarity of the liquid crystal applied voltage at regular intervals is performed.

On the other hand, as a driving method for a liquid crystal display device which exceeds the limit of increasing the response speed in the voltage averaging method, a multiple scanning line selection driving method described in Japanese Patent Application Laid-Open No. 6-67628 has been proposed. .

In this method, a selection scanning voltage corresponding to an orthogonal function (for example, a Walsh function) is sequentially applied to a plurality of scanning electrodes corresponding to the rows of the liquid crystal panel, and all the scannings are performed in a period called one frame period. When the electrodes are scanned, the same operation is repeated again. To the data electrodes corresponding to the columns of the liquid crystal panel, data voltages corresponding to the number of coincidences with the value of the orthogonal function and the value of the display data in the line selected and scanned are applied.

[0006]

In recent years, it has become necessary for a display device for displaying multimedia information to be capable of "moving image display". However, in the conventional voltage averaging method, if the response speed is increased, Contrast reduction, flicker and the like due to the frame response occur, and shadowing due to crosstalk corresponding to a specific display pattern occurs.

In order to reduce the decrease in contrast, flicker, and the like caused by the former frame response, a multiple scanning line selection driving method described later is recommended.

The latter technique for reducing the shadowing caused by crosstalk is as follows: 1) Quantitatively extract the regularity of the display contents, and make corrections corresponding to the extracted amount to scan voltage waveforms or signal voltages. Japanese Unexamined Patent Application Publication No. 2-8963 discloses a method for performing a waveform, and 2) a method in which a current flowing through a signal line electrode is detected and a voltage corresponding thereto is fed back to a scanning electrode.
Japanese Patent Application Laid-Open No. 6-12 / 1991 discloses a method in which a voltage is extracted from a signal voltage itself via a capacitor or an electric resistor, and this voltage is arithmetically amplified and added to a scanning voltage.
030 and the like.

In the multiple scanning line selection driving method,
Although the decrease in contrast and the like due to the frame response can be reduced to some extent in principle, when a specific display pattern is displayed, display unevenness called shadowing occurs more remarkably than in the voltage averaging method. This display unevenness occurs both in the vertical and horizontal directions.

[0010] Among these display irregularities, when a vertical ruled line is displayed on a solid-filled background, the vertical direction generated at the upper and lower parts of the ruled line display is conspicuous and poses a problem.
This shadowing in the vertical direction is caused by the fact that the effective value of the liquid crystal applied voltage differs for each column. The cause of the phenomenon that the effective value differs for each column is that a spike-like distortion (crosstalk) occurs in the scanning voltage due to a change in the data voltage, and the influence of the crosstalk differs for each column. For example, when displaying a black vertical ruled line (off region portion) as shown in FIG. 16A, the liquid crystal interposed between the data electrode and the scanning electrode as shown in FIG. It can be regarded as an equivalent circuit of the resistance (R) and the capacitance (C) of the liquid crystal, and a voltage drop occurs when a current flows in the direction of the arrow. Therefore, as shown in FIG. 16B, when the data voltage in the background portion (ON region) changes simultaneously in the same direction, the effective voltage increases in the ruled line portion, and conversely, the effective value decreases in the background portion. Such distortion occurs in the non-selective scanning voltage. Therefore, as compared with the point B in the background portion in FIG. 16A, the point A in the line of the ruled line portion looks bright and bright despite the same ON display. The above-mentioned phenomenon is the main principle in which display unevenness (shadowing) in the vertical direction occurs, and is caused by waveform distortion occurring in the non-selection voltage of the scanning electrode due to the difference in the effective value of the liquid crystal applied voltage for each column.

When displaying a horizontal ruled line (off region) as shown in FIG. 17A, the capacitance (C) of the liquid crystal layer depends on the dielectric constant of the liquid crystal as shown in FIG. 17B. In general, the dielectric constant of the liquid crystal is large in the ON region and small in the OFF region, and the time constant is substantially different.
As shown in (1), waveform distortion occurs in the selected scanning voltage in a scanning line having many ON regions in the background portion. Therefore, the effective value of a row having many on-areas is smaller than that of a row having many off-areas. Therefore, the point B in the background in FIG. 17A is the same as the point A in the ruled line. Despite the ON display, it appears darker by the effective value decrease. The above phenomenon is the main principle of the occurrence of horizontal display unevenness (shadowing), which is caused by waveform blunting (or waveform distortion) at the scanning electrode selection voltage due to the difference in the effective value of the liquid crystal applied voltage for each row. It is.

As a method of correcting shadowing which is remarkably caused by adopting such a multiple scanning line selection driving method, 1) a distortion of a voltage waveform between a scanning electrode and a signal electrode is caused by a change of a voltage on a signal electrode. Alternatively, a waveform distortion is estimated by monitoring a change in current, and a correction voltage for canceling the distortion is added to the drive voltage waveform.
2) Japanese Patent Application Laid-Open No. 7-129128, which performs a feedforward control in which a voltage applied to a scanning electrode is taken out and advanced to a signal driver circuit to perform correction. Stuff,
3) Japanese Unexamined Patent Publication No. 8-160390, which discloses a method of determining a sequence of column vectors of a selection matrix for generating a sequencer of row signals having high periodicity, and further using an orthogonal matrix system optimal for reducing crosstalk. Things, 4)
One frame period is divided into a plurality of virtual block periods, the selection period is divided into n divided selection periods at predetermined intervals for each block period, and a selection voltage is applied for each division period. Japanese Unexamined Patent Publication No. Hei 9-15556 and the like can be mentioned.

However, in these conventional methods for reducing shadowing generated at the upper and lower portions of a vertical ruled line, waveform distortion is indirectly estimated from a voltage waveform of a signal electrode or the like, and correction according to this is performed. Although there is one that adds to the voltage on the scanning electrode side, accurate correction could not be applied because the waveform distortion was not directly detected. In addition, in the case of the conventional method in which the waveform distortion on the scanning electrode is directly detected and the correction voltage is directly added to the scanning electrode, the correction voltage itself distorts the voltage waveform, so that the scanning voltage becomes unstable and “flickers”. Occurs or the correction is not sufficiently applied. That is, in the conventional shadowing correction method, the correction waveform acts in the direction of increasing the current causing the distortion (positive feedback for the current), so that the scanning voltage becomes unstable in the actual circuit. There has been a problem that flicker occurs or correction is not sufficiently performed.

Further, the shadowing generated at the upper and lower portions of the vertical ruled line and the shadowing generated at the left and right of the horizontal ruled line have different generation principles, and the distortion is mainly caused by the non-selection voltage and the selection voltage of the scanning voltage. In some cases, it is inappropriate or impossible to use the same correction means as a correction method for reducing the shadowing in each case.

Further, the frame frequency is set to 150 Hz or more.
For moving image display requiring 300 Hz or more, in addition to the above-described improvement in the liquid crystal drive, an optimal combination of a liquid crystal material for driving at a high response speed of 150 ms to 80 ms or less and an optical member accompanying a narrow gap of the liquid crystal layer, Furthermore,
There is no suggestion in the prior art for a combination that provides a comprehensive solution to a device for compensating for a reduction in contrast caused by correction for reducing shadowing.

SUMMARY OF THE INVENTION It is, therefore, a first object of the present invention to provide a liquid crystal display device and a liquid crystal driving method which are stable in circuit and sufficiently compensate for shadowing.

A second object of the present invention is to provide a liquid crystal display device and a liquid crystal driving method for reducing display unevenness caused by different factors by different corrections for each factor.

[0018]

In order to achieve the first object, the liquid crystal display device of the present invention is arranged so as to face each other so that each dot is formed at the intersection of the intersecting scanning electrode and data electrode. A pair of electrode substrates, a scan electrode drive circuit that applies a non-selection voltage or a selection voltage to the scan electrodes in a predetermined time division period, and a data electrode drive circuit that applies a voltage corresponding to display data to the data electrodes. A power supply circuit for supplying a non-selection voltage or a selection voltage to the scan electrode drive circuit, and for supplying a signal voltage to the data electrode drive circuit, wherein the power supply circuit comprises:
A resistor for detecting a current flowing through the scan electrode to which the non-selection voltage is applied, an operational amplifier for amplifying the detected current, and the non-selection voltage applied by integrating an output of the operational amplifier. A correction voltage generation circuit that supplies a scan electrode with a correction voltage superimposed on a predetermined reference voltage,
A correction voltage generation circuit having a function of resetting the integration amount of the output of the operational amplifier circuit for each temporary division period.

In order to reduce the influence of noise and optimize the correction characteristics, a signal modulation circuit composed of a pair of bidirectional diodes is arranged between the operational amplifier circuit and the correction voltage generation circuit. Is desirable.

Also, in order to prevent the correction amount obtained by integrating the transient waveform distortion as it is from becoming larger than the optimum correction amount, a pair of the predetermined reference voltage and the output of the operational amplifier circuit is provided. It is desirable to arrange a limiter circuit composed of bidirectional diodes.

In order to achieve the second object,
The liquid crystal display device according to the present invention comprises a pair of electrode substrates arranged so as to face each other so that each dot is formed at an intersection of a crossing scanning electrode and a data electrode, and a non-selection voltage or a selection voltage is applied to the scanning electrode at a predetermined time. A scan electrode driving circuit applied in the divided period, a data electrode driving circuit for applying a voltage corresponding to the display data to the data electrode, and a potential different in a positive direction around a predetermined reference potential to the scan electrode driving circuit. Supplying four types of selection voltages including two types of selection voltages and two types of selection voltages having different potentials in the negative direction, superimposing a correction voltage on the reference voltage, and supplying the same as a non-selection voltage; A power supply circuit for supplying a signal voltage to the liquid crystal display device, and a correction clock generation circuit for generating a signal according to display contents, wherein the power supply circuit is configured to output the non-selection voltage A resistor for detecting a current flowing through the applied scan electrode, an operational amplifier for amplifying the detected current, and a predetermined voltage applied to the scan electrode to which the non-selection voltage is applied by integrating the output of the operational amplifier. A correction voltage generation circuit for supplying a correction voltage superimposed on a reference voltage, the correction voltage generation circuit having a function of resetting an integration amount of an output of the operational amplifier circuit for each temporary division period; The electrode drive circuit supplies one of the four types of selection voltages to the scan electrodes as a selection voltage in accordance with a signal from the correction clock generation circuit.

The liquid crystal display device according to the present invention for achieving the above first and second objects is more effective especially in driving by selecting a plurality of scanning lines at the same time. The circuit sequentially applies a selection voltage or a non-selection voltage according to a predetermined orthogonal function to the scanning electrodes, and the signal electrode driving circuit applies a signal voltage according to the orthogonal function and display contents to the signal electrodes.

In the operational amplifier circuit, both terminals of a resistor for detecting a current flowing through the scan electrode are connected to an inverting amplifier terminal and a non-inverting amplifier terminal of the operational amplifier element, respectively. A configuration including an operational amplifier element having a different amplification factor is desirable.

Further, in the liquid crystal display device for performing the voltage correction for reducing the shadowing described above, in order to improve the high-speed response, the high contrast, and the wide viewing angle, the liquid crystal display device has a pressure of 20 mPa · s.
s or less (preferably 15 mPa · s or less, more preferably 13 mPa · s or less) combined with an optical member such as a liquid crystal material having a low viscosity, colored beads having a high light-shielding property, or a retardation film having a sharp wavelength dispersion. Is desirable.

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION

(Embodiment 1) An embodiment of the present invention will be described below with reference to FIGS. 1 to 7 when the number of simultaneously selected lines is two.

FIG. 1 shows an output of a power supply circuit according to an embodiment of the present invention.
FIG. 5 is a timing chart showing a voltage applied to the liquid crystal panel, and is a timing chart when a ruled line display in which the ON display is vertically continuous with respect to the background of the entire OFF display is performed. As shown in FIG. 1, VY supplied to the scan electrode driving circuit among the power supply circuit outputs
A value of 0 fluctuates when a correction voltage is applied according to the current flowing in the non-scanning voltage VY0.

Thus, the output of the scan electrode driving circuit is Y1
To Y4. During the non-selection period of the scanning voltage, a pulse-shaped waveform distortion occurs due to switching of the background data voltage waveform. Immediately following the waveform distortion, a correction voltage is applied to offset the distortion and is reset at the end of the time division period. The line clock CL1 for controlling the timing of the temporary division period
Is a clock signal having a constant pulse width as shown in FIG. As shown in FIG. 2, the start timing of each time division period is the falling timing of the line clock CL1, and the resetting of the correction voltage is started at the rising timing of the line clock CL1. Although the pulse width of the line clock CL1 is exaggerated with respect to the temporary division period in FIG. 2, it is necessary that at least the pulse width of the line clock CL1 has such a pulse width that the reset voltage can be almost completely reset. Is desirable.

An example of a liquid crystal display device for realizing this driving method is shown in FIGS. 3 to 7 and will be described below.

FIG. 3 is a block diagram showing the configuration of the liquid crystal display device according to one embodiment of the present invention.

In FIG. 3, reference numeral 101 denotes a liquid crystal panel. Reference numeral 102 denotes a scan electrode drive circuit for simultaneously selecting two lines, and reference numeral 103 denotes a scan electrode drive circuit for selecting and scanning two lines.
This is a data electrode drive circuit that determines a display state on a line. 104 is 8-bit parallel display data D7 to D0
Reference numeral 105 denotes a data latch clock CL2 synchronized with the display data 104, and reference numeral 106 denotes a line clock CL1. One line of data is transmitted in one cycle of the line clock 106. Reference numeral 107 denotes a head line clock FLM, and one cycle of the head line clock 107 is one frame period. Reference numeral 108 denotes a display off control signal DISPOFF. When this signal is "0", the display is stopped. The display data and the synchronization signals 104 to 108 are provided from the liquid crystal controller 109. 115 and 116 are power supply voltage groups necessary for the data voltage drive circuit and the scan voltage drive circuit, respectively, and 114 is a power supply circuit for generating power supply voltage groups 115 and 116. Reference numerals 111 and 112 denote external power supply voltages VCC and GN on which the power supply voltage groups 115 and 116 are based.
D and 113 are voltages VCON for adjusting the voltage level of the liquid crystal driving voltage group, and are supplied from the display system main body 110 in this embodiment. Reference numerals 117 and 118 denote orthogonal function W1 signals generated by the scan electrode driving circuit 102, W2
Signal.

The operation of each block of the liquid crystal display device shown in FIG. 3 will be described below with reference to FIGS. First,
The principle of the scan electrode driving circuit 102 of the present invention will be described with reference to the operation explanatory diagram shown in FIG. Scan electrode drive circuit 1
02 is a line selection signal that receives the FLM signal 107 and the CL1 signal 106 and sequentially indicates two lines to be simultaneously selected;
A 2-bit orthogonal function W1 signal 117 and W2 signal 118 are generated. A scanning voltage as shown in FIG. 4 is selected by a combination of the line selection signal and the orthogonal function, and is applied to the liquid crystal panel 101 via the scanning electrodes. That is, as shown in FIG. 4, when the orthogonal function is "0", the VYL voltage is selected if the line selection signal is in the "scanning (1)" state, and if the line selection signal is in the "non-scanning (0)" state. The VY0 voltage is selected. When the orthogonal function is "1", the VYH voltage is selected if the line selection signal is in the "scanning (1)" state, and the VY0 voltage is selected if the line selection signal is in the "non-scanning" state. The display-off control signal DISPOFF
If the signal 108 is “0”, all the line selection signals are “
The state becomes a non-selection (0) "state, and the voltage VY0 is output.

Next, the principle of the data electrode driving circuit 103 of the present invention will be described with reference to the operation explanatory diagram shown in FIG.
The data electrode drive circuit 103 converts the display data 104 into CL
It has a line data latch circuit for two lines that fetches two signals 105 and stores the fetched data for two horizontal periods. Two lines of display data are simultaneously read from the line data latch circuit, and the read display data and the orthogonal function W1 signal 1 supplied from the scan electrode driving circuit 102 are read.
17, a comparison operation with the W2 signal 118 is performed, and the voltage level applied to the data electrode is determined according to the calculation result.
That is, as shown in FIG. 5, the outputs LD1 and LD2 of the line data latch and the values of the orthogonal function W1 signal 117 and the W2 signal 118 are compared by a matching circuit.
One level number is selected and output from the liquid crystal driving data voltages of the levels. For example, when the number of matches is "0", the VX2 voltage is selected, when the number of matches is "1", the VX1 voltage is selected, and when the number of matches is "2", the VX0 voltage is selected and output. Also, the display off control DISPOFF signal 108
Is "0", the VX1 voltage is forcibly selected.

Next, an example of the power supply circuit 114 of the present invention will be described with reference to FIGS. FIG. 6 shows the power supply circuit 11.
7 is a circuit diagram of a voltage correction circuit in the power supply circuit 114. FIG. As shown in FIG.
Are a DC-DC converter 130 driven by the VCC voltage 111, voltage dividing resistors R1 to R4, and operational amplifiers 131 to 13
4. It is composed of a voltage correction circuit 135. The voltage correction circuit further includes a current detection resistor R5, an operational amplifier circuit 136,
It comprises an integrating circuit 137 and a correction voltage generating circuit 138. 139, 140, and 141 (part of the power supply voltage group 116 in FIG. 3) are scan electrode driving voltages VYH.
(Positive selection voltage), VY0 (non-selection voltage), and VYL (negative selection voltage), and are supplied to the scan electrode drive circuit 102. 142, 143, and 144 (part of the power supply voltage group 115 in FIG. 3) are liquid crystal drive data voltages VX0 to VX.
2, which is supplied to the data electrode drive circuit 103. Reference numeral 145 is a reference voltage for generating the VY0 voltage 140 and the VX1 voltage 140.

The VYH voltage 139 and the VYL voltage 141 are directly generated by the DC-DC converter 130, respectively, and can be varied by the adjustment voltage VCON voltage 113. Also, VX2 voltage 142, VX0 voltage 143,
And the reference voltage 145 is the scan driver power supply voltage VY
The voltage is divided between the H voltage 139 and the VYL voltage 141 by R1 to R4, subjected to impedance conversion via a voltage follower circuit using operational amplifiers 131 to 133, and output. The VX1 voltage 143 is further output from the reference voltage 145 via a voltage follower circuit.

The resistances R1 to R4 have the following relationship: R1 = R4, R2 = R3. Further, among the above voltages, there is a relationship of VYH> VY0> VYL, VYH-VY0 ≒ VY0-VYL, VX2> VX1> VX0, VX2-VX1 = VX1-VX0.

The VY0 voltage 140 is generated by the voltage correction circuit 135 using the CL1 signal 106 based on the reference voltage 145.

FIG. 7 shows an embodiment of the voltage correction circuit 135. R5 is a resistor for current detection, and is provided in series with the non-selection voltage line for driving the scan electrode. The distortion of the non-selection portion of the scan electrode driving waveform is caused by a current flowing through the scan electrode due to the crosstalk at the switching of the data voltage, and a voltage drop of the circuit resistance. The current flowing through the scan electrode can be predicted from the current flowing through the power supply circuit. Therefore, the distortion of the non-selection portion of the scan electrode drive waveform can be predicted by the current value flowing through the scan electrode drive non-selection line of the power supply circuit. That is, by detecting the voltage generated at both ends of R5, the distortion of the non-selected portion of the scan electrode drive waveform can be detected.

An operational amplifier circuit is composed of the resistors R11 to R14 and the operational amplifier 151. The terminal of the resistor R5 on the scan electrode driving circuit side is connected to R13 on the non-inverting amplifier side of the operational amplifier circuit. Is connected to R11 on the inverting amplification side of the operational amplifier circuit. At this time, if the inversion gain is A, then A = R12 / R11, if the non-inversion gain is B, B = R14 (R11 + R12) / (R11 (R13 + R
14)). Further, an integrating circuit (however, an inverting integrating circuit) is provided by a resistor R15, a capacitor C1, an operational amplifier 152, and a switch 153 that performs an on / off operation in accordance with the CL1 signal.
Is configured. In this circuit, the integration circuit also serves as the correction voltage generation circuit.

The operation of the circuit shown in FIG. 7 will be described below.

When no current i flows through the output (no waveform distortion), the output voltage VY0 becomes the same as the reference voltage 145. When the current i flows, the output voltage v of the operational amplifier circuit
2 is the output voltage of the integrating circuit as v1 (provided that the reference voltage 145 is 0 V) v2 = -A.v1 + B. (V1-i.R5) =-B.R5.i + (BA) .v1 Becomes Further, the output of v1 through the integration circuit is v1 = BDDR5∫idt- (BA) ∫v1d
t. However, D = C1 / R15.

Here, a method of performing correction without integrating assuming that A = B can be considered. That is, the correction is performed with v1 = K · i. In this method, the correction is performed according to the current value. However, considering the load on the liquid crystal panel, the current i acts in the direction in which the current i increases due to the change in v1. A large current is required.
Actually, there is a drawback that the correction is not sufficient or the circuit is not stable. As a countermeasure, JP-A-6-27899
However, a method of correcting the described data voltage and a method of using a time delay element are conceivable. However, the method of correcting the data voltage has a side effect of causing display flickering, and the method of using the time delay element has a drawback that the circuit becomes complicated.

Therefore, in this embodiment, the effect of the time delay is used and the amplitude of the correction is reduced by first using the integration of the current value for the correction. Here, since the current changes for each temporary division, the integral value needs to be reset for each temporary division.
Further, by stating that A <B (A ≠ B), a term for suppressing the change in v1 is included, thereby stabilizing the circuit. As described above, a sufficient correction can be obtained in a stable state.

(Embodiment 2) Next, a second embodiment of the liquid crystal display device to which the present invention is applied will be described with reference to FIG. In the second embodiment, a signal modulating means is added to the correction circuit in order to remove the influence of noise in the circuit or optimize the correction characteristics. FIG. 8 shows a power supply circuit according to the second embodiment. A signal modulation circuit 146 is provided between the operational amplification circuit 136 and the integration circuit 137. One embodiment of the signal modulation circuit is shown in FIGS. FIG.
As shown in (a) and (b), the signal modulation circuit 146 is formed of a bidirectional diode, so that the integration circuit does not operate unless a voltage higher than the forward voltage of the diode is input. Accordingly, correction can be performed without detecting circuit noise. Even when correcting shadowing that occurs above and below the vertical ruled line, strictly appropriate due to the difference in the dielectric constant of the liquid crystal between the case of a black ruled line on a white background and the case of a white ruled line on a black background. The correction amount is different. However, when the correction voltage is generated by basically detecting the current on the scanning electrode as described above, it is difficult to change the correction amount according to the difference between the white background and the black background. By giving a threshold value to the integral correction in the signal modulation circuit 146, the correction amount between the white background and the black background can be pseudo-optimized.

As described above, in the first and second embodiments, the VY0 voltage and the VX1 voltage are separated from each other.
It is also possible to take from the voltage output. It is also possible to load a circuit for amplifying the current at the output of the integrating circuit.

The orthogonal function W1 signal and W2 signal of the present invention
The signal is generated and driven in the scan driver, but the present invention is not limited to this. There is no problem in generating the signal outside the scan driver and supplying the orthogonal function to the scan driver and the data driver. Further, there is no problem if one chip is formed as one driving IC in combination with the power supply circuit.

Further, in the first and second embodiments, the number of lines to be simultaneously selected is described as two. However, the present invention is not limited to this, and a similar effect can be obtained if the number is other than two.

(Embodiment 3) Next, a third embodiment of the present invention will be described.
Will be described with reference to FIG. In the configurations of the first and second embodiments, since a transient waveform distortion is detected, the analog calculation result of the correction voltage becomes too large than an appropriate value, and the shadowing reduction effect may be reduced by half depending on a display pattern.

Therefore, in this embodiment, as shown in FIG. 10, the divided output 145 (reference voltage) for the non-selection voltage
And the signal modulation circuit 146 (or the operational amplifier circuit 13
A pair of bidirectional Schottky diodes 147 are provided between the output of the sixth operational amplifier 151). Two resistors R
16 and R17, the current flowing through the integrating circuit 137 is reduced by the Schottky diode 147.
Can be limited to the ratio VF / R17 of the threshold voltage VF and the resistor R17, so that overcorrection due to transient current can be suppressed.

(Embodiment 4) Next, with reference to FIGS. 11 to 14, an embodiment having a function of correcting the selection voltage of the scanning electrode in addition to the above-described Embodiments 1, 2 and 3 will be described.

As described with reference to FIG. 17, black (off) display is concentrated on the second (Y2) and third (Y3) scanning lines, and ruled lines are displayed on a white (on) background. In such a case, the second line (Y2) and the third line (Y3) of the scanning line have a small dielectric constant of the liquid crystal, so that the time constant is small and the waveform is less rounded. Therefore, the portion where the time constant is large and the effective value decreases due to the high dielectric constant of the liquid crystal in the background of the white display (point B in FIG. 17A) is the left and right white display portion of the horizontal ruled line (FIG. 17A).
(A) point A, as shown in FIG. 11, the reference voltage (VYH, VYL) is changed from the original selection voltage (VYH, VYL).
A predetermined voltage (VYHA, VYLA) close to 0) is supplied as a selection voltage with a pulse width according to the display content. The pulse widths are defined by the correction pulses CC1 and CC2. The scan electrode driving circuit to which the signals are input is replaced with the reference voltage (VY0) instead of the original selection voltage (VYH or VYL) during the selection pulse input period. (VYHA or VYLA) is selectively supplied to the scan electrodes.

The pulse widths of the correction pulses CC1 and CC2 are controlled by the contents of the display data signal for each row, and as shown in FIG. Select voltage (VYH or VY
The correction of the effective value is performed by a predetermined voltage (VYHA or VYLA) selectively supplied instead of L). Therefore, the characteristics are different from those of a clock having a fixed pulse width, such as a temporary division period that is a part of the system clock or the line clock CL1.

By the above-described correction, it becomes possible to match the effective value of the left and right white display portions of the horizontal ruled line with the effective value of the white background portion, thereby reducing display unevenness.

FIG. 13 shows a block configuration of the liquid crystal display device in this case. As shown in FIG. 13, a correction clock generation circuit 148 is provided in addition to the circuits disclosed in the first to third embodiments. The correction clock generation circuit 148 inputs a part D2 to D0 (or D7 to D0) of the display data signal from the liquid crystal controller 109, the data clock signal CL2, the line clock signal CL1, and the frame synchronization signal FLM, and turns on the display (or The number of display data indicating “display off” is counted for each row, and correction pulses CC1 and CC2 corresponding to the count number are output. When the number of simultaneously selected scanning lines is n, n types of correction pulses CC1 to CC1 are used.
Output CCn.

Each of the scan electrode driving circuits selects the first selection voltage (VYH, VYL) of the scanning line among the power supply voltages from the power supply circuit shown in FIG. 14 according to the presence or absence of the correction pulse.
Any one of the second selection voltages (VYHA, VHL
A) Any one of them is selectively output. As a method of matching the effective values of the white background portion and the white display portions on the left and right sides of the horizontal ruled line, it is also conceivable to apply a correction voltage that increases the effective value in a direction where the effective value decreases due to waveform rounding. However, in this case, a voltage higher than VYH is generated as the power supply voltage. Therefore, when the selection voltage is corrected, the portion where the effective value is reduced as in the present embodiment is replaced by another portion. It is desirable to match.

Further, any one of the first to third embodiments described above is combined as a voltage correction circuit.

In the first to fourth embodiments, two scanning lines are selected at the same time, and the selection period is continuous. However, as shown in FIG. 15, a method for separating the selection period is also provided. As a result, display unevenness in the horizontal direction is more effectively reduced. In particular, if the number of simultaneously selected scanning lines is 2
The selection period is separated as shown in FIG.
The so-called two-line selection and six-line shift method in which the orthogonal function is completed for each line is optimal from the viewpoint of the amount of memory provided in the drive circuit and the drive voltage, and it is preferable to combine this method with the first to fourth embodiments.

(Embodiment 5) The frame frequency exceeds about 80 Hz in the conventional system and is about 150 Hz or more (ideally, 3 Hz).
For displaying moving images that require (up to about 00 Hz), in addition to the improvement in the liquid crystal drive described in the above-described first to fourth embodiments, driving is performed with a high-speed response such as a response speed of about 150 ms or less (ideally up to about 80 ms). It is necessary to compensate for the optimal combination of the liquid crystal material and the optical member accompanying the narrowing of the gap of the liquid crystal layer, and further, the reduction of the contrast caused by the correction for reducing the shadowing.

In order to realize high-speed driving on the driving surface, it is important to select an optimal liquid crystal material in a practical product, and a liquid crystal material having a high response speed has been developed conventionally.

In general, in order to increase the response speed of STN liquid crystals, a “next-generation liquid crystal display technology” (Industry Research Committee, 1
Published November 11, 994), pages 136 to 138
As described on the page, the product (Δnd) of the refractive index anisotropy (Δn) of the liquid crystal and the thickness of the liquid crystal layer (cell gap: d) is 0.
It is important that the viscosity (η) of the liquid crystal and the thickness of the liquid crystal layer (cell gap: d) be as small as possible so as to be about 8 to 0.9 μm.

The response time (τ) of the liquid crystal is generally
Although it is proportional to ηd ² , when the cell gap is reduced to about 4 μm or less, the proportional relationship is not obtained due to factors such as a portion of the liquid crystal layer which does not contribute to the electro-optical change at the interface of the alignment layer of the liquid crystal layer. It does not work and the viscosity of the liquid crystal has to be reduced. Further, the thickness (cell gap: d) of the liquid crystal layer is, as a lower limit, about 4 μm from the viewpoint of manufacturing difficulties and the like, and the upper limit is 7 μm from the viewpoint of response speed, and practically, 5 to 6 μm is preferable. The synergistic effect of combining a liquid crystal material having a low viscosity with the drive circuits described in the first to fourth embodiments makes it possible to realize a liquid crystal display device with high image quality and high response speed.

As a liquid crystal material satisfying the above conditions, a low-viscosity liquid crystal described in JP-A-59-11386 may be used.
General formula

[0062]

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As a mixed liquid crystal obtained by adding a liquid crystal represented by the formula (1) as a viscosity reducing agent, or as a viscosity reducing agent described in JP-A-4-235935,

[0064]

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A mixed liquid crystal to which a liquid crystal represented by the following formula (1) is added.

Also, in addition to the above-mentioned document “Next-generation liquid crystal display technology”, materials for the 16th liquid crystal discussion meeting (3L304 on October 2, 1990) and materials for the 18th liquid crystal discussion meeting (1992)
October 2, 3rd, 2D13), JP-A-6-329566
JP, JP-A-7-126199, JP-A-8-2
As described in Japanese Patent No. 59478 and the like, a liquid crystal material having a large Δn and low viscosity has a general formula

[0067]

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A mixed liquid crystal containing a difluorostilbene-based liquid crystal represented by the following formula:

Also, JP-A-5-51332, JP-A-5-170679, JP-A-5-208925, JP-A-5-279278, and JP-A-5-33
As described in, for example, Japanese Patent No. 1084, the liquid crystal material having a low viscosity and being stable to light has a general formula

[0070]

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A mixed liquid crystal containing a liquid crystal represented by the following formula:

The low-viscosity mixed liquid crystal described above has a viscosity (2
0 ° C) is 20 mPa · s or less,
It is desirable to combine with the drive circuits described in the first to fourth embodiments that drive at a response speed of about 150 ms or less. In particular, when a practical cell gap of about 5 to 6 μm is employed, the low-viscosity liquid crystal material defined by the above (Chem. 3) or (Chem. 4) is used as a main component and the viscosity of the mixed liquid crystal as a whole (20 It is desirable to use a combination with a liquid crystal material such that ΔC) is 15 mPa · s or less, preferably 13 mPa · s or less. When about 6 μm is adopted as the cell gap, the above (Chemical Formula 3) or (Chemical Formula 4) It is desirable to mix a prescribed low-viscosity liquid crystal material with a liquid crystal material having a viscosity (20 ° C.) of 13 mPa · s or less as a whole of the mixed liquid crystal.

Although a high-speed response can be achieved to some extent by lowering the viscosity of the liquid crystal, in order to achieve a higher speed by narrowing the cell gap,
The above product (retardation: Δnd) is 0.8 to 0.9.
To set the range to μm, a liquid crystal having a large refractive index anisotropy is required.

However, such a liquid crystal generally has a high wavelength dependency, and a change in color tone and luminance due to a viewing angle becomes remarkable in a low wavelength region, so that a high Δn wavelength dependency (wavelength dispersion characteristic) is required. The use of a retardation film is essential for practical products.

FIG. 18 is a view for explaining the optical arrangement constituting the liquid crystal display device according to the present invention. The liquid crystal layer is filled between the upper liquid crystal substrate 30 and the lower liquid crystal substrate 31 at an interval of the cell gap d, and a pair of phase difference films 34 sandwich the cell constituted by the upper liquid crystal substrate 30 and the lower liquid crystal substrate 31. , 35
, A pair of polarizing plates is disposed.

An alignment layer of a polymer film is disposed at the liquid crystal layer interface between the upper and lower liquid crystal substrates, and the rubbing alignment directions 40 and 41 are defined in order to define the twist angle θ of the liquid crystal molecules.
Is determined as shown in the figure. As shown in FIG. 19, the rubbing alignment direction is formed so as to be symmetrical in the horizontal direction of the liquid crystal panel, and the twist angle θ is set to 230 to 260 degrees. Also, the optical axes 44, 4 of the retardation films 34, 35
The direction 5 is 40 to 90 degrees (preferably 70 to 9 degrees) with respect to the adjacent rubbing orientation directions 40 and 41, respectively.
0 degrees). Further, the directions of the polarization axes 42 and 43 of the polarizing plates 32 and 33 and the directions of the optical axes 44 and 45 of the adjacent retardation films 34 and 35 respectively form angles β and δ of 20 to 70 degrees (preferably 30 degrees). 〜60 degrees).

Here, as the material used for the retardation film, those having various wavelength dispersion characteristics are disclosed as described in the above-mentioned document “Next-generation liquid crystal display technology”, pp. 131-132. The light source used for the backlight of the liquid crystal display device is about 450 nm, about 550 n.
m, a three-wavelength light source having a strong wavelength centered at about 630 nm is used. In the case where the liquid crystal used in the driving in the above-described first to fourth embodiments is adjusted so that the cell gap d is 4 to 6 μm, the center is Δn at a wavelength of 550 nm is 1.
When it is set to 0, it is desirable to use a retardation film in which Δn at a wavelength of about 450 nm is not less than about 1.1 and Δn at a wavelength of about 630 nm is not more than about 0.97.

FIG. 20 is a diagram showing the wavelength dispersion characteristics of PVA (polyvinyl alcohol), PMMA (polymethyl methacrylate), PC (polycarbonate), and PSF (polysulfone). At least one of the two retardation films is PSF (polysulfone) and the other is PC
(Polycarbonate) or both of the retardation films are preferably PSF (polysulfone).

The cell gap d of the liquid crystal is 6-7.
If it is about μm, PSF (polysulfone) and PC
(Polycarbonate) a retardation film having an intermediate wavelength dispersion characteristic, that is, when Δn at a center wavelength of 550 nm is set to 1.0, Δn at a wavelength of about 450 nm is about 1.08 or more and about 630 nm. Δn at 0.
A retardation film (for example, P
A (polyarylate)) was confirmed to be within an allowable range to some extent.

Further, even if the shadowing reduction can be achieved in view of the driving principle of the first to fourth embodiments, the optimum correction sacrifices the contrast to some extent. Blocking is essential, and the use of colored beads is an essential requirement for practical products.

The colored beads include a colored layer provided around transparent particles, black inorganic spacer particles described in JP-A-5-9027, and a polymer described in JP-A-7-2913. Pigments are evenly dispersed inside the fine particles, but in order to achieve complete blocking of light leakage in black display, beads with a large light leakage blocking effect are used in which the entire bead is colored. It is desirable.
This is because when a thin colored layer is formed on the surface of the beads, light is transmitted more toward the center of the spherical beads.

Further, in order to prevent the deterioration of the orientation of the surface of the colored beads, a film obtained from an isocyanate-based coupling agent as described in JP-A-3-33723 or a film obtained as described in JP-A-8-110523 is disclosed. In order to prevent orientation deterioration caused by impact and the like, a long chain bonded to a graft polymer chain graft-polymerized on the surface of a colored bead as described in JP-A-8-328018 in order to prevent a coating composed of an organic silane compound and further an orientation deterioration caused by impact or the like. It is desirable to provide an alkyl group.

Therefore, the beads applied to the liquid crystal display device to which the present invention is applied are colored beads colored up to the center, and a plurality of kinds of organic or inorganic substances for preventing the alignment deterioration of the bead surface. Alternatively, it is desirable to employ colored beads on which a film made of a combination thereof is formed.

[0084]

According to the present invention, in a liquid crystal display device driven at a high frame frequency of about 150 Hz or higher, high image quality with little display unevenness, high-speed response, high contrast, and wide viewing angle can be obtained. It is possible to realize a liquid crystal display device having

[Brief description of the drawings]

FIG. 1 is a diagram showing a power supply circuit output, a scanning voltage, and a data voltage of a liquid crystal display device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between an applied voltage of one scanning line (Y1) in FIG. 1 and a line clock signal CL1.

FIG. 3 is a configuration diagram of the liquid crystal display device according to the first embodiment of the present invention.

FIG. 4 is a diagram illustrating a general operation of the scan electrode driving circuit of FIG. 3;

FIG. 5 is a diagram illustrating a general operation of the data electrode driving circuit of FIG. 3;

FIG. 6 is a configuration diagram of the power supply circuit of FIG. 3;

FIG. 7 is a circuit diagram illustrating an example of a voltage correction circuit of FIG. 6;

FIG. 8 is a configuration diagram of a power supply circuit according to a second embodiment of the present invention.

9A is a circuit diagram showing an example of the signal modulation circuit of FIG. 8, and FIG. 9B is a circuit diagram of a voltage correction circuit incorporating the signal modulation circuit.

FIG. 10 is a circuit diagram of a voltage correction circuit incorporating a limiter circuit according to a third embodiment of the present invention.

FIG. 11 is a diagram showing a power supply circuit output, a scanning voltage, and a data voltage in a fourth embodiment having a function of correcting a selection voltage of a scanning electrode in the liquid crystal display device of the present invention.

12 is a diagram showing a relationship between a correction pulse (CC2), an applied voltage of one scanning line (Y2), and a line clock signal CL1 in FIG.

FIG. 13 is a configuration diagram of a liquid crystal display device according to a fourth embodiment of the present invention.

14 is a configuration diagram of the power supply circuit of FIG.

FIG. 15 is a diagram showing scan voltages obtained by separating a selection period of one scan electrode.

FIGS. 16A to 16C are diagrams for explaining the principle of occurrence of shadowing that occurs at the upper and lower parts of a vertical ruled line.

FIGS. 17A to 17C are diagrams for explaining the principle of occurrence of shadowing that occurs on the left and right portions of a horizontal ruled line.

FIG. 18 is a diagram for explaining an arrangement relationship of optical members of the liquid crystal display device according to the present invention.

FIG. 19 is a diagram for explaining a mutual relationship between adjacent rubbing directions and optical axes in the optical arrangement of the liquid crystal display device according to the present invention.

FIG. 20 is a general relation diagram of wavelength dispersion characteristics of four types of retardation films.

[Explanation of symbols]

30 upper electrode substrate, 31 lower electrode substrate, 32 upper polarizing plate, 33 lower polarizing plate, 34 upper retardation film, 35
Lower retardation film, 40: rubbing direction on upper electrode substrate, 41: rubbing direction on lower electrode substrate, 42 ...
Polarization axis of upper polarizing plate, 43: polarization axis of lower polarizing plate, 44: optical axis of upper retardation film, 45: optical axis of lower retardation film, 101: liquid crystal panel, 102: scanning electrode drive circuit, 103: data electrode Driving circuit, 104: display data, 105: data latch clock, 106: line clock, 107: leading line clock, 108: display off control signal, 109: liquid crystal controller, 110: display system body, 114: power supply circuit, 115, 116: power supply voltage group, 117, 118: orthogonal function, 130: DC-DC converter, 131 to 134: operational amplifier, 135
... voltage correction circuit, 136 ... operational amplification circuit, 137 ... integration circuit, 138 ... correction voltage generation circuit, 139,140,1
41: scan electrode driving voltage, 142, 143, 144 ...
Data voltage, 145: reference voltage, 146: signal modulation circuit, 147: limiter circuit, correction clock generation circuit, 1
51, 152: operational amplifier, 153: switch.

Claims (13)

[Claims] A pair of electrode substrates disposed so as to face each other so that each dot is formed at an intersection of an intersecting scan electrode and a data electrode; and applying a non-selection voltage or a selection voltage to the scan electrode in a predetermined time-division period. A scan electrode drive circuit to apply, a data electrode drive circuit to apply a voltage corresponding to display data to the data electrode, a non-selection voltage or a selection voltage to the scan electrode drive circuit, and a signal to the data electrode drive circuit. A liquid crystal display device comprising: a power supply circuit for supplying a voltage; wherein the power supply circuit amplifies the detected current and a resistor for detecting a current flowing through a scan electrode to which the non-selection voltage is applied. An operational amplifier circuit, and a correction voltage generating circuit that integrates the output of the operational amplifier circuit and supplies a correction voltage to the scan electrode to which the non-selection voltage is applied, by superimposing the correction voltage on a predetermined reference voltage. A liquid crystal display device comprising: a correction voltage generation circuit having a function of resetting an integration amount of an output of the operational amplification circuit for each temporary division period. 2. A pair of electrode substrates arranged so that each dot is formed at an intersection of a crossing scanning electrode and a data electrode, and a non-selection voltage or a selection voltage is applied to the scanning electrode in a predetermined time division period. A scan electrode drive circuit to apply; a data electrode drive circuit to apply a voltage corresponding to display data to the data electrode; and two types of selection in which the scan electrode drive circuit has a different potential in the positive direction around a predetermined reference potential. Four kinds of selection voltages consisting of a voltage and two kinds of selection voltages having different potentials in the negative direction are supplied, a correction voltage is superimposed on the reference voltage and supplied as a non-selection voltage, and a signal voltage is supplied to the data electrode drive circuit. And a correction clock generation circuit for generating a signal according to display contents, the liquid crystal display device comprising: a scanning circuit to which the non-selection voltage is applied; A resistor for detecting a current flowing through the electrode, an operational amplifier for amplifying the detected current, and integrating the output of the operational amplifier to correct the scan electrode to which the non-selection voltage is applied to a predetermined reference voltage A correction voltage generation circuit configured to supply a voltage by superimposing the voltage, the correction voltage generation circuit having a function of resetting an integration amount of an output of the operational amplification circuit for each temporary division period; A liquid crystal display device which supplies one of the four types of selection voltages to the scan electrodes as a selection voltage in response to a signal from the correction clock generation circuit. 3. A liquid crystal display as claimed in claim 1, wherein a signal modulation circuit comprising a pair of bidirectional diodes is arranged between said operational amplifier circuit and the correction voltage generation circuit. Display device. 4. A limiter circuit comprising a pair of bidirectional diodes is arranged between the predetermined reference voltage and the output of the operational amplifier circuit. The liquid crystal display device as described in the above. 5. The scanning electrode driving circuit sequentially applies a selection voltage according to a predetermined orthogonal function to a plurality of scanning electrodes sequentially, and the signal electrode driving circuit outputs a signal voltage according to the orthogonal function and a display content. The liquid crystal display device according to any one of claims 1 to 4, wherein the voltage is applied to an electrode. 6. The operational amplifier circuit, wherein both terminals of a resistor for detecting a current flowing through the scan electrode are connected to an inverting amplifying terminal and a non-inverting amplifying terminal of the operational amplifying element, respectively. 6. The liquid crystal display device according to claim 1, further comprising an operational amplifier element having a different amplification factor. 7. The liquid crystal display device according to claim 1, wherein when the gap d between the electrode substrates is 4 to 7 μm, a liquid crystal material having a viscosity at 20 ° C. of 20 mPa · s or less is provided between the electrode substrates. The liquid crystal display device according to claim 1 or 2, wherein: 8. In the liquid crystal display device, when the gap d between the electrode substrates is 5 to 6 μm, a liquid crystal material having a viscosity at 20 ° C. of 15 mPa · s or less is provided between the electrode substrates. 3. The method according to claim 1, wherein
3. The liquid crystal display device according to 1. 9. The liquid crystal display device, wherein when the gap d between the electrode substrates is about 6 μm, a liquid crystal material having a viscosity at 20 ° C. of 13 mPa · s or less is provided between the electrode substrates. The liquid crystal display device according to claim 1 or 2, wherein: 10. A liquid crystal display device having a frame frequency of 1
3. The liquid crystal display device according to claim 1, wherein a difluorostilbene-based liquid crystal is used between the electrode substrates when driven at 50 Hz or more. 11. A liquid crystal display device comprising: a backlight including a three-wavelength light source having a strong wavelength centered at about 450 nm, about 550 nm, and about 630 nm; and a pair of polarizing plates sandwiching the electrode substrate. A retardation film, and the refractive index anisotropy Δn of the retardation film.
However, when Δn when the wavelength is approximately 550 nm is 1.0, the wavelength dispersion characteristic is such that Δn at approximately 450 nm wavelength is approximately 1.1 or more and Δn at approximately 630 nm wavelength is approximately 0.97 or less. The liquid crystal display device according to claim 1, further comprising: 12. The liquid crystal display device according to claim 1, further comprising a backlight comprising a three-wavelength light source having a strong wavelength centered at about 450 nm, about 550 nm, and about 630 nm, and at least a pair of polarizing plates sandwiching the electrode substrate. 3. The liquid crystal display device according to claim 1, further comprising one retardation film, wherein the retardation film is made of polysulfone. 13. A liquid crystal display device having a frame frequency of 1
When driven at a frequency of 50 Hz or more, between the electrode substrates, colored beads are colored up to the center,
3. The liquid crystal display device according to claim 1, wherein a colored bead on which a coating made of a plurality of kinds of organic or inorganic substances or a combination thereof is formed is used as a spacer.