JPH10135357A - Semiconductor non-volatile memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable reduction in thickness of a gate insulating film and enable low-voltage operation while maintaining stable operation as in a conventional technique, by forming a floating gate using a material with a conduction band energy level lower than that of silicon. SOLUTION: A floating gate 13 formed on a semiconductor substrate 11 via a gate insulating film 12 is made of a material having a conduction band energy level lower than that of silicon. For example, as the material having a conduction band energy level lower than that of silicon, polycrystal germanium or a mixed crystal of silicon and germanium is used. Thus, an energy barrier of the gate insulating film 12 for accumulating electric charges similarly to a conventional technique may be made small. Therefore, the thickness of the gate insulating film 12 may be made smaller than in the conventional technique, and tunneling is more likely to occur. Thus, the device operates even at a low voltage, enabling writing and reading at a low voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor nonvolatile memory device.

[0002]

2. Description of the Related Art Generally, a semiconductor nonvolatile memory device includes a floating gate formed on a semiconductor substrate via a gate insulating film, and a control gate formed on the floating gate via an insulating film. ing. The floating gate is usually formed of polycrystalline silicon.

[0003] Writing in such a nonvolatile semiconductor memory device is performed by accumulating charges in the floating gate by causing electrons to penetrate the gate insulating film and be injected into the floating gate by a tunnel phenomenon.
Erasing removes the charge stored in the floating gate,
Release is performed by causing a reverse tunnel phenomenon.

As described above, accumulation and release of electric charges are means of information storage. The storage performance of a semiconductor nonvolatile memory device depends on the accuracy of the state in which electrons are injected into the floating gate to accumulate electric charges. ing.

[0005]

However, since the floating gate of the semiconductor nonvolatile memory device is formed of polycrystalline silicon, the difference in the conduction band energy level between the floating gate and the gate insulating film is small.
Therefore, it is easy to transfer charges and impurities between the floating gate and the gate insulating film. Therefore, the gate insulating film needs to be thick enough to prevent leakage of electric charges and intrusion of impurities. On the other hand, in order to inject electrons into the floating gate, a voltage enough to penetrate the thickness of the gate insulating film is required.

[0006] In addition, in order to perform low-voltage operation, it is required to accumulate and discharge charges quickly and accurately in a floating gate. Therefore, a thinner gate insulating film is required for the charge injected at a low voltage to pass through the gate insulating film and reach the floating gate. However, when the thickness of the gate insulating film is reduced, leakage of charges from the floating gate and intrusion of impurities from the outside into the floating gate easily occur.

[0007] As described above, contradictory events are required that electrons easily reach the floating gate and that loss of charge from the floating gate is suppressed. However, because the difference in conduction band energy level between polycrystalline silicon and the gate insulating film is small,
A floating gate formed of polycrystalline silicon has a low ability to capture accumulated charges. in this way,
If the floating gate as the information storage medium is formed of polycrystalline silicon, it is difficult to store information accurately for a long period of time.

[0008]

SUMMARY OF THE INVENTION The present invention is a semiconductor non-volatile memory device for solving the above-mentioned problems.

That is, the semiconductor device includes a floating gate formed on a semiconductor substrate via a gate insulating film, wherein the floating gate is formed of a material having a lower conduction band energy level than silicon.

In the above-mentioned semiconductor nonvolatile memory device, since the floating gate is formed of a material having a lower conduction band energy level than silicon, the energy level of the conduction band of the floating gate is formed of silicon (including polycrystalline silicon). Lower than the floating gate. Therefore, the energy barrier of the gate insulating film may be smaller than that of the conventional structure in accumulating the same charges as in the conventional case. Therefore, the thickness of the gate insulating film can be made thinner than the conventional one. Since the tunnel phenomenon easily occurs by making the film thin, the device can be operated even at a low voltage. That is, writing and reading are performed at a low voltage.

On the other hand, even if the thickness of the gate insulating film is reduced, the difference in barrier between the energy level of the floating gate and the energy level of the gate insulating film is assured as in the prior art, so that charges are stably accumulated. You. Further, intrusion of impurities is also prevented. Therefore, as compared with the case where the floating gate is formed of polycrystalline silicon, even if the gate insulating film is thinned, the storage performance of information does not deteriorate.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to FIG. As shown in FIG. 1, a floating gate 13 is formed on a semiconductor substrate 11 via an insulating film 12 (hereinafter, referred to as a first gate insulating film). On the floating gate 13, a second gate insulating film 14 is formed.
, A control gate 15 is formed. Hereinafter, a laminated structure from the first gate insulating film 12 to the control gate 15 formed on the semiconductor substrate 11 is referred to as a gate 16.

The semiconductor substrate 11 is made of, for example, single crystal silicon into which p-type impurities have been implanted. For example, boron is used as the p-type impurity, and 10 ¹⁶ [atom]
s / cm ³ ]. The first gate insulating film 12 is formed of, for example, silicon oxide having a gate length of 600 nm and a thickness of 3 nm to 6 nm. The second gate insulating film 14 has a gate length of, for example, 600
It is formed of silicon oxide having a thickness of 5 nm and a thickness of 5 nm.
Further, the floating gate 13 is formed of a material having a conduction band energy level lower than that of silicon,
For example, the gate length is 600 nm and the thickness is 50 nm. The control gate 15 is made of, for example, polycrystalline silicon having a gate length of 600 nm and a thickness of 100 nm.

Materials having a lower conduction band energy level than polycrystalline silicon include polycrystalline germanium and mixed crystals of silicon and germanium. Incidentally, based on 0 eV which is the energy level of the vacuum conduction band, the energy level of the silicon conduction band is -4.05.
eV. On the other hand, the energy level of the conduction band of germanium is -4.1 eV. Further, the energy level of the conduction band of silicon oxide is -0.9 eV.

In addition, there are many materials having a lower conduction band energy level than silicon. The main materials and their conduction band energy levels are shown below. Gallium arsenide (Ga
As) is -4.07 eV, and gallium phosphide (GaP) is-
4.3 eV, indium phosphide (InP) is -4.4 e
V, indium arsenic (InAs) is -4.54 eV, indium antimony (InSb) is -4.59 eV, cadmium sulfur (CdS) is -4.79 eV, cadmium selenium (CdSe) is -4.95 eV, and cadmium telluride (CdTe). ) Is -4.28 eV.

The semiconductor nonvolatile memory device 1 has a
The semiconductor substrate on both sides of the gate 16 in the gate length direction.
Diffusion layers 17 and 18 are formed on the upper layer 11. Up
The diffusion layers 17 and 18 are made of an n-type impurity, for example, arsenic.
Diffusion from the surface of the conductive substrate 11 to a depth of 100 nm
The arsenic concentration is, for example, 10 at the peak concentration. ^{twenty one}
[Atoms / cm^Three]. Diffusion layers 17 and 18
, For example, the diffusion layer 17 functions as a source,
The other diffusion layer 18 functions as a drain. As above
The semiconductor nonvolatile memory device 1 is configured as follows.

Next, the floating gate 13 formed of germanium, which is a material having a lower conduction band energy level than silicon, will be described below. Germanium has a conduction band energy level about 0.05 eV lower than that of silicon. For this reason, the energy barrier of the first gate insulating film 12 may be small in order for the floating gate 13 formed of polycrystalline germanium to accumulate the same amount of charge as that formed by polycrystalline silicon. Since the energy barrier required to accumulate the same amount of charge is small, the thickness of the first gate insulating film 12 is changed from 8 nm to 10 nm of the related art to 3 n.
The thickness can be reduced to about m to 6 nm.

That is, as the first gate insulating film 12 becomes thinner, electrons easily pass through the first gate insulating film 12 and reach the floating gate 13 due to a tunnel phenomenon. Therefore, low-voltage operation becomes possible. In addition, since the charge can be stored at a low energy level, the charge can be stored in a stable state.

The floating gate 13 formed of a mixed crystal of silicon and germanium, which is a material having a lower conduction band energy level than silicon, will be described below. Mixed crystal of silicon and germanium is 10 atoms germanium
% To about 40 atoms%, which was used for the floating gate 13. Germanium has a conduction band energy level lower than silicon by about 0.05 ev, and the conduction band energy level value of the mixed crystal of silicon and germanium decreases linearly as the germanium content increases. In addition, since the energy level of the conduction band varies depending on the germanium content in the mixed crystal, the energy level of the conduction band can be controlled in a limited range. The germanium content is 10 atoms
%, The energy level of the conduction band cannot be sufficiently reduced as compared with that of polycrystalline silicon. On the other hand, when the content of germanium is more than 40 atoms%, it is difficult to form a stable mixed crystal.

Therefore, in order to accumulate the same amount of charge as when the floating gate 13 formed of a mixed crystal of silicon and germanium is formed of polycrystalline silicon, the energy barrier of the first gate insulating film 12 is required. May be small. The size of the energy barrier decreases linearly with the germanium content of the mixed crystal. For this reason, the thickness of the first gate insulating film 12 can be controlled within a limited range, and the thickness of the first gate insulating film
It can be made thinner than 10 nm.

As described above, when the first gate insulating film 12 is thinned, electrons easily pass through the first gate insulating film 12 and reach the floating gate 13 due to a tunnel phenomenon. Therefore, low-voltage operation becomes possible, and a power supply voltage of 3.3 V can be used (instead of using a booster circuit). In addition, charges can be stored at a low energy level, and charges can be stored in a stable state.

[0022]

As described above, according to the present invention,
Since the floating gate is formed of a material having a lower conduction band energy level than silicon, the gate insulating film can be made thinner while maintaining stable operation as in the related art. Therefore, low-voltage operation can be performed.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of the configuration of a semiconductor nonvolatile memory device according to the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 11 Semiconductor substrate 12 Gate insulating film 13 Floating gate

Claims (3)

[Claims] 1. A semiconductor nonvolatile memory device having a floating gate formed on a semiconductor substrate via a gate insulating film, wherein the floating gate is formed of a material having a lower conduction band energy level than silicon. A nonvolatile semiconductor memory device. 2. The semiconductor nonvolatile memory device according to claim 1, wherein the material having a lower conduction band energy level than silicon is made of germanium or a material containing germanium. Sex storage device. 3. The nonvolatile semiconductor memory device according to claim 2, wherein said material containing germanium is made of a mixed crystal of silicon and germanium.