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Shum et al., 1997 - Google Patents

A concept for nonvolatile memories

Shum et al., 1997

Document ID
11507705111726677274
Author
Shum K
Zhou J
Zhang W
Zeng L
Tamargo M
Publication year
Publication venue
Applied physics letters

External Links

Snippet

A concept for nonvolatile memories is proposed in which a unique combination of a Schottky junction with tunable barrier height and an adjacent electron potential well is used. A proof- of-concept demonstration is given for such a class of memory devices using ZnCdMgSe/InP …
Continue reading at pubs.aip.org (other versions)

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    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
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    • H01L29/66Types of semiconductor device; Multistep manufacturing processes therefor
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    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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