JPH0387024A - Manufacture of electrode for semiconductor device - Google Patents

Abstract

PURPOSE:To manufacture an electrode high in evenness forming a high Schottky barrier by a method wherein the surface of a semiconductor layer is irradiated with ultraviolet rays in an atmosphere containing nitrogen or sulfur and after forming a nitride layer or a sulfide layer, a Schottky electrode is formed. CONSTITUTION:After implanting Si ions in the surface of a semiinsulating GaAs substrate 1, the substrate 1 is annealed in As atmosphere to form an n type semiconductor 21. Next, this n type semiconductor layer 21 together with the substrate 1 is exposed in an atmosphere mixed with NH3/N2 gas and after irradiation with ultraviolet rays 10 to form a nitride layer 3, WNx is deposited to form a gate electrode 4. Later, Si ion is implanted in the surface of the layer 21 using the electrode 4 as a mask and then the layer 21 is annealed in AsH3/Ar mixed atmosphere to form source.drain regions 5, 6. Finally, source.drain electrodes 7, 8 comprising AuGe alloy are formed. Through these procedures, an electrode forming a high Schottky barrier high in evenness regardless of the positions in the surface can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a method for manufacturing an electrode for a semiconductor device, which is an improved method for manufacturing a Schottky electrode.

(Prior Art) In recent years, elements with excellent high-speed performance have been used in important parts of supercomputers and high-frequency communication equipment. Among these devices, there is a field effect transistor using a compound semiconductor, for example, GaAs, as a base material, which has an electron mobility at room temperature that is two to several times larger than that of St. The gate electrode of this field effect transistor is mainly of Schottky junction type because it is easy to form. However, the barrier height of this Schottky junction is about 0.7 eV, and p
There is a drawback that it is lower than -n junction or MO3 structure. Ite digital IC using such field effect transistor, for example, Diroct-coupled FET L
OGLC (DCFL) logic circuits have a very small operating margin, which poses a practical problem. Other logic circuit systems also have the same problem as long as they use field effect transistors.

Several proposals have been made to solve this problem. For example, [Journal Op the Vacuum Society Technology J (JJac,
Sci, Technol, ) B, VoL, 5. No
, 8, November 1987, pp. 1716-1722].

This will be briefly explained with reference to FIG.

First, a GaAs substrate (1) is prepared (FIG. 2(a)).

Next, nitrogen ions (20) are implanted into the surface of this substrate (1) to form a nitride layer (3) on the surface (FIG. 2(b)).

Finally, a Schottky electrode (4) made of high melting point metal nitride is formed on the surface of this nitride layer (3) by reactive sputtering (FIG. 2(C)).

By interposing the nitride layer (3) between the substrate and the electrode (4) in this way, the Schottky barrier can be made as high as about 1.2 eV. This also improves the operating margin of the IC.

However, this method has the following problems.

■ When implanting nitride ions (20) into the surface of the substrate (1), a severe impact is applied to the surface of the substrate (1), causing the surface (A
) and the internal crystallinity in its vicinity is disturbed. When many Schottky electrodes (4) are formed on a wafer, the way this disturbance occurs differs depending on the location within the plane, resulting in variations in the height of the barrier of the Schottky electrodes (4). Therefore, the manufacturing yield of ICs (the percentage of fully functioning products obtained from one wafer) could not be improved.

■ During ion implantation, metal ions are knocked out from the inner wall of the device by nitrogen ions, and carbon, oxygen, etc. adsorbed to the inner wall of the device or present in the atmosphere are implanted into the surface of the substrate (1) along with nitrogen ions. Since carbon, oxygen, and metals create various deep levels in the GaAs substrate, the characteristics such as the height of the Schottky barrier and the threshold voltage of the field effect transistor formed using this Schottky electrode are This causes unevenness.

(Problems to be Solved by the Invention) As explained above, the conventional electrode forming method can improve the height of the Schottky barrier, but the height varies within the plane and cannot be uniform within the plane. could not.

The present invention was made in view of the above problems, and an object of the present invention is to provide an electrode with a high Schottky barrier height and with good in-plane uniformity.

[Structure of the Invention] (Means for Solving the Problems) The present invention has been made in view of the above-mentioned problems. Provided is a method for manufacturing an electrode for a semiconductor device, comprising the steps of forming a nitride layer or sulfide layer on the surface of the semiconductor layer, and then forming a Schottky electrode on the surface of the nitride layer or sulfide layer. It is something to do.

(Function) In the present invention, the surface of the semiconductor layer can be changed into a nitride layer or sulfide layer simply by irradiating the surface with light in an atmosphere containing desired nitrogen or sulfur, so it is possible to avoid applying impact to the surface of the semiconductor layer. do not have. Furthermore, since the inner walls of the manufacturing apparatus are not hit with ions or the like, unnecessary impurities are not mixed into the atmosphere, and therefore impurities other than nitrogen are not introduced into the surface of the semiconductor layer. Therefore, the barrier of the Schottky electrode is high and highly uniform over the entire wafer surface regardless of location. It has been known that forming a Schottky electrode via a nitride layer formed on the surface of a semiconductor layer increases the Schottky barrier, but even if a sulfide layer is used in place of the nitride layer, this The fact that the barrier becomes higher was discovered for the first time by the inventor's experimental results.

(Example) The details of the present invention will be explained using examples.

FIG. 1 shows a Schottky gate field effect transistor according to an embodiment of the present invention.

First, for example, SL ions are deposited on the surface of a semi-insulating GaAs substrate (1) at an accelerating voltage of 50 KeV and a dose of 2 x 1012.
After implantation under the conditions of clI-2, &2 in an As atmosphere.
Annealing was performed at 0°C for 20 minutes to form an n-type semiconductor layer (2).
form. This semiconductor layer may be formed by solid phase diffusion or epitaxially directly on the substrate (1).
Figure 1(a)).

Next, the n-type semiconductor layer (2□) is placed on the substrate (1) in an atmosphere containing a mixture of NH3/N2 gas at a pressure of 1 to 10 Torr.
) and in this state is irradiated with ultraviolet light (LQ) using a low-pressure mercury lamp. The light source may be a laser. As a result, a nitride layer (3) of about 15A is formed on the surface of the n-type semiconductor layer (2□). The thickness of this nitride layer (3) is IOA
~50A is good, and IOA ~20A is preferred. The mechanism and effect of this surface nitridation will be explained in detail below. NH3
By irradiating a compound semiconductor containing at least As, such as GaAs, with ultraviolet light in a non-oxidizing atmosphere containing at least a nitrogen hydride, the following two effects occur. That is, first, the GaAs surface is reduced by activated H atoms generated by photochemical decomposition of NH3 by ultraviolet light irradiation.

At this time, As oxide such as 88203 and Ga2O
Group Ⅰ element oxides such as 3 are reduced.

Furthermore, simple As existing on the GaAs surface is also reduced and sublimated as As Hs and removed.

In compound semiconductors containing As as a constituent element such as GaAs, excess As and As oxides on the surface cause the generation of surface states, so by removing these, Ga
The surface state density on the As surface is significantly reduced. NH to i2
The semiconductor layer (
2□) An extremely thin nitride layer (3) is formed on the surface. This layer is mainly made of GaN with a bandwidth of 3 eV or more, and by forming a Schottky electrode made of a heat-resistant metal or a compound of a heat-resistant metal, etc., which will be described later, a heat-resistant pseudo-electrode is formed on this layer. A MIS junction is obtained. In this case, a barrier height of leV or more can be obtained (Fig. 1 (
b〉).

Here, the gas used in the non-oxidizing atmosphere containing nitrogen atoms is not limited to NH3, but other nitrogen hydrides such as N
H, NH, etc. may be used, or 4 3 may be a gas containing nitrogen atoms other than these, such as NF3, and in some cases, nitrogen gas alone may be used.

After this surface nitriding step, a material such as tungsten nitride (W) which forms a Schottky junction with GaAs is placed on the nitrided layer (3).
N x ), for example, by chemical vapor deposition (C
The gate electrode (4) is deposited to a thickness of about 2000 Å by VD) and then formed by ordinary photolithography using photoresist and reactive ion etching using CF4 gas.

At this time, in order to deposit the metal that will become the gate electrode (4),
In order to avoid damaging the nitride layer (3) and the n-type GaAs layer (21), it is preferable to use a method that causes less damage, such as the CVD method (FIG. 1(C)).

After that, using this gate electrode (4) as a mask, SL ions were accelerated at a voltage of 120 KeV and a dose of 3X 10
It was implanted into the surface of the semiconductor layer (21) under the conditions of 1Bcm-2, and then at 800°C in an AsH3/Ar mixed atmosphere.
Annealed for 20 minutes to remove source and drain regions (5)
, (6) is formed. Finally, source/drain electrodes (7) made of AuGe alloy.

By forming (8>), a Schottky gate field effect transistor (MESFET) is completed.

The characteristics of a GaAsMES-FET formed through the above manufacturing process and a GaAsMESFET formed by removing only the step of forming a nitride layer by ultraviolet light irradiation in a NHa/N2 mixed atmosphere were compared.

According to this, it was found that in the conventional GaAs MESFET, the height of the Schottky barrier was about 0.7 eV, but in this example, this barrier was extremely high as 1.2 eV.

In addition, the conventional MESFET shown in Fig. 2 in which a nitride layer was formed using the ion implantation method and the one of this embodiment were each molded into a 3-inch GaAs wafer, and the variation in the Schottky barrier within the plane was investigated. was measured.

As a result, in the conventional model, the dispersion σvth of the threshold voltage of the MESFET (which is an index of the Schottky barrier) is 100.
While it was about mV, in this example, it was about 5 mV.
It was found that the MESFET of the example had excellent in-plane uniformity as it was as small as 0 mV or less. A similar comparative experiment was conducted using a plurality of such wafers under the same conditions, and the reproducibility was good and this tendency remained unchanged.

Using the GaAs MESFET using the manufacturing method described above, we formed a large number of DCFL circuit type ICs, such as multiplexers, on a 3-inch GaAs wafer and measured the yield.
This is a significant improvement compared to the previous model. This is because the Schottky barrier of GaAsMESFE,T, which is the basic element of IC, is high and the operating margin of the circuit itself is large, and furthermore, the in-plane variation of this Schottky barrier is By decreasing each G a A s M
This is due to the combined effect that ESFET has a uniform threshold voltage.

Next, another embodiment of the present invention will be described.

This example goes through the same steps as the previous example shown in Figure 1, except that the nitride layer (
3) The formation process is a reduction and sulfide layer formation process. This process will be explained in detail below.

In this step, as shown in FIG. 1(b), the n-type semiconductor layer (2□) is exposed together with the substrate (1) in an atmosphere containing H2S/Ar gas, and in this state, ultraviolet light is applied using a low-pressure mercury lamp. (10) Irradiate. The light source may be a laser. As a result, a sulfide layer (3) of about 15A is formed on the surface of the n-type semiconductor layer (2□). This sulfide layer only needs to have at least one layer of S atoms, and its film thickness is preferably IOA~50^, preferably 10~20A.

In this step, activated H atoms are generated by ultraviolet light irradiation in a reducing atmosphere containing at least hydrogen sulfide,
The surface of a compound semiconductor containing As as a constituent element can be reduced. At this time, As oxides such as As 2 O and oxides of group Ⅰ elements such as Ga2O33 are reduced. Furthermore, the excess element As present on the surface of the compound semiconductor is also reduced to As
It sublimates in the form of Hs and is removed.

In compound semiconductors such as GaAs that have As as a constituent element, excess As and As oxides on the surface are said to be the cause of the generation of surface states, and by removing these, the surface states of the compound semiconductor are reduced. It is possible to significantly reduce the potential density. Furthermore, as another effect of the above-mentioned treatment, sulfur atoms generated from hydrogen sulfide in the atmosphere are adsorbed to the surface of the compound semiconductor semiconductor, resulting in Ga-3 bonding, and when the compound semiconductor is taken out into the atmosphere after the treatment, surface oxidation is suppressed. Thereby, a state in which the surface state density is reduced can be maintained for a long time even in the atmosphere.

After that, as in the previous embodiment, a Schottky electrode and source/drain ohmic electrodes are formed, and the ME S
FET is completed.

It has been found that the MESFET formed through such a process also has a high Schottky barrier of about 1 eV as in the previous example, and that the uniformity of the barrier within the wafer surface is improved.

The reason for this is that the adsorbed sulfur atoms act as negative fixed charges on the surface of the compound semiconductor, moving the surface Fermi level toward the valence band side. It is considered that a barrier height of ~1 eV was obtained by forming a gate electrode made of tungsten nitride on the surface of this compound semiconductor.

Note that the present invention is not limited to the above-described embodiments, and may be modified as follows.

■ The gas used in the non-oxidizing atmosphere containing nitrogen atoms is not limited to NH3, but other nitrogen hydrides such as N
It may be H, NH, etc., or it may be a gas containing nitrogen atoms other than these, such as NF3, and in some cases, nitrogen gas alone may be used.

(2) The light used in forming the nitride layer or sulfide layer is not limited to ultraviolet light, but may also be X-rays, γ-rays, etc., as long as it has enough energy to activate the non-oxidizing atmosphere containing nitrogen atoms.

(2) The semiconductor layer on which a nitride layer or sulfide layer is formed is not limited to an n-type semiconductor layer, and may be a P-type or I-type semiconductor layer.

■ The material of the Schottky electrode is tungsten nitride (WN
x), other high melting point metal nitrides such as molybdenum nitride (M o N
MoSix) or a silicon nitride of a high melting point metal such as tungsten silicon nitride (WSixNy). Furthermore, single high melting point metals and alloys containing high melting point metals such as molybdenum (Mo), tungsten (W), titanium (Tt), tungsten aluminum CWAf! ),
Titanium tungsten (TiW) may also be used.

(2) The method for forming the Schottky electrode is not limited to the CVD method, and may be a sputtering method or a vapor deposition method.

■ The semiconductor substrate on which the semiconductor layer is formed is made of GaAs.
, but also other As-containing compound semiconductors such as GaA[
As, I nAlAs.

InGaAs or the like may be used, and in this case, the substrate may be one in which these semiconductor layers are provided on another substrate such as an InP or GaAs substrate. Further, other compound semiconductors such as InP, GaP, etc. may be used, and furthermore,
Group (2) semiconductors such as St and Ge may also be used.

■ The method of annealing the ion-implanted layer is A s Ha
In addition to the capless annealing method in an atmosphere, a cap annealing method using silicon oxide (S iO 2 ), silicon nitride (Si 2 H 4 ), aluminum nitride (Al 7 N), or the like as a coating film may be used.

■ The circuit format used when forming digital ICs is DCF.
L was used, but other materials such as S L CF (S
ouse Coupled F E T Logl
According to the above configuration using c), it is possible to obtain a high Schottky barrier and a uniform one regardless of the location within the plane.

[Brief explanation of drawings]

Fig. 1 is a cross-sectional view of the process order showing one embodiment of the present invention;
The figure is a cross-sectional view showing a conventional example in the order of steps. 1... GaAs substrate, 2... n-type semiconductor layer, 3...
-Nitride layer, 4...gate electrode, 5...source region,
6... Drain region, 7... Source electrode, 8...
drain electrode.

Claims (1)

[Claims] A step of forming a nitride layer or a sulfide layer on the surface of the semiconductor layer by exposing the semiconductor layer to an atmosphere containing nitrogen or sulfur atoms and irradiating it with light, and then forming a Schottky layer on the surface of the nitride or sulfide layer. 1. A method of manufacturing an electrode for a semiconductor device, comprising the step of forming an electrode.