JPH06244409A - Preprocessing method for compound semiconductor substrate - Google Patents

Abstract

PURPOSE:To constitute an MIS-type device that exhibits good characteristics an a compound semiconductor substrate. CONSTITUTION:On a wafer where a gate recess 4 is formed on the lamination of an n-type GaAs layer 2 and an n<+>-type GaAs layer 3, a plasma-process is done using the gas containing nitrogen compound, and then by generating GaN of low vapor pressure on the wafer surface, a passivation layer 5 is formed. Since oxidation on the surface of the wafer is prevented with this passivation layer 5, interface level density between this and an SiN insulation film 6 laminated in post-process is reduced, thus good device characteristics is obtained. As for gas, NF3/N2 mixture gas and Cl2/N2 gas are used.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pretreatment method for a compound semiconductor substrate, and in particular, assuming the structure of a MIS (metal / insulator / semiconductor) type semiconductor device, the interface state at the laminated interface between the insulator and the semiconductor is considered. It relates to a method of passivating to reduce the density.

[0002]

MIS structures, ie metals, insulators,
The structure in which semiconductors are sequentially stacked is an indispensable structural element for forming an FET (field effect transistor).
This MIS structure is composed of a silicon layer formed on a Si substrate.
It has already been proven in devices. Especially when an oxide such as silicon oxide (SiO ₂ ) is used as the insulator,
It is widely known as a MOS (metal / oxide / semiconductor) structure.

By the way, in general, MIS type semiconductor devices are
How to determine the interface state density between the semiconductor and the insulating film
Reduction is an important key to determine the characteristics. This view
From the standpoint of responding to the recent needs for device speedup,
See compound semiconductor devices that are being researched
Therefore, it is extremely difficult to achieve the MIS structure. Was
For example, the surface of a GaAs compound semiconductor is oxidized by
Even if an insulating film is formed by
Because it is difficult to reconstruct the¹³/ Cm ²eV
An order interface density is generated. This value is Si and S
iO₂It is about three orders of magnitude higher than the interface state density between. This
As a result, the Fermi quasi
Position is pinned and reversal does not occur,
However, unstable characteristics such as drift phenomenon appear
Inconvenience occurs.

On a compound semiconductor substrate, SiO ₂ or A
Attempts have been made to use an inorganic insulating film such as l ₂ O ₃ but have not succeeded in reducing the interface state density.

As a technique for lowering the interface state density, sulfur passivation is known in which S (sulfur) atoms are adsorbed on the surface of a GaAs substrate. For example, 1989 IEICE Technical Research Report (ED-8
9-65), or Japanese Journal
l of Applied Physics, 28 (1
2), L2255-2257 (1989), GaA
A technique for adsorbing sulfur on the surface of an s substrate by wet etching with a (NH ₄ ) ₂ S _x (ammonium sulfide) solution has been reported.

Further, Japanese Patent Laid-Open No. 4-91435 discloses that
Prior to the ammonium sulfide solution treatment as described above, Ga
A technique of wet etching the surface of an As substrate with a phosphoric acid solution is disclosed. According to this technique, a phosphoric acid-based etchant can obtain a forward-mesa (forward-tapered) etching pattern, so that the interface between the III-V compound semiconductor and the insulating film is reconstructed in the direction of reducing dangling bonds. Therefore, it is said that the interface state density can be reduced.

On the other hand, as a method of reducing the interface state density, which is different from the above-mentioned sulfur passivation, a technique of forming an insulating film with a thin film of an organic compound has been reported. This is largely due to the progress of the organic thin film forming technique by the LB method (Langmuir-Blodgett method). For example, Solid State Electron De
Vices, 5 , p. 169 (1978) includes n-type I
A stearic acid thin film is formed on the nP substrate by the LB method,
It has been reported that the interface state density of 10 ¹¹ / cm ² eV was achieved and the inversion and FET characteristics were confirmed.

Further, Japanese Patent Application Laid-Open No. 62-65471 discloses a technique for forming a hydrazone compound film on a GaAs substrate by the LB method. This is because an organic molecule having a non-bonding orbital is bonded to a dangling bond on the surface of a semiconductor so that the energy level of the bonding orbital is above the valence band of the compound semiconductor and the energy level of the antibonding orbital. Is formed below the conduction band, thereby reducing the energy level density in the forbidden band.

Further, a passivation technique based on a dry process, rather than the above-described wet process, is also known. For example, JP-A-3-265135
In the publication, the surface of a GaAs substrate before forming an integrated circuit is S
A technique of performing exposure to plasma using F ₆ gas is disclosed. This is also a kind of the above-mentioned sulfur passivation, and the S atoms released by SF ₆ gas into the plasma under the discharge dissociation condition are adsorbed on the GaAs substrate.

[0010]

However, each of these conventional techniques has its own problems. First,
In sulfur passivation using a (NH ₄ ) ₂ S _x (ammonium sulfide) solution, etching of the compound semiconductor substrate also proceeds. Therefore, if impurities have been introduced into the surface of the substrate in advance, the impurity-added region may be removed and desired MIS characteristics may not be obtained. This problem becomes more apparent in wet etching using a phosphoric acid solution. Further, in these wet processes, it is not possible to independently control the S deposition process and the etching process, and therefore the reproducibility of sulfur passivation cannot be said to be sufficiently excellent.

On the other hand, in forming the organic insulating film by the LB method, although the interface state density was considerably reduced, Si
It is still higher than the interface state density of / SiO ₂ . This is an inherently unavoidable problem in the LB method. That is, in the LB method, a compound semiconductor substrate is immersed in a water tank having an organic molecular film developed on the surface, and the molecular film is transferred onto the substrate to form a thin film. Because it exists.

Further, as a problem common to the wet process, it is unavoidable that the manufacturing apparatus becomes large-scale. Since the insulating film of the MIS type semiconductor device is generally formed by a dry process such as sputtering or CVD, if a wet process is performed before forming this insulating film, the number of manufacturing devices and the clean room due to these are naturally used. This is because the area occupied by is increased. As a result, there is a high possibility that the economy and the throughput will be impaired.

On the other hand, the dry process is far more advantageous than the wet process in terms of manufacturing process and manufacturing equipment consistency. It is also possible to balance the deposition process and the etching process by controlling the discharge conditions. However, the problem of removing the impurity-added region remains similarly in the plasma processing using SF ₆ gas as described above. This is because SF ₆ is S under discharge dissociation conditions.
A large amount of F ^* (fluorine radical) is emitted at the same time
This is because the F ^* acts as an etchant for many compound semiconductors.

Therefore, an object of the present invention is to solve all of these problems and to provide a method of performing passivation by a dry process with excellent reproducibility without unnecessary etching of a compound semiconductor substrate.

[0015]

The pretreatment method for a compound semiconductor substrate of the present invention is proposed in order to achieve the above-mentioned object, and the surface of the compound semiconductor substrate is covered with a predetermined compound semiconductor substrate. It is covered with a nitride film formed by the bonding of constituent atoms and nitrogen atoms.

According to the present invention, the nitride film is formed by subjecting the compound semiconductor substrate to plasma treatment using a gas containing a nitrogen compound.

The present invention further uses a substrate having Ga atoms as constituent atoms as the compound semiconductor substrate and produces a GaN film as the nitride film.

[0018]

According to the present inventor, the unnecessary etching in the conventional dry process is caused by excessive F ^* ,
In order to prevent this, it was thought that it is sufficient to generate a substance having some action that suppresses the progress of etching.

In the present invention, the surface of the compound semiconductor substrate is covered with a nitride film. Since this nitride film is formed by the bond between a predetermined constituent atom of the compound semiconductor substrate and a nitrogen atom, it can exist extremely stably on the substrate surface. By this nitride film, even if the compound semiconductor substrate is exposed to the atmosphere, the contact between the surface of the compound semiconductor substrate and the external environment is cut off, so that the surface oxidation of the compound semiconductor substrate is suppressed and an insulating film to be laminated in a later step is formed. The interface state density can be kept low between them.

In order to perform such a coating with a nitride film, it is premised that certain types of constituent atoms on the surface of the compound semiconductor substrate are exposed.
It is relatively easy to obtain a substrate having such an interface structure. For example, in the case of a zinc blende type crystal structure to which many AX type (A is a positive element, X is a negative element) compound semiconductor belongs, either the A atomic layer or the X atomic layer is exposed on the {111} plane. Because it will be.

Most practically, the nitride film can be formed by subjecting the compound semiconductor substrate to plasma treatment using a gas containing a nitrogen compound.
That is, the nitrogen-based chemical species such as N ^* that is dissociated and generated from the nitrogen-based compound under the discharge dissociation condition acts on the surface of the compound semiconductor substrate, and the atoms that can generate a nitride having a low vapor pressure are the nitrogen-based chemical species. It reacts to form a nitride film.

Since the present invention is a dry process, for example, when manufacturing a MIS type semiconductor device is assumed, it can be performed continuously with a step of forming an insulating film in a subsequent step. In other words, if you use an integrated continuous processing device represented by recent multi-chamber systems,
It is possible to consistently perform from the passivation to the formation of the insulating film under high vacuum without exposing the wafer to the atmosphere on the way.

A case considered to be important in practical use of the present invention is a case where the compound semiconductor substrate has Ga atoms as constituent atoms, and the surface is covered with a GaN film. G
aN is a compound that begins to sublime at around 800 ° C. under normal pressure, but has a low vapor pressure under normal plasma processing conditions and exists stably unless the wafer is particularly heated to a high temperature.
Therefore, a sufficient passivation effect can be exhibited.

[0024]

EXAMPLES Specific examples of the present invention will be described below.

Example 1 In this example, the present invention is a MIS-F using a GaAs substrate.
This is an example applied to the manufacture of ET, in which the SiN insulating film and the electrodes are formed after the GaAs substrate is passivated by the plasma treatment using the NF ₃ / N ₂ mixed gas. This process will be described with reference to FIG.

The wafer used as a processing sample in this example.
C is shown in FIG. This wafer is p^-Type GaA
s substrate 1 (p in the figure)^--Abbreviated as GaAs. )above
For example, the channel region is formed by the MOCVD method.
N-type GaAs layer 2 (abbreviated as n-GaAs in the figure)
It ) And n for forming source / drain regions ⁺
Type GaAs layer 3 (n in the figure)⁺-Abbreviated as GaAs
It ) And are sequentially laminated to form a resist mask (not shown).
Via at least the above n⁺Type GaAs layer 3
Forming the gate recess 4 by etching.
It is a thing. The surface of this wafer is, for example, GaAs
It corresponds to the (001) plane of the crystal.

Next, this wafer was set in an etching chamber of a magnetic field microwave plasma apparatus, and as an example, plasma treatment was performed under the following conditions. NF ₃ flow rate 10 SCCM N ₂ flow rate 30 SCCM Gas pressure 1.33 Pa Microwave power 850 W (2.45 GH
z) RF bias power 0 W Wafer temperature −70 ° C. The wafer was cooled by circulating an alcohol-based refrigerant through a cooling pipe built in the wafer mounting electrode.

By this plasma treatment, as shown in FIG. 1B, the n-type GaAs layer 2 and the n ⁺ -type GaAs layer 3 are formed.
An extremely thin passivation layer 5 made of GaN was uniformly formed on the exposed surface of the.

Since the surface of the wafer is the (001) plane of the GaAs crystal, the atomic layer existing on the exposed surface of the n-type GaAs layer 2 and the n ⁺ -type GaAs layer 3 before the plasma treatment is , Both are Ga layers, both are As layers, or one is a Ga layer and the other is an As layer. However, in this embodiment, since N ₂ is added to the gas system, the surface of the wafer is finally covered with the passivation film 5 made of GaN in any case. The mechanism is considered as follows.

First, GaN is immediately formed in the region where the Ga layer is exposed on the wafer surface. At this time, of course, GaF can also be produced, but this compound is a substance with a low vapor pressure having a sublimation point near 800 ° C. and a boiling point near 1000 ° C., and under the temperature conditions under which the wafer is cooled as described above. Does not come off easily. Therefore, the Ga layer is not removed before the passivation film 5 is formed.

On the other hand, As is formed on at least a part of the wafer surface.
When the layer exists, the As layer reacts with F ^* to generate AsF ₃ and AsF ₅ having a high vapor pressure, and the AsF ₃ and AsF ₅ are rapidly removed. At this time, N in the plasma
^* Is present, but As does not form a nitride. After that, when the Ga layer is exposed, GaN is generated as described above.

Subsequent formation of an insulating film and an electrode was performed according to a conventionally known method. First, Si as an insulating film
In order to form the N film, the wafer was set in the CVD chamber of another magnetic field microwave CVD (ECR-CVD) apparatus. Since this CVD chamber is connected to the etching chamber of the above-mentioned magnetic field microwave plasma etching apparatus under a high vacuum through a gate valve, the wafer is transferred between different processes without being exposed to the atmosphere. It

An example of conditions for forming the SiN insulating film by ECR-CVD is shown below. SiH ₄ flow rate 20 SCCM N ₂ O flow rate 40 SCCM Gas pressure 1.33 Pa Microwave power 800 W (2.45 GH
z) RF bias power 0 W Wafer temperature 350 ° C. By this process, the surface of the wafer was covered with the SiN insulating film 6 having a thickness of about 30 nm as shown in FIG.

Further, as shown in FIG. 1D, n
^{+ −} S on the source / drain region composed of the GaAs layer 3
The iN insulating film 6 was selectively removed, and the source / drain electrodes 7 were formed on this portion with an ohmic electrode material such as AuGe alloy. Further, on the SiN insulating film 6 in the gate recess 4, a gate electrode 8 made of an electrode material such as Al is used.
Was formed.

MIS-FET manufactured in this way
Shows a high-speed operation with low power consumption because the interface state density is reduced. The production yield was also good.

Example 2 In this example, a Cl ₂ / N ₂ mixed gas was used for plasma treatment for passivation. The wafer used in this example is the same as the wafer used in Example 1. An example of plasma processing conditions is shown below.

Cl ₂ flow rate 10 SCCM N ₂ flow rate 30 SCCM Gas pressure 1.33 Pa Microwave power 850 W (2.45 GH
z) RF bias power 0 W Wafer temperature −10 ° C.

At this time, GaN is immediately formed in the region where the Ga layer is exposed on the wafer surface, and the passivation layer 5 is formed. At this time, of course, GaCl ₃ may also be generated, but since N ^* is excessively generated in the plasma at this time as compared with Cl ^* , it may be considered that GaN is prioritized. On the other hand, when an As layer exists on at least a part of the wafer surface, this As layer is Cl ^*.
AsCl ₃ having a high vapor pressure is produced by the reaction with and is quickly removed. After that, when the Ga layer is exposed, GaN is generated as described above.

In any case, the surface of the wafer was finally covered with the passivation film 5 made of GaN. The subsequent formation of the SiN insulating film 6, the source / drain electrodes 7, and the gate electrode 8 is as described above in the first embodiment.

The present invention has been described above based on the two embodiments, but the present invention is not limited to these embodiments. For example, in each of the above embodiments, the case where the material of the compound semiconductor substrate is GaAs has been described. It may be a compound semiconductor. In particular, compound semiconductors containing Ga atoms include GaP, GaSb, AlGaAs and GaAs.
P etc. are mentioned.

As the nitrogen-based compound contained in the gas for forming the nitride film, other than NF ₃ and N ₂ mentioned above,
NCl ₃ , nitric oxide, nitrosyl halide, nitrile halide, fluorine nitrate, etc. may be used.

Although the GaN layer formed as a nitride film (passivation layer) on the GaAs substrate is an extremely thin film, its lattice constant is far from that of the GaAs substrate, so that it is necessary before forming the insulating film. It may be removed accordingly. As a method of removing this, lightly sputtering the wafer by using an inert gas such as Ar while heating the wafer slightly.
A method of performing etching or the like can be considered.

In addition, the conditions of the plasma treatment, the structure of the apparatus used, the structure of the wafer, the constituent materials of the insulating film and the electrodes, and the forming conditions thereof can be appropriately changed.
Needless to say.

[0044]

As is apparent from the above description, by applying the present invention, passivation by plasma treatment can be performed with good reproducibility without giving unnecessary damage to the compound semiconductor substrate. In particular, GaAs
On such a compound semiconductor substrate having Ga atoms as constituent atoms, a stable GaN layer can be formed as a passivation layer by performing plasma treatment using a gas containing a nitrogen compound. Such stable passivation has the effect of significantly reducing the interface state density between the compound semiconductor substrate and the insulating film, and opens the way to the practical application of MIS type devices using compound semiconductors.

Since the plasma treatment can be continuously performed with another dry process such as a step of forming an insulating film in a later step, throughput and economical efficiency are also improved.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing an example of a process in which the present invention is applied to manufacture of a MIS-FET in the order of steps, (a) showing a state where a gate recess is formed in an n ⁺ type GaAs layer, (b) ) Is a state where a passivation layer is formed on the entire surface of the wafer, (c) is a state where a SiN insulating film is formed on the entire surface of the wafer, (d) is a pattern of the SiN insulating film, and source / drain electrodes and gate electrodes Represents the state in which and were formed.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... p ^- type GaAs substrate 2 ... n type GaAs layer 3 ... n ⁺ type GaAs layer 4 ... gate recess 5 ... passivation layer 6 ... SiN insulating film 7 ... Source / drain electrode 8 ... Gate electrode

Claims (3)

[Claims] 1. A pretreatment method for a compound semiconductor substrate, which comprises coating the surface of a compound semiconductor substrate with a nitride film formed by the bond between a predetermined constituent atom of the compound semiconductor substrate and a nitrogen atom. 2. The nitride film is formed by subjecting the compound semiconductor substrate to plasma treatment using a gas containing a nitrogen compound.
A method for pretreating a compound semiconductor substrate as described above. 3. The compound semiconductor substrate according to claim 1, wherein the compound semiconductor substrate has Ga atoms as the predetermined constituent atoms, and the nitride film is a GaN film. Pretreatment method.