JPH03269482A - Display device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a display device, in particular an XY mama matrix type lasma display panel (hereinafter referred to as PDP) that displays a medium contrast screen by alternately displaying a high contrast screen and a low contrast screen. The purpose of this technology is to provide a PDP that can reduce power consumption at high display rates without reducing the visibility of the display. In a display device having a plasma display panel that displays a medium-contrast screen, a display rate recognition unit that recognizes a display rate of the plasma display panel and outputs a display rate signal based on an external gradation control signal; , a display control unit that outputs a display control signal for changing the text type ratio during one vertical period of the high contrast screen and the low contrast screen in the case of a high display rate, based on the display rate signal; Prepare and configure.

[Industrial application field]

The present invention relates to a display device, and in particular, a display device having an XY mama matrix lasma display panel (hereinafter referred to as FDP) that displays a medium contrast screen by displaying text types of a high contrast screen and a low contrast screen. Regarding.

In recent years, liquid crystals, EL (electronic
Flat displays such as IC Luminescence and PDP are used.

FDP is a display device that utilizes a plasma emission phenomenon, and is used in various fields because it is lighter and thinner than CRT.

When such FDPs are used in portable electronic devices, there is a need to downsize the device itself, more specifically, a downsizing of the power supply, and a need to use it for a long time since it is powered by a battery. It is desired to reduce power consumption as much as possible.

[Conventional technology]

In a conventional FDP, a medium contrast screen is displayed by displaying a high contrast screen and a low contrast screen as text types.

In this case, each of the high-contrast and low-contrast screens performs display with constant luminance, and power consumption increases in proportion to the number of discharge cells. Therefore, as the display rate (=number of discharge cells/total number of cells x 100) increases, the number of discharged cells increases, so power consumption increases at a high display rate.

[Problem to be solved by the invention]

For this reason, when configuring an electronic device with a PDP for portable use, power consumption increases when displaying with high gradation brightness and high display rate, and battery capacity is required for long-term use. There is a limit to miniaturization of the power supply because it needs to be large.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide an FDP that can reduce power consumption at high display rates without reducing the visibility of the display.

[Tasks to be solved]

FIG. 1 shows a diagram explaining the principle of the present invention.

The display device 1, based on the gradation control signal 2 from the outside,
A display ratio recognition unit 4 that recognizes the display ratio of a plasma display panel (not shown) in the FDP display drive unit 7 and outputs a display ratio signal 3; and a display control section 6 that outputs a display control signal 5 for changing the text type ratio of the low contrast screen within one vertical period to the FDP display drive section 7.

[Effect]

According to the present invention, the display rate recognition unit 4 recognizes the display rate of the plasma display panel (not shown) in the FDP display drive unit 7 based on the external gradation control signal 2, and outputs the display rate signal 3. do.

Based on the display rate signal 3, the display control unit 6 sends a display control signal 5 to the FDP display drive unit for changing the text type ratio of a high contrast screen and a low contrast screen within one vertical period in the case of a wide display rate. Output to 7.

Therefore, when the display rate is high, the ratio of the high contrast screen is reduced and the number of light pulses is reduced, so power consumption can be reduced. Furthermore, in the case of a medium or low gradation brightness screen, the number of light pulses is controlled not to be reduced too much, so that visibility does not deteriorate.

〔Example〕

The present invention will be described in detail with reference to FIGS. 2 to 5.

FIG. 2 shows a block diagram of an embodiment of the present invention.

In the following, a display device using an AC type FDP will be described.

The display device 100 is roughly divided into a display drive unit 200 and a display control unit 300 that controls the display drive unit 200.

The serial/parallel converter circuit 11 converts the serial luminance signal DSDl input from the outside into a parallel converter and outputs it to the display rate recognition circuit 12 and the X-side driver 16.

The display rate recognition circuit 12 outputs a brightness control signal BC for changing the text type ratio between the high-contrast screen and the low-contrast screen based on the brightness signal D SD converted into parallel data. Luminance signal D1 before serial/parallel conversion The luminance signal D1 is digital data, and when it is at the "H" level, it means that a middle gradation luminance display and a low gradation luminance display are performed, respectively. ,
When both data are at "H" level, it means that high gradation brightness display is performed.

On the other hand, when the control signal S is inputted to the controller 14 from the outside, the controller 4 controls the FDP timing generator 13.

The FDP timing generator 13 provides a high voltage rectangular wave timing signal to the Y-side driver 7 of the display drive unit 1 based on the control signal, the clock signal provided by the clock generator 15, and the brightness control signal BC. The Y-side driver 7 is configured to drive P specified by the control signal.
A plurality of Y (not shown) of DP 10 (for example, 400)
Drive the electrodes. PDPIO is a device in which a discharge gas is sealed between opposing substrates (glass) equipped with X and Y electrodes. Each substrate has X and Y electrode layers and a dielectric layer stacked on each other, and uses wall charges to display light. This is a known AC type FDP in which

Similarly, the PDP timing generator 13, based on the control signal, clock signal and brightness control signal BC,
A high voltage rectangular wave timing signal is applied to the X side driver 16 of the display drive unit 1.

The X side driver air 6 is a PDP designated by a control signal.
A plurality of (for example, 600) X electrodes (not shown) of the IO are driven.

In this way, by selectively driving the Y electrodes and the X electrodes, the discharge cells at the intersections of the corresponding Y electrodes and the By emitting light, images such as various characters and figures are formed.

The total number of discharge cells on the PDPIO is 400 in the above example.
(y)x600 (X) It becomes a dot.

As shown in FIG. 3, the FDP timing generator 1
There are two types of high-voltage rectangular wave timing signals given from 3 to the X-side driver 16 and Y-side driver 17, one for high-contrast screens and one for low-contrast screens, each of which is selected by the brightness control signal BC. In this embodiment, when the brightness control signal BC is at the "H" level, a high voltage rectangular wave timing signal for a high contrast screen is selected and output, and when the brightness control signal BC is at the "L" level, the high voltage rectangular wave timing signal is selected and output. A high voltage square wave timing signal for the contrast screen is selected and output.

Below, regarding the high voltage square wave timing signal for each screen,
Explain in detail.

In the case of a high-contrast screen, the high-voltage rectangular wave timing signal for a high-contrast screen is synchronized with the horizontal synchronization signal H at time t, as shown in FIG.
At t, a pulse (hereinafter referred to as a sustain pulse) for maintaining the display data written in the Y-side driver 7nc driver 17 (that is, maintaining the discharge)
Ps is applied and a light pulse PlIl is generated.

At time t2, a pulse (
Hereinafter, this is referred to as a write pulse. ) When Pw is applied, a light pulse PH2 is generated in the discharge cell on the selected line.

At time t3, a sustain pulse P is applied to the X side driver 6.
is applied, and a light pulse PH3 is generated.

At time t4, a pulse (hereinafter referred to as an erase pulse) PE for erasing the previously written display data (that is, stopping the discharge) is applied only to the selection line of the X-side driver 6 and the Y-side driver 7. From now on, no discharge will occur in the selected line until the write pulse PW is applied again.

In the case of a low-contrast screen, the high-voltage rectangular wave timing signal for a low-contrast screen is synchronized with the horizontal synchronization signal H at time t, as shown in FIG.
5, the sustain pulse Ps is applied only to the selected line of the Y-side driver 17+1c driver 17, and if the write pulse PW has already been applied, the optical pulse PL1 is generated.

At time t6, when the write pulse Pw is applied only to the selected line of the Y-side driver 17, a light pulse PL2 is generated in the discharge cells on the selected line.

At time t7, a sustain pulse P is applied to the X-side driver 6, and if a write pulse Pw has already been applied, a light pulse PL3 is generated.

At time t8, the erase pulse PE is applied only to the selected lines of the X-side driver 6 and the Y-side driver 7,
From now on, no discharge will occur in the selected line until the write pulse P is applied again.

Next, the operation of the display rate recognition circuit will be explained with reference to FIG.

The display rate recognition circuit 12 receives a medium brightness signal. and low brightness signal D1 are input, each resistor R (=2/3R)
, resistance R (=1/3R3) 1 3
2, both signals D SD
are added and inputted to the inverting input terminal of the operational amplifier 19, and an amplified signal of the added value is output. Note that the resistor R3 is a feedback resistor of the operational amplifier 19.

The output signal of the operational amplifier 19 is input to the inverting input terminal of the operational amplifier 20 via the resistor R4.

The operational amplifier 20 converts the output signal of the operational amplifier 19 into a gain (R5/
R4) inverts and amplifies the signal N times (1>N). The value of N determines a high brightness reference voltage VO, which will be described later. however,
It is assumed that the feedback resistor R5 can be selected as appropriate.

The output signal of the operational amplifier 20 is output from the clock generator 1
Since the signal changes at a clock cycle of 5, integration is performed by a low-pass filter 21 consisting of a resistor R6 and a capacitor C to facilitate control, and an integrated signal BCo is output.

The integral signal BCo is input to one input terminal of the comparator 22, and the other input terminal of the comparator 22 is
A reference signal O8C from the triangular wave generator 18 is input.

The comparator 22 includes an integral signal BCo and a reference signal O.
8C and outputs a comparison result signal. This comparison result signal is waveform-shaped by a waveform shaping circuit 23 including a resistor R1 diode D and a buffer amplifier BF, and is outputted to the FDP timing generator 13 as a brightness control signal BC.

FIG. 5 shows a timing chart of the brightness control signal BC. Here, from time to to time t3, the voltage of the integral signal BCo is equal to the high brightness reference voltage Vo, so the high gradation brightness is fully lit. From time t3 to time t, the voltage of the integral signal BCo is 2 of the high brightness reference voltage V. /3 (=2
/3vo), so the middle gradation brightness is completely lit, time t5
From time t7 onward, the voltage of the integral signal BCo is equal to 1/3 (=1/3Vo") of the high-luminance reference voltage V, so the low gradation luminance is entirely lit, and after time t7,
Since the integral signal BCO=O(V), the display rate is 0%, that is, nothing is displayed. Furthermore, when the brightness control signal BC is at the 'H' level, the text type ratio of the high contrast screen and the low brightness contrast screen is set to the predetermined text type ratio, and when the brightness control signal BC is at the 'L' level, the ratio of the high contrast screen is decreased. shall be taken as a thing.

From time to to time t1 during high gradation brightness full lighting, the reference signal O8C has a lower voltage than the integral signal BCo, so the brightness control signal B
C becomes the "L" level, and the ratio of the high contrast screen is reduced.

From time t to time t2, since the integrated signal BCo is at a higher voltage than the reference signal 0SC, the brightness control signal BC becomes "H" level, and the text type ratio of the high contrast screen and the low brightness contrast screen is This is the predetermined sentence type ratio.

Again, from time t to time t3, the reference signal O8
Since C has a lower voltage than the integral signal BCo, the brightness control signal BC becomes "L" level, and the ratio of the high contrast screen decreases.

From time t3 to time t4 when the entire medium gradation brightness is turned on, the reference signal O8C has a lower voltage than the integral signal BCa, so the brightness control signal BC becomes "L" level, and the ratio of the high contrast screen decreases. do.

From time t to time t5, since the integral signal BCo has a higher voltage than the reference signal O20, the brightness control signal BC becomes "H" level, and the text type ratio of the high contrast screen and the low brightness contrast screen is This is the predetermined sentence type ratio.

From time t to time t6 when low gradation brightness is fully lit, the integrated signal BCa has a higher voltage than the reference signal 0SC, so the brightness control signal BC is at the "H" level, and the high contrast screen and low The text type ratio on the brightness contrast screen is a predetermined text type ratio.

From time t6 to time t7, since the reference signal O8C has a lower voltage than the integral signal BCo, the brightness control signal B
C becomes "L rubel", and the ratio of high contrast screen decreases.

After the display rate O percent time t7, since the integrated signal BCo has a higher voltage than the reference signal O8C, the brightness control signal BC
becomes the “H” level, and the text type ratio of the high contrast screen and low brightness contrast screen becomes the predetermined text type ratio,
Since nothing is displayed, there is little impact on power consumption.

As described above, in the case of high gradation brightness display, the text type ratio on a high contrast screen is reduced, and power consumption is reduced. Furthermore, in the case of low-luminance display, since the text is displayed at a predetermined text type ratio, there is little effect on the visibility of the display.

In the above embodiment, only the AC type FDP was explained, but the present invention can also be applied to the DC type FDP if the applied voltage, application time, etc. are configured to be controlled based on the brightness control signal BC. It is.

In addition, in the above embodiment, only the luminance data D and Dl were used, but by increasing these data, the FDP can display multi-level intermediate gradations of 8 gradations and 66 gradations. The present invention can also be applied to

Furthermore, in the above embodiments, a triangular wave with a constant amplitude and period was used as the reference signal O8C, but the amplitude, period, etc. may be configured to be changeable, or a waveform other than the triangular wave, which is expressed by a periodic function, may be used. For example, it is also possible to use a sine wave or the like.

〔Effect of the invention〕

According to the present invention, the display rate on the display screen is detected, the number of light pulses is controlled according to the detected display rate, and the ratio of high contrast screen is reduced, especially in the case of high gradation brightness and high display rate. Since the number of optical pulses is reduced, power consumption can be reduced without reducing the visibility of the display screen.

[Brief explanation of drawings]

Fig. 1 is an explanatory diagram of the principle of the present invention, Fig. 2 is a block diagram of an embodiment of the invention, Fig. 3 is an explanatory diagram of a high voltage rectangular wave timing signal, Fig. 14 is an explanatory diagram of a display rate recognition circuit, and Fig. 5 is an explanatory diagram of a display rate recognition circuit. The figure is a timing chart of brightness control signals. 1... Display device 2... Floor 11! ! ! Control signal 3...Display rate signal 4...Display rate recognition section 5...Display control signal 6...Display control section 7...FDP display drive section 10...FDP 11...Series/ Parallel conversion circuit 12... Display rate recognition circuit 13... FDP timing generator 14... Controller 15... Clock generator 16... X side driver 17... Y side driver 18... Triangular wave generator 19... Operational amplifier 20... Operational amplifier 21... Low pass filter (LPF) 22...
Comparator 23... Waveform shaping circuit BC... Brightness control signal B Ca... Integral signal O20... Reference signal PE... Erase pulse Pw... Write pulse Ps... Sustain pulse V[+ ...High brightness reference signal

Claims (1)

[Claims] 1. In a display device having a plasma display panel that displays a medium-contrast screen by alternately displaying a high-contrast screen and a low-contrast screen, a display rate recognition unit (4, 12) that recognizes the display rate of the plasma display panel (10) and outputs a display rate signal (3, BC) based on the display rate signal (3, BC); A display control unit (6, 13) that outputs a display control signal (5) for changing the alternation ratio of the high contrast screen and the low contrast screen during one vertical period in the case of a high display rate based on A display device comprising: and. 2. The display device according to claim 1, wherein the display control unit (6, 13) includes a reference signal generation unit (18) that generates and outputs a reference signal (OSC) for changing the alternating seeding ratio; The display rate signal (3, BC) and the reference signal (OS
C), and based on the comparison result, the display control signal (
5) A comparison unit (22) that outputs a display device.