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JPH02174123A - Formation of film - Google Patents

Formation of film

Info

Publication number
JPH02174123A
JPH02174123A JP33034488A JP33034488A JPH02174123A JP H02174123 A JPH02174123 A JP H02174123A JP 33034488 A JP33034488 A JP 33034488A JP 33034488 A JP33034488 A JP 33034488A JP H02174123 A JPH02174123 A JP H02174123A
Authority
JP
Japan
Prior art keywords
film
rate ratio
silicon
semiconductor layer
flow rate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP33034488A
Other languages
Japanese (ja)
Inventor
Yuko Hiura
樋浦 祐子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP33034488A priority Critical patent/JPH02174123A/en
Publication of JPH02174123A publication Critical patent/JPH02174123A/en
Pending legal-status Critical Current

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  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To form a gate insulating film by using one kind of film formation method, whose dielectric breakdown strength is good and which has a good interface characteristic between itself and a semiconductor layer by a method wherein a flow-rate ratio of raw material gases is changed while the film is being formed. CONSTITUTION:In a silicon oxide film formed between a metal layer and a semiconductor layer by a photo-assisted CVD method used to form a film by decomposing a raw-material gas by being irradiated with light, the film of a part coming into contact with the metal layer is formed under a condition that a flow-rate ratio of a gas for silicon supply use to a gas for oxygen supply use is at 1X10<-3> or higher and 1X10<-2> or lower. In addition, the film of a part coming into contact with the semiconductor layer is formed under a condition that the flow-rate ratio is smaller than 1X10<-3>. When the flow-rate ratio of the raw-material gases is changed, it is possible to obtain an insulating film whose dielectric breakdown strength is high and whose interface with reference to a semiconductor (silicon film) is good.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は成膜方法に関するものである。[Detailed description of the invention] [Industrial application field] The present invention relates to a film forming method.

〔従来の技術〕[Conventional technology]

TPT(薄膜トラ/ラスタ)等金属電極形成後にゲート
絶縁膜を形成するデバイスの場合、ゲート絶縁膜は2つ
の成膜方法による2層構造がとられている。これは1つ
の成膜方法による1層の絶縁膜のみでは金属上に発生し
がちなピンホールを十分に覆い、且つ半導体層との間に
良好な界面状態を形成することが困難だからである。2
層構造の例としては半導体層の表面を低温度での光CV
Dで形成した5i01膜で覆い、その後昇温し、大気圧
の熱CVDでさらにSin、膜を形成するという方法が
三村らによ、91988年アイトリプリイーデバイスレ
ターズ誌第9巻(ナンバー6)頁290に報告されてい
る。この方法では光CVDから熱CVDへの切換えのた
め昇温、原料ガスの入替、堆積圧力の設定変更等多くの
工程を要する。一方電極形成後その表面を陽極酸化し、
その後真空中でゲート絶縁膜、アモルファスシリコンを
一貫して形成するという方法が日中らにより1988年
テレビジ1ン学全技術報告頁7に報告されている。
In the case of a device in which a gate insulating film is formed after forming a metal electrode, such as TPT (Thin Film Tractor/Raster), the gate insulating film has a two-layer structure using two film forming methods. This is because it is difficult to sufficiently cover pinholes that tend to occur on metal and to form a good interface state with the semiconductor layer with only one insulating film formed by one film formation method. 2
As an example of a layer structure, the surface of a semiconductor layer is coated with light CV at a low temperature.
A method of covering with a 5i01 film formed in D, followed by raising the temperature and forming a further Sin film by thermal CVD at atmospheric pressure was reported by Mimura et al. ) is reported on page 290. This method requires many steps such as temperature increase, replacement of raw material gas, and change of deposition pressure settings in order to switch from optical CVD to thermal CVD. On the other hand, after forming the electrode, its surface is anodized,
Thereafter, a method of integrally forming a gate insulating film and amorphous silicon in a vacuum was reported by Nichico et al. in 1988 in the Technical Report of Television Engineering, page 7.

この場合、成膜は一貫工程ですむが考極改化という基板
を水溶液に浸す湿式1程が加わるため工程は簡便化しな
い。このように従来の方法では1種類の成膜方法で良好
な絶縁耐圧を有し、且つ、半導体層との間に良好な界面
状態を有するようなゲート絶縁膜を形成することは困唯
であった。
In this case, film formation can be done in an integrated process, but the process is not simplified because a wet process (1), which involves dipping the substrate in an aqueous solution, is added. As described above, with conventional methods, it is difficult to form a gate insulating film that has good dielectric strength and a good interface state with the semiconductor layer using one type of film formation method. Ta.

〔発明が解決しようとする解題〕[Problem that the invention attempts to solve]

本発明の目的はこのような従来方法の問題点を解決し1
つの成膜方法のみで、絶縁耐圧が良好で且つ半導体層と
の間に良好な界面状態を保てるゲート絶縁膜を形成する
方法を提供することにある。
The purpose of the present invention is to solve the problems of such conventional methods.
An object of the present invention is to provide a method for forming a gate insulating film which has a good dielectric strength and can maintain a good interface state with a semiconductor layer using only one film forming method.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は上記の従来技術の問題点を解決するために、光
照射によって原料ガスを分解して成膜する光CVDによ
って金属層と半導体層との間に酸化シリコン膜を形成す
る前記酸化シリコン膜のうち、前記金属と接する部分は
シリコン供給用ガスの酸素供給用ガスに対する流量比が
1×10 以上1×10 以下となる条件下で成膜し、
前記半導体層と接する部分は前記流量比がI×10 よ
り小さくなる条件下で成膜するという手段をとった。
In order to solve the above problems of the prior art, the present invention provides a silicon oxide film in which a silicon oxide film is formed between a metal layer and a semiconductor layer by photo-CVD, which is formed by decomposing a source gas by light irradiation. Among them, the portion in contact with the metal is formed under conditions such that the flow rate ratio of the silicon supply gas to the oxygen supply gas is 1 × 10 or more and 1 × 10 or less,
The portion in contact with the semiconductor layer was formed under conditions where the flow rate ratio was smaller than I×10 2 .

〔作用〕[Effect]

訪電体はその構成原子の比率によって絶縁耐圧特性、半
導体との界面特性などが大きく変化する。
The dielectric strength characteristics, interface characteristics with semiconductors, etc. of the current visiting body vary greatly depending on the ratio of its constituent atoms.

この比率は成膜時の原料ガス混合比に強く依存するため
、成膜時に原料ガス混合比を変えることによって複数の
異なった性質の膜を積層することが一般には可能である
。例えばシラ/系等のシリコン供給用ガスと、N、O,
O,等の酸素供給用のガスとを混合して酸化シリコン膜
を形成する場合、シリコン供給用ガスの酸素供給用ガス
に対する割合を大きくするとシリコンリッチな膜が形成
されることがプラズマ、熱、光等のCVDによる各成膜
方法で確認されており、シリコン供給用ガス及び酸素供
給用ガスの双方を光化学分解する場合の光CVDでは特
にこの現象が顕著になる。これはシリコン供給用ガスが
単独で分解した生成物が酸素供給系のガスと反応するこ
となく直接膜中にとシ込まれたり、あるいはS i −
0−H、S 1−0−4の中間生成物の状態で膜中にと
シ込まれる確率が高くなるためと考えられる。従って化
学量論的組成をもつ酸化シリコン膜を形成するにはシリ
コン供給用ガスの流量に対して酸素供給系ガスの流量を
十分に大きくとることが必要である。このようにして得
られた化学量論的組成の5iOzf′i、Si との間
に良好な界面を形成しうる。しかしこの膜の耐圧特性に
ついては従来よく知られていなかつた。
Since this ratio strongly depends on the raw material gas mixture ratio during film formation, it is generally possible to stack a plurality of films with different properties by changing the raw material gas mixture ratio during film formation. For example, silicon supply gas such as silica/silicon, N, O,
When forming a silicon oxide film by mixing oxygen supply gas such as O, etc., a silicon-rich film is formed by increasing the ratio of silicon supply gas to oxygen supply gas. This phenomenon has been confirmed in various film forming methods using CVD such as light, and this phenomenon is particularly noticeable in photoCVD when both the silicon supply gas and the oxygen supply gas are photochemically decomposed. This is because the products of silicon supply gas being decomposed alone are directly injected into the membrane without reacting with the oxygen supply gas, or Si-
This is considered to be because the probability that the intermediate products of 0-H and S 1-0-4 are injected into the membrane becomes high. Therefore, in order to form a silicon oxide film having a stoichiometric composition, it is necessary to make the flow rate of the oxygen supply gas sufficiently larger than the flow rate of the silicon supply gas. A good interface can be formed between the thus obtained stoichiometric composition of 5iOzf'i and Si. However, the voltage resistance properties of this film have not been well known.

これに関し、シリコン供給用ガスの流量比率が極った膜
となシやすいことを発明者は実験によシ見いだした。こ
れは酸素供給用ガス1分子に対し衝突しうるシリコン供
給用ガスの分子数が非常に少ないため、成膜初期の核形
成密度が低くなる等の理由で粗な膜になり易いためと考
えられる。
In this regard, the inventors have found through experiments that the film is easily formed when the flow rate ratio of the silicon supply gas is extremely high. This is thought to be because the number of molecules of silicon supply gas that can collide with one molecule of oxygen supply gas is very small, which tends to result in a rough film due to reasons such as low nucleation density at the initial stage of film formation. .

第2図はシリコン供給用ガスに5itH1lをFR素供
給用ガスにN、Oを用いたAr−FレーザCVDによシ
得られた酸化シリコン膜の漏れ電流が原料ガス流量比、
すなわち(シリコン供給用ガス流量/酸素供給用ガス流
量)K依存するという本発明者の実験結果を概念的に示
した図である。
Figure 2 shows the leakage current of a silicon oxide film obtained by Ar-F laser CVD using 5itH1l as a silicon supply gas and N and O as FR element supply gases as a function of the raw material gas flow rate ratio.
That is, it is a diagram conceptually showing the experimental results of the present inventor that (silicon supply gas flow rate/oxygen supply gas flow rate) depends on K.

領域■は流量比をあげることKよってシリコンリッチと
なり耐圧が劣化する領域である。これは酸化シリコン膜
の抵抗率がシリコンの抵抗率に徐々に近づくだめに他な
らない。一方領域■は流量比を下げることによって化学
量論的組成にはなるものの、核形成密度が低いなどのた
め膜質が粗になシやすく、やはシ耐圧が劣化する領域で
ある。
Region (2) is a region where increasing the flow rate K results in silicon richness and the breakdown voltage deteriorates. This is because the resistivity of the silicon oxide film gradually approaches the resistivity of silicon. On the other hand, in region (3), although a stoichiometric composition can be achieved by lowering the flow rate ratio, the film quality tends to become rough due to low nucleation density, etc., and the breakdown voltage deteriorates.

これらの中間にある領域■は、ストイキオメトリツクな
Singに較べて多少シリコンリッチとな議、Si と
の界面準位密度も高めたが、絶縁耐圧にはすぐれた酸化
クリコン膜を形成する領域である。
The region (2) in between these regions is a region that is a little richer in silicon than the stoichiometric Sing, and has a higher density of interface states with Si, but is a region where a cricon oxide film with excellent dielectric strength is formed. be.

本発明においてはこのように原料ガスの流量比を変える
ことによって絶縁膜の絶縁耐圧特性、界面特性が変化す
る発明者が見い出した効果を利用してピンホールが発生
しやすい金りA膜上は領域■の流量比で、緻密で耐圧特
性に優れた膜を、また半導体との界面に接する部分は領
域■の流量比でストイキオメトリツクで界面特性に優れ
た膜を、それぞれ成膜する。この複合的な工程によって
、絶縁耐圧が高くしかも半導体(シリコン膜)との界面
が良好な絶縁膜が本発明により得られる。さらに1本発
明においては、従来方法のように2つ以上の成膜方式を
用いる必要がなく、単一装置内で成膜条件を変えるだけ
で成膜できるので、基板の移し替え作業が不用となるな
どコスト削減スループット向上を図ることができる。
In the present invention, by utilizing the effect discovered by the inventor that the dielectric strength characteristics and interface characteristics of the insulating film are changed by changing the flow rate ratio of the raw material gas, the gold metal A film, which is prone to generate pinholes, is A dense film with excellent pressure resistance characteristics is formed at the flow rate ratio in region (2), and a film with stoichiometric properties and excellent interfacial characteristics is formed at the flow rate ratio in region (2) on the part in contact with the interface with the semiconductor. Through this complex process, an insulating film having a high dielectric strength voltage and a good interface with a semiconductor (silicon film) can be obtained according to the present invention. Furthermore, in the present invention, unlike conventional methods, it is not necessary to use two or more film-forming methods, and the film can be formed by simply changing the film-forming conditions within a single device, so there is no need to transfer the substrate. It is possible to reduce costs and improve throughput.

〔実施例〕〔Example〕

以下本発明を逆スタガ型のTFTゲート絶&+iの形成
に適用した実施例を図面を参照して詳細に説明する。
Hereinafter, an embodiment in which the present invention is applied to the formation of an inverted staggered TFT gate gate will be described in detail with reference to the drawings.

第1図は本発明を適用したゲート絶縁膜の形成を行なう
装置の模式図である。基板8は排気ボンダのついたCV
Dチャンバ5に固定し、ArFレーザlからの出射光を
パターンマスク2、合成石英レンズ3、合成石英窓4を
通して基板8上にパターン転写する。基板8はガラス上
に前工程で形成したクロムのゲート電極を有しており、
ヒータ等により適当な温度に加熱されている。原料ガス
のSi*HsとNtOはそれぞれ第1のマス70−コン
トロー26. 第2のマス70−コントロー、771C
よってCVDチャンバ5に供給される。堆積開始時Ki
dsilHaON201c対fルa量比カ2 x 10
−’以上8×10 以下になるように第1のマスフロー
コントローラ6、!:第2のマスフローコントローラ7
を設定する。5iOz膜厚が2000λ程度になった時
点で5i2H@のN、OK対する流量比が2×10 よ
り小さくなるように第1のマス70−コントローラ6 
ト第2のマス70−コントローラ7の設定値と変更し、
さらに成膜を続け3000λ厚まで成膜を続けた。その
後、後工程でa−8i:H層を形成した。
FIG. 1 is a schematic diagram of an apparatus for forming a gate insulating film to which the present invention is applied. Board 8 is a CV with an exhaust bonder
It is fixed in a D chamber 5, and a pattern is transferred onto a substrate 8 by light emitted from an ArF laser 1 through a pattern mask 2, a synthetic quartz lens 3, and a synthetic quartz window 4. The substrate 8 has a chromium gate electrode formed in the previous process on glass,
It is heated to an appropriate temperature by a heater or the like. The source gases Si*Hs and NtO are each supplied to the first mass 70-controller 26. Second square 70-control, 771C
Therefore, it is supplied to the CVD chamber 5. Ki at the start of deposition
dsilHaON201c to frua quantity ratio 2 x 10
-' The first mass flow controller 6, so that it is greater than or equal to 8×10 or less! :Second mass flow controller 7
Set. When the 5iOz film thickness reaches about 2000λ, the first mass 70-controller 6 is adjusted so that the flow rate ratio of 5i2H@ to N, OK becomes smaller than 2×10.
2nd cell 70 - change the setting value of controller 7,
Further film formation was continued to a thickness of 3000λ. Thereafter, an a-8i:H layer was formed in a post-process.

本発明では最初に良好な絶縁耐圧を与える流量比でピン
ホールが発生しがちな電極付近を覆う膜を形成するので
、耐圧不良となることはない。またa−si:)(と接
する部分は良好な組成をもたらす流量比で成膜するので
、a−8i:Hとの界面特性も良好に保たれる。
In the present invention, a film covering the vicinity of the electrode where pinholes tend to occur is first formed at a flow rate ratio that provides a good dielectric strength voltage, so there is no possibility of a poor withstand voltage. Further, since the portion in contact with a-si:) is formed at a flow rate ratio that provides a good composition, the interface characteristics with a-8i:H are also maintained good.

本発明においては原料ガスの流量比を変えるだけで真空
−貫で絶縁耐圧、界面特性がともに良好なゲート絶縁膜
を形成できるので、基板を1つの装置から他の装置に移
す工程が不用でありた。
In the present invention, a gate insulating film with good dielectric strength and interface properties can be formed through vacuum simply by changing the flow rate ratio of the raw material gases, so there is no need to transfer the substrate from one device to another. Ta.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば成膜中に原料ガス流
量比を変えることによりて1種類の成膜方法で、良好な
絶縁耐圧を有し、且つ半導体層との関に良好な界面特性
を有するゲート絶縁膜を形成することができる。
As explained above, according to the present invention, by changing the raw material gas flow rate ratio during film formation, one type of film formation method can have good dielectric strength and good interface properties with respect to the semiconductor layer. A gate insulating film having the following characteristics can be formed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の方法を適用した装置を表わす模式図、
第2図は光CVDで成膜された膜の性質と原料ガス流量
比との関係を示す図である。 1・・・・・・ArFレーザ、2・・・・・・パターン
マスク、3・・・・−合成石英レンズ、4・旧・・合成
石英窓、5・・・・・・CVDfヤンパ、6・・・・・
・第1のマスフローコントo−9,7・・・・・・第2
のマスフローコントローラ、8・・・・・・基板。 芳 1  図 代理人 弁理士  内 原   晋
FIG. 1 is a schematic diagram showing an apparatus to which the method of the present invention is applied;
FIG. 2 is a diagram showing the relationship between the properties of a film formed by photo-CVD and the raw material gas flow rate ratio. 1...ArF laser, 2...pattern mask, 3...-synthetic quartz lens, 4-old...synthetic quartz window, 5...CVDf bumper, 6・・・・・・
・First mass flow control o-9,7...Second
mass flow controller, 8... board. Yoshi 1 Illustration agent Patent attorney Susumu Uchihara

Claims (1)

【特許請求の範囲】[Claims] 光照射によって原料ガスを分解して成膜する光CVDに
よって金属層と半導体層との間に酸化シリコン膜を形成
する方法において、前記酸化シリコン膜のうち前記金属
層と接する部分はシリコン供給用ガスの酸素供給用ガス
に対する流量比が1×10^−^3以上1×10^−^
2以下となる条件下で成膜し、前記半導体層と接する部
分は前記流量比が1×10^−^3より小さくなる条件
下で成膜することを特徴とした成膜方法。
In a method of forming a silicon oxide film between a metal layer and a semiconductor layer by photo-CVD in which film formation is performed by decomposing a raw material gas by light irradiation, a portion of the silicon oxide film in contact with the metal layer is filled with a silicon supply gas. The flow rate ratio for the oxygen supply gas is 1 x 10^-^3 or more 1 x 10^-^
2 or less, and a portion in contact with the semiconductor layer is formed under conditions where the flow rate ratio is less than 1×10^-^3.
JP33034488A 1988-12-26 1988-12-26 Formation of film Pending JPH02174123A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33034488A JPH02174123A (en) 1988-12-26 1988-12-26 Formation of film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33034488A JPH02174123A (en) 1988-12-26 1988-12-26 Formation of film

Publications (1)

Publication Number Publication Date
JPH02174123A true JPH02174123A (en) 1990-07-05

Family

ID=18231571

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33034488A Pending JPH02174123A (en) 1988-12-26 1988-12-26 Formation of film

Country Status (1)

Country Link
JP (1) JPH02174123A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5708252A (en) * 1986-09-26 1998-01-13 Semiconductor Energy Laboratory Co., Ltd. Excimer laser scanning system
US6149988A (en) * 1986-09-26 2000-11-21 Semiconductor Energy Laboratory Co., Ltd. Method and system of laser processing
US6261856B1 (en) 1987-09-16 2001-07-17 Semiconductor Energy Laboratory Co., Ltd. Method and system of laser processing

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5708252A (en) * 1986-09-26 1998-01-13 Semiconductor Energy Laboratory Co., Ltd. Excimer laser scanning system
US6149988A (en) * 1986-09-26 2000-11-21 Semiconductor Energy Laboratory Co., Ltd. Method and system of laser processing
US6261856B1 (en) 1987-09-16 2001-07-17 Semiconductor Energy Laboratory Co., Ltd. Method and system of laser processing

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